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community/qbe: add patch for aarch64

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source:

  https://c9x.me/git/qbe.git/commit/?id=90050202f57b22243f5d3dd434a81df2f89de9ed
This commit is contained in:
omni 2024-11-27 12:15:41 +00:00
parent 88919831ba
commit 3f43aeb246
2 changed files with 92 additions and 1 deletions
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4
community/qbe/APKBUILD
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@ -1,7 +1,7 @@
# Maintainer: Simon Zeni <simon@bl4ckb0ne.ca>
pkgname=qbe
pkgver=1.2
pkgrel=2
pkgrel=3
pkgdesc="A simple C compiler backend"
url="https://c9x.me/compile/"
arch="all"
@ -9,6 +9,7 @@ license="MIT"
subpackages="$pkgname-dbg"
source="$pkgname-$pkgver.tar.xz::https://c9x.me/compile/release/qbe-$pkgver.tar.xz
aarch64-fix.patch
fix-various-codegen-bugs-on-arm64.patch
"
case $CARCH in
@ -41,4 +42,5 @@ package() {
sha512sums="
b3ffd172e95346b3bfae1d2aff4c22a32af8bd4443d073f6fbb711f41db01f072ca7a8108901508cd4a8366567dab46510e0438716d35548591fdf37cee49971 qbe-1.2.tar.xz
c1b6149930475d45657d514218902f231e665c7ceff5e19d5055ffe2da4334256d824855cd9420e77f3f51e2c2f8895ad831925b70089ae233b8cf38302c960c aarch64-fix.patch
517385063c73f1c740c6c2487b55aa74862111aaf916447395e03f4789959743a3af33494c0f5cc9355810cb8149dad5d99aeea7888557b57f5ed91cc61c7ee0 fix-various-codegen-bugs-on-arm64.patch
"

89
community/qbe/fix-various-codegen-bugs-on-arm64.patch Normal file
View file

@ -0,0 +1,89 @@
From 90050202f57b22243f5d3dd434a81df2f89de9ed Mon Sep 17 00:00:00 2001
From: Quentin Carbonneaux
Date: Tue, 1 Oct 2024 19:38:15 +0200
Subject: fix various codegen bugs on arm64
- dynamic allocations could generate
bad 'and' instructions (for the
and with -16 in salloc()).
- symbols used in w context would
generate adrp and add instructions
on wN registers while they seem to
only work on xN registers.
Thanks to Rosie for reporting them.
---
arm64/emit.c | 19 ++++++++++++++-----
test/isel5.ssa | 16 ++++++++++++++++
2 files changed, 30 insertions(+), 5 deletions(-)
create mode 100644 test/isel5.ssa
diff --git a/arm64/emit.c b/arm64/emit.c
index ffdc178..28cd6a5 100644
--- a/arm64/emit.c
+++ b/arm64/emit.c
@@ -160,7 +160,8 @@ emitf(char *s, Ins *i, E *e)
Ref r;
int k, c;
Con *pc;
- uint n, sp;
+ uint64_t n;
+ uint sp;
fputc('\t', e->f);
@@ -217,10 +218,17 @@ emitf(char *s, Ins *i, E *e)
pc = &e->fn->con[r.val];
n = pc->bits.i;
assert(pc->type == CBits);
- if (n & 0xfff000)
- fprintf(e->f, "#%u, lsl #12", n>>12);
- else
- fprintf(e->f, "#%u", n);
+ if (n >> 24) {
+ assert(arm64_logimm(n, k));
+ fprintf(e->f, "#%"PRIu64, n);
+ } else if (n & 0xfff000) {
+ assert(!(n & ~0xfff000ull));
+ fprintf(e->f, "#%"PRIu64", lsl #12",
+ n>>12);
+ } else {
+ assert(!(n & ~0xfffull));
+ fprintf(e->f, "#%"PRIu64, n);
+ }
break;
}
break;
@@ -304,6 +312,7 @@ loadcon(Con *c, int r, int k, E *e)
rn = rname(r, k);
n = c->bits.i;
if (c->type == CAddr) {
+ rn = rname(r, Kl);
loadaddr(c, rn, e);
return;
}
diff --git a/test/isel5.ssa b/test/isel5.ssa
new file mode 100644
index 0000000..9c546d7
--- /dev/null
+++ b/test/isel5.ssa
@@ -0,0 +1,16 @@
+# make sure the local symbols used for
+# fp constants do not get a _ prefix
+# on apple arm hardware
+
+export function w $main() {
+@start
+ %r =d copy d_1.2
+ %x =w call $printf(l $fmt, ..., d %r)
+ ret 0
+}
+
+data $fmt = { b "%.06f\n", b 0 }
+
+# >>> output
+# 1.200000
+# <<<
--
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