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PICO: Adding tinyUSB library
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blckmn
parent
1774693395
commit
0109f50909
1507 changed files with 299535 additions and 0 deletions
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set(MCU_VARIANT stm32wb55xx)
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set(JLINK_DEVICE STM32WB55RG)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/stm32wb55xx_flash_cm4.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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STM32WB55xx
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)
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endfunction()
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122
lib/main/tinyUSB/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h
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122
lib/main/tinyUSB/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2022, Jerzy Kasenberg
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// LED
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#define LED_PORT GPIOB
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#define LED_PIN GPIO_PIN_5
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#define LED_STATE_ON 1
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// Button
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#define BUTTON_PORT GPIOC
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#define BUTTON_PIN GPIO_PIN_4
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#define BUTTON_STATE_ACTIVE 0
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// UART Enable for STLink VCOM
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#define UART_DEV USART1
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#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
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#define UART_GPIO_PORT GPIOB
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#define UART_GPIO_AF GPIO_AF7_USART1
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#define UART_TX_PIN GPIO_PIN_6
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#define UART_RX_PIN GPIO_PIN_7
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void board_clock_init(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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// Initializes the CPU, AHB and APB buses clocks
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
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RCC_OscInitStruct.PLL.PLLN = 24;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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// Initializes the CPU, AHB and APB buses clocks
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
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PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
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#if 0 // TODO need to check if USB clock is enabled
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/* Enable HSI48 */
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memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitStruct));
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/*Enable CRS Clock*/
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RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
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__HAL_RCC_CRS_CLK_ENABLE();
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/* Default Synchro Signal division factor (not divided) */
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RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
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/* Set the SYNCSRC[1:0] bits according to CRS_Source value */
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RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
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/* HSI48 is synchronized with USB SOF at 1KHz rate */
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RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
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RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
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/* Set the TRIM[5:0] to the default value */
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RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
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/* Start automatic synchronization */
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HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
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#endif
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H_ */
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MCU_VARIANT = stm32wb55xx
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CFLAGS += \
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-DSTM32WB55xx
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# For flash-jlink target
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JLINK_DEVICE = STM32WB55RG
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/**
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*****************************************************************************
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**
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** File : stm32wb55xx_flash_cm4.ld
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**
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** Abstract : System Workbench Minimal System calls file
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**
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** For more information about which c-functions
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** need which of these lowlevel functions
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** please consult the Newlib libc-manual
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**
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** Environment : System Workbench for MCU
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**
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** Distribution: The file is distributed “as is,” without any warranty
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** of any kind.
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**
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*****************************************************************************
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** @attention
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**
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** Copyright (c) 2019 STMicroelectronics.
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** All rights reserved.
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**
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** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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*****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20030000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x400; /* required amount of heap */
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_Min_Stack_Size = 0x1000; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
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RAM1 (xrw) : ORIGIN = 0x20000008, LENGTH = 0x2FFF8
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RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data goes into FLASH */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM1 AT> FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss section */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM1
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} >RAM1
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
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MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
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MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
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}
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