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Move DMA IRQ acknowledge to before the callback as it's edge triggered (#14514)
* Remove superfluous comments * Move DMA IRQ acknowledge to before the callback as it's edge triggered
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parent
35aac9f924
commit
01329e3350
2 changed files with 9 additions and 27 deletions
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@ -160,18 +160,6 @@ void spiPinConfigure(const struct spiPinConfig_s *pConfig)
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}
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}
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/*
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static spi_inst_t *getSpiInstanceByDevice(SPI_TypeDef *spi)
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{
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if (spi == SPI0) {
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return spi0;
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} else if (spi == SPI1) {
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return spi1;
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}
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return NULL;
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}
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*/
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static void spiSetClockFromSpeed(spi_inst_t *spi, uint16_t speed)
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{
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uint32_t freq = spiCalculateClock(speed);
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@ -219,14 +207,6 @@ Must be SPI_MSB_FIRST, no other values supported on the PL022
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void spiInitDevice(SPIDevice device)
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{
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// maybe here set getSpiInstanceByDevice(spi->dev) SPI device with
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// settings like
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// STM does
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//SetRXFIFOThreshold ...QF (1/4 full presumably)
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// Init -> full duplex, master, 8biut, baudrate, MSBfirst, no CRC,
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// Clock = PolarityHigh, Phase_2Edge
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const spiDevice_t *spi = &spiDevice[device];
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if (!spi->dev) {
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@ -63,21 +63,23 @@ void dma_irq_handler(bool isIrq1)
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// channel equates to index in the dmaDescriptors array
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for (uint8_t channel = 0; channel < DMA_LAST_HANDLER; channel++) {
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if (status & (1u << channel)) {
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uint8_t index = DMA_CHANNEL_TO_INDEX(channel);
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// Call the handler if it is set
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if (dmaDescriptors[index].irqHandlerCallback) {
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dmaDescriptors[index].irqHandlerCallback(&dmaDescriptors[index]);
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}
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// Acknowledge the interrupt for this channel
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// Acknowledge the interrupt for this channel as it is edge, not
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// level triggered and the callback may trigger another DMA
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if (isIrq1) {
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dma_channel_acknowledge_irq1(channel);
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} else {
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dma_channel_acknowledge_irq0(channel);
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}
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uint8_t index = DMA_CHANNEL_TO_INDEX(channel);
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// Call the handler if it is set
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if (dmaDescriptors[index].irqHandlerCallback) {
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dmaDescriptors[index].irqHandlerCallback(&dmaDescriptors[index]);
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}
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}
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}
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}
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void dma_irq0_handler(void)
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{
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dma_irq_handler(false);
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