mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-23 16:25:31 +03:00
Merge pull request #3907 from jflyper/bfdev-fix-spi2-and-spi3-clock-divisor
Fix SCLK frequency for SPI2 and SPI3
This commit is contained in:
commit
01873d3f81
2 changed files with 20 additions and 8 deletions
|
@ -249,6 +249,8 @@ bool spiTransfer(SPI_TypeDef *instance, const uint8_t *txData, uint8_t *rxData,
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#include "build/debug.h"
|
||||||
|
|
||||||
bool spiBusTransfer(const busDevice_t *bus, const uint8_t *txData, uint8_t *rxData, int length)
|
bool spiBusTransfer(const busDevice_t *bus, const uint8_t *txData, uint8_t *rxData, int length)
|
||||||
{
|
{
|
||||||
IOLo(bus->busdev_u.spi.csnPin);
|
IOLo(bus->busdev_u.spi.csnPin);
|
||||||
|
@ -259,13 +261,22 @@ bool spiBusTransfer(const busDevice_t *bus, const uint8_t *txData, uint8_t *rxDa
|
||||||
|
|
||||||
void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
|
void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
|
||||||
{
|
{
|
||||||
#define BR_CLEAR_MASK 0xFFC7
|
#define BR_BITS ((BIT(5) | BIT(4) | BIT(3)))
|
||||||
|
|
||||||
|
// SPI2 and SPI3 are always on APB1/AHB1 which PCLK is half that of APB2/AHB2.
|
||||||
|
|
||||||
|
if (instance == SPI2 || instance == SPI3) {
|
||||||
|
divisor /= 2; // Safe for divisor == 0 or 1
|
||||||
|
}
|
||||||
|
|
||||||
SPI_Cmd(instance, DISABLE);
|
SPI_Cmd(instance, DISABLE);
|
||||||
|
|
||||||
const uint16_t tempRegister = (instance->CR1 & BR_CLEAR_MASK);
|
const uint16_t tempRegister = (instance->CR1 & ~BR_BITS);
|
||||||
instance->CR1 = (tempRegister | ((ffs(divisor | 0x100) - 2) << 3));
|
instance->CR1 = (tempRegister | ((ffs(divisor | 0x100) - 2) << 3));
|
||||||
|
|
||||||
SPI_Cmd(instance, ENABLE);
|
SPI_Cmd(instance, ENABLE);
|
||||||
|
|
||||||
|
#undef BR_BITS
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t spiGetErrorCounter(SPI_TypeDef *instance)
|
uint16_t spiGetErrorCounter(SPI_TypeDef *instance)
|
||||||
|
|
|
@ -302,13 +302,14 @@ bool spiBusTransfer(const busDevice_t *bus, const uint8_t *txData, uint8_t *rxDa
|
||||||
|
|
||||||
void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
|
void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
|
||||||
{
|
{
|
||||||
|
// SPI2 and SPI3 are always on APB1/AHB1 which PCLK is half that of APB2/AHB2.
|
||||||
|
|
||||||
|
if (instance == SPI2 || instance == SPI3) {
|
||||||
|
divisor /= 2; // Safe for divisor == 0 or 1
|
||||||
|
}
|
||||||
|
|
||||||
LL_SPI_Disable(instance);
|
LL_SPI_Disable(instance);
|
||||||
#define BR_CLEAR_MASK 0xFFC7
|
LL_SPI_SetBaudRatePrescaler(instance, (ffs(divisor | 0x100) - 2) << SPI_CR1_BR_Pos);
|
||||||
|
|
||||||
const uint16_t tempRegister = (instance->CR1 & BR_CLEAR_MASK);
|
|
||||||
instance->CR1 = (tempRegister | ((ffs(divisor | 0x100) - 2) << 3));
|
|
||||||
|
|
||||||
//LL_SPI_SetBaudRatePrescaler(instance, baudRatePrescaler);
|
|
||||||
LL_SPI_Enable(instance);
|
LL_SPI_Enable(instance);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue