mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-16 04:45:24 +03:00
reformat I2C driver and align comments. add timeout checking and move hardware reinit common code into separate function.
moved nvic priority group init into drv_system, where it belongs Conflicts: src/drivers/system_common.c src/drv_i2c.c
This commit is contained in:
dongie
Dominic Clifton
parent
31297de7fa
commit
0e80dbf025
2 changed files with 134 additions and 136 deletions
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@ -55,35 +55,12 @@ static volatile uint8_t reading;
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static volatile uint8_t* write_p;
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static volatile uint8_t* read_p;
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static void i2c_er_handler(void)
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static bool i2cHandleHardwareFailure(void)
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{
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volatile uint32_t SR1Register;
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// Read the I2C1 status register
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SR1Register = I2Cx->SR1;
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if (SR1Register & 0x0F00) {
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error = true;
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// I2C1error.error = ((SR1Register & 0x0F00) >> 8); // save error
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// I2C1error.job = job; // the task
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}
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// If AF, BERR or ARLO, abandon the current job and commence new if there are jobs
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if (SR1Register & 0x0700) {
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(void) I2Cx->SR2; // read second status register to clear ADDR if it is set (note that BTF will not be set after a NACK)
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); // disable the RXNE/TXE interrupt - prevent the ISR tailchaining onto the ER (hopefully)
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if (!(SR1Register & 0x0200) && !(I2Cx->CR1 & 0x0200)) { // if we dont have an ARLO error, ensure sending of a stop
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if (I2Cx->CR1 & 0x0100) { // We are currently trying to send a start, this is very bad as start,stop will hang the peripheral
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while (I2Cx->CR1 & 0x0100); // wait for any start to finish sending
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I2C_GenerateSTOP(I2Cx, ENABLE); // send stop to finalise bus transaction
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while (I2Cx->CR1 & 0x0200); // wait for stop to finish sending
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i2cInit(I2Cx); // reset and configure the hardware
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} else {
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I2C_GenerateSTOP(I2Cx, ENABLE); // stop to free up the bus
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, DISABLE); // Disable EVT and ERR interrupts while bus inactive
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}
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}
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}
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I2Cx->SR1 &= ~0x0F00; // reset all the error bits to clear the interrupt
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busy = 0;
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i2cErrorCount++;
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// reinit peripheral + clock out garbage
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i2cInit(I2Cx);
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return false;
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}
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bool i2cWriteBuffer(uint8_t addr_, uint8_t reg_, uint8_t len_, uint8_t *data)
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@ -102,19 +79,18 @@ bool i2cWriteBuffer(uint8_t addr_, uint8_t reg_, uint8_t len_, uint8_t *data)
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if (!(I2Cx->CR2 & I2C_IT_EVT)) { // if we are restarting the driver
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if (!(I2Cx->CR1 & 0x0100)) { // ensure sending a start
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while (I2Cx->CR1 & 0x0200); // wait for any stop to finish sending
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while (I2Cx->CR1 & 0x0200 && --timeout > 0) { ; } // wait for any stop to finish sending
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if (timeout == 0)
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return i2cHandleHardwareFailure();
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I2C_GenerateSTART(I2Cx, ENABLE); // send the start for the new job
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}
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, ENABLE); // allow the interrupts to fire off again
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}
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while (busy && --timeout > 0);
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if (timeout == 0) {
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i2cErrorCount++;
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// reinit peripheral + clock out garbage
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i2cInit(I2Cx);
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return false;
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}
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timeout = I2C_DEFAULT_TIMEOUT;
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while (busy && --timeout > 0) { ; }
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if (timeout == 0)
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return i2cHandleHardwareFailure();
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return !error;
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}
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@ -140,27 +116,54 @@ bool i2cRead(uint8_t addr_, uint8_t reg_, uint8_t len, uint8_t* buf)
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if (!(I2Cx->CR2 & I2C_IT_EVT)) { // if we are restarting the driver
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if (!(I2Cx->CR1 & 0x0100)) { // ensure sending a start
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while (I2Cx->CR1 & 0x0200); // wait for any stop to finish sending
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while (I2Cx->CR1 & 0x0200 && --timeout > 0) { ; } // wait for any stop to finish sending
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if (timeout == 0)
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return i2cHandleHardwareFailure();
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I2C_GenerateSTART(I2Cx, ENABLE); // send the start for the new job
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}
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, ENABLE); // allow the interrupts to fire off again
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}
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while (busy && --timeout > 0);
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if (timeout == 0) {
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i2cErrorCount++;
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// reinit peripheral + clock out garbage
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i2cInit(I2Cx);
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return false;
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}
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timeout = I2C_DEFAULT_TIMEOUT;
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while (busy && --timeout > 0) { ; }
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if (timeout == 0)
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return i2cHandleHardwareFailure();
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return !error;
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}
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static void i2c_er_handler(void)
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{
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// Read the I2C1 status register
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volatile uint32_t SR1Register = I2Cx->SR1;
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if (SR1Register & 0x0F00) // an error
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error = true;
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// If AF, BERR or ARLO, abandon the current job and commence new if there are jobs
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if (SR1Register & 0x0700) {
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(void)I2Cx->SR2; // read second status register to clear ADDR if it is set (note that BTF will not be set after a NACK)
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); // disable the RXNE/TXE interrupt - prevent the ISR tailchaining onto the ER (hopefully)
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if (!(SR1Register & 0x0200) && !(I2Cx->CR1 & 0x0200)) { // if we dont have an ARLO error, ensure sending of a stop
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if (I2Cx->CR1 & 0x0100) { // We are currently trying to send a start, this is very bad as start, stop will hang the peripheral
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while (I2Cx->CR1 & 0x0100) { ; } // wait for any start to finish sending
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I2C_GenerateSTOP(I2Cx, ENABLE); // send stop to finalise bus transaction
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while (I2Cx->CR1 & 0x0200) { ; } // wait for stop to finish sending
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i2cInit(I2Cx); // reset and configure the hardware
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} else {
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I2C_GenerateSTOP(I2Cx, ENABLE); // stop to free up the bus
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, DISABLE); // Disable EVT and ERR interrupts while bus inactive
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}
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}
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}
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I2Cx->SR1 &= ~0x0F00; // reset all the error bits to clear the interrupt
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busy = 0;
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}
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void i2c_ev_handler(void)
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{
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static uint8_t subaddress_sent, final_stop; // flag to indicate if subaddess sent, flag to indicate final bus condition
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static int8_t index; // index is signed -1==send the subaddress
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static int8_t index; // index is signed -1 == send the subaddress
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uint8_t SReg_1 = I2Cx->SR1; // read the status register here
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if (SReg_1 & 0x0001) { // we just sent a start - EV5 in ref manual
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@ -183,20 +186,19 @@ void i2c_ev_handler(void)
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if (bytes == 1 && reading && subaddress_sent) { // we are receiving 1 byte - EV6_3
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I2C_AcknowledgeConfig(I2Cx, DISABLE); // turn off ACK
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__DMB();
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(void) I2Cx->SR2; // clear ADDR after ACK is turned off
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(void)I2Cx->SR2; // clear ADDR after ACK is turned off
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I2C_GenerateSTOP(I2Cx, ENABLE); // program the stop
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final_stop = 1;
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I2C_ITConfig(I2Cx, I2C_IT_BUF, ENABLE); // allow us to have an EV7
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} else { // EV6 and EV6_1
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(void) I2Cx->SR2; // clear the ADDR here
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(void)I2Cx->SR2; // clear the ADDR here
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__DMB();
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if (bytes == 2 && reading && subaddress_sent) { // rx 2 bytes - EV6_1
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I2C_AcknowledgeConfig(I2Cx, DISABLE); // turn off ACK
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); // disable TXE to allow the buffer to fill
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} else if (bytes == 3 && reading && subaddress_sent) // rx 3 bytes
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); // make sure RXNE disabled so we get a BTF in two bytes time
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else
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//receiving greater than three bytes, sending subaddress, or transmitting
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else // receiving greater than three bytes, sending subaddress, or transmitting
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I2C_ITConfig(I2Cx, I2C_IT_BUF, ENABLE);
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}
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} else if (SReg_1 & 0x004) { // Byte transfer finished - EV7_2, EV7_3 or EV8_2
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@ -206,18 +208,16 @@ void i2c_ev_handler(void)
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I2C_AcknowledgeConfig(I2Cx, DISABLE); // turn off ACK
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read_p[index++] = (uint8_t)I2Cx->DR; // read data N-2
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I2C_GenerateSTOP(I2Cx, ENABLE); // program the Stop
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final_stop = 1; // reuired to fix hardware
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read_p[index++] = (uint8_t)I2Cx->DR; // read data N-1
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final_stop = 1; // required to fix hardware
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read_p[index++] = (uint8_t)I2Cx->DR; // read data N - 1
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I2C_ITConfig(I2Cx, I2C_IT_BUF, ENABLE); // enable TXE to allow the final EV7
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} else { // EV7_3
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if (final_stop)
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I2C_GenerateSTOP(I2Cx, ENABLE); // program the Stop
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else
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I2C_GenerateSTART(I2Cx, ENABLE); // program a rep start
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read_p[index++] = (uint8_t)I2Cx->DR; // read data N-1
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read_p[index++] = (uint8_t)I2Cx->DR; // read data N - 1
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read_p[index++] = (uint8_t)I2Cx->DR; // read data N
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read_p[index++] = I2C_ReceiveData(I2Cx); // read data N-1
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read_p[index++] = I2C_ReceiveData(I2Cx); // read data N
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index++; // to show job completed
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}
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} else { // EV8_2, which may be due to a subaddress sent or a write completion
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@ -232,41 +232,38 @@ void i2c_ev_handler(void)
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subaddress_sent = 1; // this is set back to zero upon completion of the current task
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}
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}
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//we must wait for the start to clear, otherwise we get constant BTF
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while (I2Cx->CR1 & 0x0100);
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} else if (SReg_1 & 0x0040) { //Byte received - EV7
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// we must wait for the start to clear, otherwise we get constant BTF
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while (I2Cx->CR1 & 0x0100) { ; }
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} else if (SReg_1 & 0x0040) { // Byte received - EV7
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read_p[index++] = (uint8_t)I2Cx->DR;
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if (bytes == (index + 3))
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); // disable TXE to allow the buffer to flush so we can get an EV7_2
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if (bytes == index) //We have completed a final EV7
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index++; //to show job is complete
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} else if (SReg_1 & 0x0080) { //Byte transmitted -EV8/EV8_1
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if (index != -1) { //we dont have a subaddress to send
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if (bytes == index) // We have completed a final EV7
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index++; // to show job is complete
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} else if (SReg_1 & 0x0080) { // Byte transmitted EV8 / EV8_1
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if (index != -1) { // we dont have a subaddress to send
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I2Cx->DR = write_p[index++];
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if (bytes == index) //we have sent all the data
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); //disable TXE to allow the buffer to flush
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if (bytes == index) // we have sent all the data
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); // disable TXE to allow the buffer to flush
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} else {
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index++;
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I2Cx->DR = reg; // send the subaddress
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if (reading || !bytes) //if receiving or sending 0 bytes, flush now
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); //disable TXE to allow the buffer to flush
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if (reading || !bytes) // if receiving or sending 0 bytes, flush now
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I2C_ITConfig(I2Cx, I2C_IT_BUF, DISABLE); // disable TXE to allow the buffer to flush
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}
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}
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if (index == bytes + 1) { //we have completed the current job
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//Completion Tasks go here
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//End of completion tasks
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subaddress_sent = 0; //reset this here
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// I2Cx->CR1 &= ~0x0800; //reset the POS bit so NACK applied to the current byte
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if (final_stop) //If there is a final stop and no more jobs, bus is inactive, disable interrupts to prevent BTF
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, DISABLE); //Disable EVT and ERR interrupts while bus inactive
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if (index == bytes + 1) { // we have completed the current job
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subaddress_sent = 0; // reset this here
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if (final_stop) // If there is a final stop and no more jobs, bus is inactive, disable interrupts to prevent BTF
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, DISABLE); // Disable EVT and ERR interrupts while bus inactive
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busy = 0;
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}
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}
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void i2cInit(I2C_TypeDef *I2C)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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I2C_InitTypeDef I2C_InitStructure;
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NVIC_InitTypeDef nvic;
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I2C_InitTypeDef i2c;
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gpio_config_t gpio;
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// Init pins
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@ -282,29 +279,27 @@ void i2cInit(I2C_TypeDef *I2C)
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// Init I2C
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I2C_DeInit(I2Cx);
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I2C_StructInit(&I2C_InitStructure);
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I2C_StructInit(&i2c);
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, DISABLE); //Enable EVT and ERR interrupts - they are enabled by the first request
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I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
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I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
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I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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I2C_InitStructure.I2C_ClockSpeed = 400000;
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I2C_ITConfig(I2Cx, I2C_IT_EVT | I2C_IT_ERR, DISABLE); // Enable EVT and ERR interrupts - they are enabled by the first request
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i2c.I2C_Mode = I2C_Mode_I2C;
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i2c.I2C_DutyCycle = I2C_DutyCycle_2;
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i2c.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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i2c.I2C_ClockSpeed = 400000;
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I2C_Cmd(I2Cx, ENABLE);
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I2C_Init(I2Cx, &I2C_InitStructure);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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I2C_Init(I2Cx, &i2c);
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// I2C ER Interrupt
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NVIC_InitStructure.NVIC_IRQChannel = I2C2_ER_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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nvic.NVIC_IRQChannel = I2C2_ER_IRQn;
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nvic.NVIC_IRQChannelPreemptionPriority = 0;
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nvic.NVIC_IRQChannelSubPriority = 0;
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nvic.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&nvic);
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// I2C EV Interrupt
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NVIC_InitStructure.NVIC_IRQChannel = I2C2_EV_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_Init(&NVIC_InitStructure);
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nvic.NVIC_IRQChannel = I2C2_EV_IRQn;
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nvic.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_Init(&nvic);
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}
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uint16_t i2cGetErrorCounter(void)
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@ -102,6 +102,9 @@ void systemInit(bool overclock)
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SetSysClock(overclock);
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#endif
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// Configure NVIC preempt/priority groups
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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// Turn on clocks for stuff we use
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#ifdef STM32F10X_MD
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 | RCC_APB1Periph_I2C2, ENABLE);
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