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Disable F7 D-cache until more knowledge is acquired
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parent
a135e9cbb2
commit
1102df5d68
5 changed files with 8 additions and 8 deletions
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@ -193,7 +193,7 @@ void adcInit(adcConfig_t *config)
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}
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}
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HAL_CLEANINVALIDATECACHE((uint32_t*)&adcValues, configuredAdcChannels);
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//HAL_CLEANINVALIDATECACHE((uint32_t*)&adcValues, configuredAdcChannels);
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/*##-4- Start the conversion process #######################################*/
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if(HAL_ADC_Start_DMA(&adc.ADCHandle, (uint32_t*)&adcValues, configuredAdcChannels) != HAL_OK)
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{
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@ -390,7 +390,7 @@ DMA_HandleTypeDef* spiSetDMATransmit(DMA_Stream_TypeDef *Stream, uint32_t Channe
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// DMA TX Interrupt
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dmaSetHandler(spiHardwareMap[device].dmaIrqHandler, dmaSPIIRQHandler, NVIC_BUILD_PRIORITY(3, 0), (uint32_t)device);
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HAL_CLEANCACHE(pData,Size);
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//HAL_CLEANCACHE(pData,Size);
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// And Transmit
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HAL_SPI_Transmit_DMA(&spiHardwareMap[device].hspi, pData, Size);
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@ -39,8 +39,8 @@ typedef struct dmaChannelDescriptor_s {
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} dmaChannelDescriptor_t;
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#if defined(STM32F7)
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#define HAL_CLEANINVALIDATECACHE(addr, size) (SCB_CleanInvalidateDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), ((uint32_t)(addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
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#define HAL_CLEANCACHE(addr, size) (SCB_CleanDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), ((uint32_t)(addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
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//#define HAL_CLEANINVALIDATECACHE(addr, size) (SCB_CleanInvalidateDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), ((uint32_t)(addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
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//#define HAL_CLEANCACHE(addr, size) (SCB_CleanDCache_by_Addr((uint32_t*)((uint32_t)addr & ~0x1f), ((uint32_t)(addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
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#endif
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#if defined(STM32F4) || defined(STM32F7)
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@ -266,7 +266,7 @@ void uartStartTxDMA(uartPort_t *s)
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s->port.txBufferTail = 0;
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}
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s->txDMAEmpty = false;
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HAL_CLEANCACHE((uint8_t *)&s->port.txBuffer[fromwhere],size);
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//HAL_CLEANCACHE((uint8_t *)&s->port.txBuffer[fromwhere],size);
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HAL_UART_Transmit_DMA(&s->Handle, (uint8_t *)&s->port.txBuffer[fromwhere], size);
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}
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@ -283,14 +283,14 @@ void SystemInit(void)
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SCB_EnableICache();
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/* Enable D-Cache */
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SCB_EnableDCache();
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//SCB_EnableDCache();
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/* Configure the system clock to 216 MHz */
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SystemClock_Config();
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//if(SystemCoreClock != 260000000)
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if(SystemCoreClock != 216000000)
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{
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//while(1)
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while(1)
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{
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// There is a mismatch between the configured clock and the expected clock in portable.h
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}
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