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Move standard clock to 10.5mhz

This commit is contained in:
blckmn 2016-06-24 17:28:59 +10:00
parent b8263ec049
commit 134bb6f466
2 changed files with 168 additions and 170 deletions

View file

@ -36,7 +36,7 @@
#define GPIO_AF_SPI2 GPIO_AF_5 #define GPIO_AF_SPI2 GPIO_AF_5
#endif #endif
#ifndef GPIO_AF_SPI3 #ifndef GPIO_AF_SPI3
#define GPIO_AF_SPI3 GPIO_AF_6 #define GPIO_AF_SPI3 GPIO_AF_6
#endif #endif
#endif #endif
@ -73,168 +73,168 @@
static spiDevice_t spiHardwareMap[] = { static spiDevice_t spiHardwareMap[] = {
#if defined(STM32F10X) #if defined(STM32F10X)
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = 0, false }, { .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = 0, false },
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = 0, false }, { .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = 0, false },
#else #else
{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF_SPI1, false }, { .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF_SPI1, false },
{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF_SPI2, false }, { .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF_SPI2, false },
#endif #endif
#if defined(STM32F303xC) || defined(STM32F40_41xxx) || defined(STM32F411xE) #if defined(STM32F303xC) || defined(STM32F40_41xxx) || defined(STM32F411xE)
{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF_SPI3, false } { .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF_SPI3, false }
#endif #endif
}; };
SPIDevice spiDeviceByInstance(SPI_TypeDef *instance) SPIDevice spiDeviceByInstance(SPI_TypeDef *instance)
{ {
if (instance == SPI1) if (instance == SPI1)
return SPIDEV_1; return SPIDEV_1;
if (instance == SPI2) if (instance == SPI2)
return SPIDEV_2; return SPIDEV_2;
if (instance == SPI3) if (instance == SPI3)
return SPIDEV_3; return SPIDEV_3;
return SPIINVALID; return SPIINVALID;
} }
void spiInitDevice(SPIDevice device) void spiInitDevice(SPIDevice device)
{ {
SPI_InitTypeDef spiInit; SPI_InitTypeDef spiInit;
spiDevice_t *spi = &(spiHardwareMap[device]); spiDevice_t *spi = &(spiHardwareMap[device]);
#ifdef SDCARD_SPI_INSTANCE #ifdef SDCARD_SPI_INSTANCE
if (spi->dev == SDCARD_SPI_INSTANCE) if (spi->dev == SDCARD_SPI_INSTANCE)
spi->sdcard = true; spi->sdcard = true;
#endif #endif
// Enable SPI clock // Enable SPI clock
RCC_ClockCmd(spi->rcc, ENABLE); RCC_ClockCmd(spi->rcc, ENABLE);
RCC_ResetCmd(spi->rcc, ENABLE); RCC_ResetCmd(spi->rcc, ENABLE);
IOInit(IOGetByTag(spi->sck), OWNER_SYSTEM, RESOURCE_SPI); IOInit(IOGetByTag(spi->sck), OWNER_SYSTEM, RESOURCE_SPI);
IOInit(IOGetByTag(spi->miso), OWNER_SYSTEM, RESOURCE_SPI); IOInit(IOGetByTag(spi->miso), OWNER_SYSTEM, RESOURCE_SPI);
IOInit(IOGetByTag(spi->mosi), OWNER_SYSTEM, RESOURCE_SPI); IOInit(IOGetByTag(spi->mosi), OWNER_SYSTEM, RESOURCE_SPI);
#if defined(STM32F303xC) || defined(STM32F4) #if defined(STM32F303xC) || defined(STM32F4)
if (spi->sdcard) { if (spi->sdcard) {
IOConfigGPIOAF(IOGetByTag(spi->sck), SPI_IO_AF_SCK_CFG, spi->af); IOConfigGPIOAF(IOGetByTag(spi->sck), SPI_IO_AF_SCK_CFG, spi->af);
IOConfigGPIOAF(IOGetByTag(spi->miso), SPI_IO_AF_MISO_CFG, spi->af); IOConfigGPIOAF(IOGetByTag(spi->miso), SPI_IO_AF_MISO_CFG, spi->af);
} }
else { else {
IOConfigGPIOAF(IOGetByTag(spi->sck), SPI_IO_AF_CFG, spi->af); IOConfigGPIOAF(IOGetByTag(spi->sck), SPI_IO_AF_CFG, spi->af);
IOConfigGPIOAF(IOGetByTag(spi->miso), SPI_IO_AF_CFG, spi->af); IOConfigGPIOAF(IOGetByTag(spi->miso), SPI_IO_AF_CFG, spi->af);
} }
IOConfigGPIOAF(IOGetByTag(spi->mosi), SPI_IO_AF_CFG, spi->af); IOConfigGPIOAF(IOGetByTag(spi->mosi), SPI_IO_AF_CFG, spi->af);
if (spi->nss) if (spi->nss)
IOConfigGPIOAF(IOGetByTag(spi->nss), SPI_IO_CS_CFG, spi->af); IOConfigGPIOAF(IOGetByTag(spi->nss), SPI_IO_CS_CFG, spi->af);
#endif #endif
#if defined(STM32F10X) #if defined(STM32F10X)
IOConfigGPIO(IOGetByTag(spi->sck), SPI_IO_AF_CFG); IOConfigGPIO(IOGetByTag(spi->sck), SPI_IO_AF_CFG);
IOConfigGPIO(IOGetByTag(spi->miso), SPI_IO_AF_CFG); IOConfigGPIO(IOGetByTag(spi->miso), SPI_IO_AF_CFG);
IOConfigGPIO(IOGetByTag(spi->mosi), SPI_IO_AF_CFG); IOConfigGPIO(IOGetByTag(spi->mosi), SPI_IO_AF_CFG);
if (spi->nss) if (spi->nss)
IOConfigGPIO(IOGetByTag(spi->nss), SPI_IO_CS_CFG); IOConfigGPIO(IOGetByTag(spi->nss), SPI_IO_CS_CFG);
#endif #endif
// Init SPI hardware // Init SPI hardware
SPI_I2S_DeInit(spi->dev); SPI_I2S_DeInit(spi->dev);
spiInit.SPI_Mode = SPI_Mode_Master; spiInit.SPI_Mode = SPI_Mode_Master;
spiInit.SPI_Direction = SPI_Direction_2Lines_FullDuplex; spiInit.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
spiInit.SPI_DataSize = SPI_DataSize_8b; spiInit.SPI_DataSize = SPI_DataSize_8b;
spiInit.SPI_NSS = SPI_NSS_Soft; spiInit.SPI_NSS = SPI_NSS_Soft;
spiInit.SPI_FirstBit = SPI_FirstBit_MSB; spiInit.SPI_FirstBit = SPI_FirstBit_MSB;
spiInit.SPI_CRCPolynomial = 7; spiInit.SPI_CRCPolynomial = 7;
spiInit.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8; spiInit.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
if (spi->sdcard) { if (spi->sdcard) {
spiInit.SPI_CPOL = SPI_CPOL_Low; spiInit.SPI_CPOL = SPI_CPOL_Low;
spiInit.SPI_CPHA = SPI_CPHA_1Edge; spiInit.SPI_CPHA = SPI_CPHA_1Edge;
} }
else { else {
spiInit.SPI_CPOL = SPI_CPOL_High; spiInit.SPI_CPOL = SPI_CPOL_High;
spiInit.SPI_CPHA = SPI_CPHA_2Edge; spiInit.SPI_CPHA = SPI_CPHA_2Edge;
} }
#ifdef STM32F303xC #ifdef STM32F303xC
// Configure for 8-bit reads. // Configure for 8-bit reads.
SPI_RxFIFOThresholdConfig(spi->dev, SPI_RxFIFOThreshold_QF); SPI_RxFIFOThresholdConfig(spi->dev, SPI_RxFIFOThreshold_QF);
#endif #endif
SPI_Init(spi->dev, &spiInit); SPI_Init(spi->dev, &spiInit);
SPI_Cmd(spi->dev, ENABLE); SPI_Cmd(spi->dev, ENABLE);
if (spi->nss) if (spi->nss)
IOHi(IOGetByTag(spi->nss)); IOHi(IOGetByTag(spi->nss));
} }
bool spiInit(SPIDevice device) bool spiInit(SPIDevice device)
{ {
switch (device) switch (device)
{ {
case SPIINVALID: case SPIINVALID:
return false; return false;
case SPIDEV_1: case SPIDEV_1:
#ifdef USE_SPI_DEVICE_1 #ifdef USE_SPI_DEVICE_1
spiInitDevice(device); spiInitDevice(device);
return true; return true;
#else #else
break; break;
#endif #endif
case SPIDEV_2: case SPIDEV_2:
#ifdef USE_SPI_DEVICE_2 #ifdef USE_SPI_DEVICE_2
spiInitDevice(device); spiInitDevice(device);
return true; return true;
#else #else
break; break;
#endif #endif
case SPIDEV_3: case SPIDEV_3:
#if defined(USE_SPI_DEVICE_3) && (defined(STM32F303xC) || defined(STM32F4)) #if defined(USE_SPI_DEVICE_3) && (defined(STM32F303xC) || defined(STM32F4))
spiInitDevice(device); spiInitDevice(device);
return true; return true;
#else #else
break; break;
#endif #endif
} }
return false; return false;
} }
uint32_t spiTimeoutUserCallback(SPI_TypeDef *instance) uint32_t spiTimeoutUserCallback(SPI_TypeDef *instance)
{ {
SPIDevice device = spiDeviceByInstance(instance); SPIDevice device = spiDeviceByInstance(instance);
if (device == SPIINVALID) if (device == SPIINVALID)
return -1; return -1;
spiHardwareMap[device].errorCount++; spiHardwareMap[device].errorCount++;
return spiHardwareMap[device].errorCount; return spiHardwareMap[device].errorCount;
} }
// return uint8_t value or -1 when failure // return uint8_t value or -1 when failure
uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t data) uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t data)
{ {
uint16_t spiTimeout = 1000; uint16_t spiTimeout = 1000;
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET) while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET)
if ((spiTimeout--) == 0) if ((spiTimeout--) == 0)
return spiTimeoutUserCallback(instance); return spiTimeoutUserCallback(instance);
#ifdef STM32F303xC #ifdef STM32F303xC
SPI_SendData8(instance, data); SPI_SendData8(instance, data);
#else #else
SPI_I2S_SendData(instance, data); SPI_I2S_SendData(instance, data);
#endif #endif
spiTimeout = 1000; spiTimeout = 1000;
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET) while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET)
if ((spiTimeout--) == 0) if ((spiTimeout--) == 0)
return spiTimeoutUserCallback(instance); return spiTimeoutUserCallback(instance);
#ifdef STM32F303xC #ifdef STM32F303xC
return ((uint8_t)SPI_ReceiveData8(instance)); return ((uint8_t)SPI_ReceiveData8(instance));
#else #else
return ((uint8_t)SPI_I2S_ReceiveData(instance)); return ((uint8_t)SPI_I2S_ReceiveData(instance));
#endif #endif
} }
@ -244,47 +244,45 @@ uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t data)
bool spiIsBusBusy(SPI_TypeDef *instance) bool spiIsBusBusy(SPI_TypeDef *instance)
{ {
#ifdef STM32F303xC #ifdef STM32F303xC
return SPI_GetTransmissionFIFOStatus(instance) != SPI_TransmissionFIFOStatus_Empty || SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_BSY) == SET; return SPI_GetTransmissionFIFOStatus(instance) != SPI_TransmissionFIFOStatus_Empty || SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_BSY) == SET;
#else #else
return SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET || SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_BSY) == SET; return SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET || SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_BSY) == SET;
#endif #endif
} }
bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, const uint8_t *in, int len) bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, const uint8_t *in, int len)
{ {
uint16_t spiTimeout = 1000; uint16_t spiTimeout = 1000;
uint8_t b; uint8_t b;
instance->DR; instance->DR;
while (len--) { while (len--) {
b = in ? *(in++) : 0xFF; b = in ? *(in++) : 0xFF;
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET) { while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_TXE) == RESET) {
if ((spiTimeout--) == 0) if ((spiTimeout--) == 0)
return spiTimeoutUserCallback(instance); return spiTimeoutUserCallback(instance);
} }
#ifdef STM32F303xC #ifdef STM32F303xC
SPI_SendData8(instance, b); SPI_SendData8(instance, b);
//SPI_I2S_SendData16(instance, b);
#else #else
SPI_I2S_SendData(instance, b); SPI_I2S_SendData(instance, b);
#endif #endif
spiTimeout = 1000; spiTimeout = 1000;
while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET) { while (SPI_I2S_GetFlagStatus(instance, SPI_I2S_FLAG_RXNE) == RESET) {
if ((spiTimeout--) == 0) if ((spiTimeout--) == 0)
return spiTimeoutUserCallback(instance); return spiTimeoutUserCallback(instance);
} }
#ifdef STM32F303xC #ifdef STM32F303xC
b = SPI_ReceiveData8(instance); b = SPI_ReceiveData8(instance);
//b = SPI_I2S_ReceiveData16(instance);
#else #else
b = SPI_I2S_ReceiveData(instance); b = SPI_I2S_ReceiveData(instance);
#endif #endif
if (out) if (out)
*(out++) = b; *(out++) = b;
} }
return true; return true;
} }
@ -292,70 +290,70 @@ void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
{ {
#define BR_CLEAR_MASK 0xFFC7 #define BR_CLEAR_MASK 0xFFC7
uint16_t tempRegister; uint16_t tempRegister;
SPI_Cmd(instance, DISABLE); SPI_Cmd(instance, DISABLE);
tempRegister = instance->CR1; tempRegister = instance->CR1;
switch (divisor) { switch (divisor) {
case 2: case 2:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_2; tempRegister |= SPI_BaudRatePrescaler_2;
break; break;
case 4: case 4:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_4; tempRegister |= SPI_BaudRatePrescaler_4;
break; break;
case 8: case 8:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_8; tempRegister |= SPI_BaudRatePrescaler_8;
break; break;
case 16: case 16:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_16; tempRegister |= SPI_BaudRatePrescaler_16;
break; break;
case 32: case 32:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_32; tempRegister |= SPI_BaudRatePrescaler_32;
break; break;
case 64: case 64:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_64; tempRegister |= SPI_BaudRatePrescaler_64;
break; break;
case 128: case 128:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_128; tempRegister |= SPI_BaudRatePrescaler_128;
break; break;
case 256: case 256:
tempRegister &= BR_CLEAR_MASK; tempRegister &= BR_CLEAR_MASK;
tempRegister |= SPI_BaudRatePrescaler_256; tempRegister |= SPI_BaudRatePrescaler_256;
break; break;
} }
instance->CR1 = tempRegister; instance->CR1 = tempRegister;
SPI_Cmd(instance, ENABLE); SPI_Cmd(instance, ENABLE);
} }
uint16_t spiGetErrorCounter(SPI_TypeDef *instance) uint16_t spiGetErrorCounter(SPI_TypeDef *instance)
{ {
SPIDevice device = spiDeviceByInstance(instance); SPIDevice device = spiDeviceByInstance(instance);
if (device == SPIINVALID) if (device == SPIINVALID)
return 0; return 0;
return spiHardwareMap[device].errorCount; return spiHardwareMap[device].errorCount;
} }
void spiResetErrorCounter(SPI_TypeDef *instance) void spiResetErrorCounter(SPI_TypeDef *instance)
{ {
SPIDevice device = spiDeviceByInstance(instance); SPIDevice device = spiDeviceByInstance(instance);
if (device != SPIINVALID) if (device != SPIINVALID)
spiHardwareMap[device].errorCount = 0; spiHardwareMap[device].errorCount = 0;
} }

View file

@ -40,7 +40,7 @@
#if defined(STM32F4) #if defined(STM32F4)
#define SPI_SLOW_CLOCK 128 //00.65625 MHz #define SPI_SLOW_CLOCK 128 //00.65625 MHz
#define SPI_STANDARD_CLOCK 16 //05.25000 MHz #define SPI_STANDARD_CLOCK 8 //10.50000 MHz
#define SPI_FAST_CLOCK 4 //21.00000 MHz #define SPI_FAST_CLOCK 4 //21.00000 MHz
#define SPI_ULTRAFAST_CLOCK 2 //42.00000 MHz #define SPI_ULTRAFAST_CLOCK 2 //42.00000 MHz
#else #else