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https://github.com/betaflight/betaflight.git
synced 2025-07-16 04:45:24 +03:00
Move some clock initialisation code into the drivers.
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parent
b07a284f4e
commit
16528cf0d9
6 changed files with 29 additions and 18 deletions
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@ -68,8 +68,11 @@ void adcInit(drv_adc_config_t *init)
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adcConfig[ADC_CURRENT].sampleTime = ADC_SampleTime_239Cycles5;
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}
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
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// FIXME ADC driver assumes all the GPIO was already placed in 'AIN' mode
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// ADC driver assumes all the GPIO was already placed in 'AIN' mode
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DMA_DeInit(DMA1_Channel1);
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dma.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;
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dma.DMA_MemoryBaseAddr = (uint32_t)adcValues;
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@ -52,6 +52,11 @@ void adcInit(drv_adc_config_t *init)
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adcConfig[ADC_EXTERNAL1].enabled = true;
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adcChannelCount++;
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RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div256); // 72 MHz divided by 256 = 281.25 kHz
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_ADC12, ENABLE);
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// FIXME ADC driver assumes all the GPIO was already placed in 'AIN' mode
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DMA_DeInit(DMA1_Channel1);
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DMA_StructInit(&DMA_InitStructure);
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@ -266,6 +266,8 @@ void i2cInit(I2C_TypeDef *I2C)
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I2C_InitTypeDef i2c;
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gpio_config_t gpio;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2 | RCC_APB2Periph_GPIOB, ENABLE);
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// Init pins
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gpio.pin = Pin_10 | Pin_11;
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gpio.speed = Speed_2MHz;
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@ -50,6 +50,8 @@ uartPort_t *serialUSART1(uint32_t baudRate, portMode_t mode)
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s->txDMAChannel = DMA1_Channel4;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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// USART1_TX PA9
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// USART1_RX PA10
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gpio.speed = Speed_2MHz;
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@ -97,6 +99,8 @@ uartPort_t *serialUSART2(uint32_t baudRate, portMode_t mode)
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s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->DR;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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// USART2_TX PA2
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// USART2_RX PA3
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gpio.speed = Speed_2MHz;
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@ -73,6 +73,9 @@ uartPort_t *serialUSART1(uint32_t baudRate, portMode_t mode)
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s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->RDR;
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s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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@ -137,6 +140,11 @@ uartPort_t *serialUSART2(uint32_t baudRate, portMode_t mode)
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s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR;
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#endif
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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#if defined(USE_USART2_TX_DMA) || defined(USE_USART2_RX_DMA)
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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#endif
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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@ -81,21 +81,13 @@ void systemInit(bool overclock)
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// Turn on clocks for stuff we use
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#ifdef STM32F10X_MD
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 | RCC_APB1Periph_I2C2, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_TIM1 | RCC_APB2Periph_ADC1 | RCC_APB2Periph_USART1, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_TIM1, ENABLE);
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#endif
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#ifdef STM32F303xC
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RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div256); // 72 MHz divided by 256 = 281.25 kHz
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RCC_APB1PeriphClockCmd(
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RCC_APB1Periph_TIM2 |
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RCC_APB1Periph_TIM3 |
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RCC_APB1Periph_TIM4 |
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RCC_APB1Periph_I2C2 |
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RCC_APB1Periph_USART2,
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ENABLE
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);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4, ENABLE);
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RCC_APB2PeriphClockCmd(
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RCC_APB2Periph_TIM1 |
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RCC_APB2Periph_TIM8 |
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@ -103,21 +95,18 @@ void systemInit(bool overclock)
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RCC_APB2Periph_TIM15 |
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#endif
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RCC_APB2Periph_TIM16 |
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RCC_APB2Periph_TIM17 |
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RCC_APB2Periph_USART1,
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RCC_APB2Periph_TIM17,
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ENABLE
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);
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RCC_AHBPeriphClockCmd(
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RCC_AHBPeriph_DMA1 |
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RCC_AHBPeriph_GPIOA |
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RCC_AHBPeriph_GPIOB |
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RCC_AHBPeriph_GPIOC |
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RCC_AHBPeriph_GPIOD |
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RCC_AHBPeriph_GPIOE |
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#ifdef CHEBUZZF3
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RCC_AHBPeriph_GPIOF |
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#endif
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RCC_AHBPeriph_ADC12,
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RCC_AHBPeriph_GPIOE,
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ENABLE
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);
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#endif
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