mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-23 08:15:30 +03:00
squash betaflightF7
Parts and driver boost from @npsm
This commit is contained in:
Sami Korhonen
parent
bd452b58b8
commit
1f8805cdf0
54 changed files with 7756 additions and 41 deletions
566
src/main/drivers/serial_uart_stm32f7xx.c
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566
src/main/drivers/serial_uart_stm32f7xx.c
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@ -0,0 +1,566 @@
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/*
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* This file is part of Cleanflight.
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*
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* Cleanflight is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Cleanflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "platform.h"
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#include "system.h"
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#include "io.h"
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#include "rcc.h"
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#include "nvic.h"
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#include "dma.h"
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#include "serial.h"
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#include "serial_uart.h"
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#include "serial_uart_impl.h"
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static void handleUsartTxDma(uartPort_t *s);
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#define UART_RX_BUFFER_SIZE UART1_RX_BUFFER_SIZE
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#define UART_TX_BUFFER_SIZE UART1_TX_BUFFER_SIZE
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typedef enum UARTDevice {
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UARTDEV_1 = 0,
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UARTDEV_2 = 1,
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UARTDEV_3 = 2,
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UARTDEV_4 = 3,
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UARTDEV_5 = 4,
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UARTDEV_6 = 5,
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UARTDEV_7 = 6,
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UARTDEV_8 = 7
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} UARTDevice;
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typedef struct uartDevice_s {
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USART_TypeDef* dev;
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uartPort_t port;
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uint32_t DMAChannel;
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DMA_Stream_TypeDef *txDMAStream;
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DMA_Stream_TypeDef *rxDMAStream;
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ioTag_t rx;
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ioTag_t tx;
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volatile uint8_t rxBuffer[UART_RX_BUFFER_SIZE];
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volatile uint8_t txBuffer[UART_TX_BUFFER_SIZE];
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uint32_t rcc_ahb1;
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rccPeriphTag_t rcc_apb2;
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rccPeriphTag_t rcc_apb1;
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uint8_t af;
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uint8_t txIrq;
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uint8_t rxIrq;
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uint32_t txPriority;
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uint32_t rxPriority;
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} uartDevice_t;
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//static uartPort_t uartPort[MAX_UARTS];
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#ifdef USE_UART1
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static uartDevice_t uart1 =
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{
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.DMAChannel = DMA_CHANNEL_4,
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.txDMAStream = DMA2_Stream7,
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#ifdef USE_UART1_RX_DMA
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.rxDMAStream = DMA2_Stream5,
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#endif
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.dev = USART1,
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.rx = IO_TAG(UART1_RX_PIN),
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.tx = IO_TAG(UART1_TX_PIN),
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.af = GPIO_AF7_USART1,
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#ifdef UART1_AHB1_PERIPHERALS
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.rcc_ahb1 = UART1_AHB1_PERIPHERALS,
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#endif
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.rcc_apb2 = RCC_APB2(USART1),
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.txIrq = DMA2_ST7_HANDLER,
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.rxIrq = USART1_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART1_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART1
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};
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#endif
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#ifdef USE_UART2
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static uartDevice_t uart2 =
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{
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.DMAChannel = DMA_CHANNEL_4,
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#ifdef USE_UART2_RX_DMA
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.rxDMAStream = DMA1_Stream5,
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#endif
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.txDMAStream = DMA1_Stream6,
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.dev = USART2,
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.rx = IO_TAG(UART2_RX_PIN),
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.tx = IO_TAG(UART2_TX_PIN),
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.af = GPIO_AF7_USART2,
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#ifdef UART2_AHB1_PERIPHERALS
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.rcc_ahb1 = UART2_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(USART2),
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.txIrq = DMA1_ST6_HANDLER,
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.rxIrq = USART2_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART2_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART2
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};
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#endif
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#ifdef USE_UART3
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static uartDevice_t uart3 =
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{
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.DMAChannel = DMA_CHANNEL_4,
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#ifdef USE_UART3_RX_DMA
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.rxDMAStream = DMA1_Stream1,
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#endif
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.txDMAStream = DMA1_Stream3,
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.dev = USART3,
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.rx = IO_TAG(UART3_RX_PIN),
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.tx = IO_TAG(UART3_TX_PIN),
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.af = GPIO_AF7_USART3,
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#ifdef UART3_AHB1_PERIPHERALS
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.rcc_ahb1 = UART3_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(USART3),
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.txIrq = DMA1_ST3_HANDLER,
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.rxIrq = USART3_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART3_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART3
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};
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#endif
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#ifdef USE_UART4
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static uartDevice_t uart4 =
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{
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.DMAChannel = DMA_CHANNEL_4,
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#ifdef USE_UART1_RX_DMA
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.rxDMAStream = DMA1_Stream2,
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#endif
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.txDMAStream = DMA1_Stream4,
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.dev = UART4,
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.rx = IO_TAG(UART4_RX_PIN),
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.tx = IO_TAG(UART4_TX_PIN),
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.af = GPIO_AF8_UART4,
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#ifdef UART4_AHB1_PERIPHERALS
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.rcc_ahb1 = UART4_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(UART4),
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.txIrq = DMA1_ST4_HANDLER,
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.rxIrq = UART4_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART4_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART4
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};
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#endif
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#ifdef USE_UART5
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static uartDevice_t uart5 =
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{
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.DMAChannel = DMA_CHANNEL_4,
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#ifdef USE_UART1_RX_DMA
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.rxDMAStream = DMA1_Stream0,
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#endif
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.txDMAStream = DMA2_Stream7,
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.dev = UART5,
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.rx = IO_TAG(UART5_RX_PIN),
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.tx = IO_TAG(UART5_TX_PIN),
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.af = GPIO_AF8_UART5,
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#ifdef UART5_AHB1_PERIPHERALS
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.rcc_ahb1 = UART5_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(UART5),
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.txIrq = DMA2_ST7_HANDLER,
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.rxIrq = UART5_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART5_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART5
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};
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#endif
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#ifdef USE_UART6
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static uartDevice_t uart6 =
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{
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.DMAChannel = DMA_CHANNEL_5,
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#ifdef USE_UART6_RX_DMA
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.rxDMAStream = DMA2_Stream1,
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#endif
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.txDMAStream = DMA2_Stream6,
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.dev = USART6,
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.rx = IO_TAG(UART6_RX_PIN),
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.tx = IO_TAG(UART6_TX_PIN),
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.af = GPIO_AF8_USART6,
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#ifdef UART6_AHB1_PERIPHERALS
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.rcc_ahb1 = UART6_AHB1_PERIPHERALS,
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#endif
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.rcc_apb2 = RCC_APB2(USART6),
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.txIrq = DMA2_ST6_HANDLER,
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.rxIrq = USART6_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART6_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART6
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};
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#endif
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#ifdef USE_UART7
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static uartDevice_t uart7 =
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{
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.DMAChannel = DMA_CHANNEL_5,
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#ifdef USE_UART7_RX_DMA
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.rxDMAStream = DMA1_Stream3,
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#endif
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.txDMAStream = DMA1_Stream1,
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.dev = UART7,
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.rx = IO_TAG(UART7_RX_PIN),
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.tx = IO_TAG(UART7_TX_PIN),
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.af = GPIO_AF8_UART7,
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#ifdef UART7_AHB1_PERIPHERALS
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.rcc_ahb1 = UART7_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(UART7),
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.txIrq = DMA1_ST1_HANDLER,
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.rxIrq = UART7_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART7_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART7
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};
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#endif
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#ifdef USE_UART8
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static uartDevice_t uart8 =
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{
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.DMAChannel = DMA_CHANNEL_5,
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#ifdef USE_UART8_RX_DMA
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.rxDMAStream = DMA1_Stream6,
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#endif
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.txDMAStream = DMA1_Stream0,
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.dev = UART8,
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.rx = IO_TAG(UART6_RX_PIN),
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.tx = IO_TAG(UART6_TX_PIN),
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.af = GPIO_AF8_UART8,
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#ifdef UART8_AHB1_PERIPHERALS
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.rcc_ahb1 = UART8_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(UART8),
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.txIrq = DMA1_ST0_HANDLER,
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.rxIrq = UART8_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART8_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART8
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};
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#endif
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static uartDevice_t* uartHardwareMap[] = {
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#ifdef USE_UART1
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&uart1,
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#else
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NULL,
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#endif
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#ifdef USE_UART2
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&uart2,
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#else
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NULL,
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#endif
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#ifdef USE_UART3
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&uart3,
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#else
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NULL,
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#endif
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#ifdef USE_UART4
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&uart4,
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#else
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NULL,
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#endif
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#ifdef USE_UART5
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&uart5,
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#else
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NULL,
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#endif
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#ifdef USE_UART6
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&uart6,
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#else
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NULL,
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#endif
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#ifdef USE_UART7
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&uart7,
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#else
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NULL,
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#endif
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#ifdef USE_UART8
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&uart8,
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#else
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NULL,
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#endif
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};
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void uartIrqHandler(uartPort_t *s)
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{
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/// TODO: This implmentation is kind of a hack to reduce overhead otherwise generated by the HAL, there might be a better solution
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if (!s->rxDMAStream && (s->Handle.RxXferSize != s->Handle.RxXferCount)) {
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if (s->port.callback) {
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// The HAL has already stored the last received byte in the receive buffer we have tell it where to put the next
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s->port.callback(s->USARTx->RDR);
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s->Handle.pRxBuffPtr = (uint8_t *)s->port.rxBuffer;
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} else {
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// The HAL has already stored the last received byte in the receive buffer we have tell it where to put the next
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s->port.rxBufferHead = (s->port.rxBufferHead + 1) % s->port.rxBufferSize;
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s->Handle.pRxBuffPtr = (uint8_t *)&s->port.rxBuffer[s->port.rxBufferHead];
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}
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// We override the rx transfer counter to keep it going without disabling interrupts
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s->Handle.RxXferCount = s->Handle.RxXferSize;
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uint32_t errorcode = HAL_UART_GetError(&s->Handle);
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if(errorcode != HAL_UART_ERROR_NONE)
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{
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if(!s->rxDMAStream)
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{
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HAL_UART_Receive_IT(&s->Handle, (uint8_t *)s->port.rxBuffer, s->port.rxBufferSize);
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}
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else
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{
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HAL_UART_Receive_DMA(&s->Handle, (uint8_t *)s->port.rxBuffer, s->port.rxBufferSize);
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}
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}
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}
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if (!s->txDMAStream && (s->Handle.TxXferCount == 0)) {
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if (s->port.txBufferTail != s->port.txBufferHead) {
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// very inefficient but will most likely never be used anyway as TX dma is enabled by default.
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HAL_UART_Transmit_IT(&s->Handle, (uint8_t *)&s->port.txBuffer[s->port.txBufferTail], 1);
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s->port.txBufferTail = (s->port.txBufferTail + 1) % s->port.txBufferSize;
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}
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}
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else if(s->txDMAStream && (s->Handle.TxXferCount == 0) && (s->Handle.TxXferSize != 0))
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{
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handleUsartTxDma(s);
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}
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}
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static void handleUsartTxDma(uartPort_t *s)
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{
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if (s->port.txBufferHead != s->port.txBufferTail)
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uartStartTxDMA(s);
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else
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{
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s->txDMAEmpty = true;
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s->Handle.TxXferSize = 0;
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}
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}
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void dmaIRQHandler(dmaChannelDescriptor_t* descriptor)
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{
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uartPort_t *s = &(((uartDevice_t*)(descriptor->userParam))->port);
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HAL_DMA_IRQHandler(&s->txDMAHandle);
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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DMA_CLEAR_FLAG(descriptor, DMA_IT_HTIF);
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_FEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_FEIF);
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}
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handleUsartTxDma(s);
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}
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TEIF);
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}
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_DMEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_DMEIF);
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}
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}
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uartPort_t *serialUART(UARTDevice device, uint32_t baudRate, portMode_t mode, portOptions_t options)
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{
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uartPort_t *s;
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uartDevice_t *uart = uartHardwareMap[device];
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if (!uart) return NULL;
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s = &(uart->port);
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s->port.vTable = uartVTable;
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s->port.baudRate = baudRate;
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s->port.rxBuffer = uart->rxBuffer;
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s->port.txBuffer = uart->txBuffer;
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s->port.rxBufferSize = sizeof(uart->rxBuffer);
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s->port.txBufferSize = sizeof(uart->txBuffer);
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s->USARTx = uart->dev;
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if (uart->rxDMAStream) {
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s->rxDMAChannel = uart->DMAChannel;
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s->rxDMAStream = uart->rxDMAStream;
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}
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s->txDMAChannel = uart->DMAChannel;
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s->txDMAStream = uart->txDMAStream;
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|
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s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR;
|
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s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->RDR;
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|
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s->Handle.Instance = uart->dev;
|
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|
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IO_t tx = IOGetByTag(uart->tx);
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IO_t rx = IOGetByTag(uart->rx);
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// clocks
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if (options & SERIAL_BIDIR) {
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IOInit(tx, OWNER_SERIAL, RESOURCE_UART_TXRX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(tx, IOCFG_AF_OD, uart->af);
|
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}
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else {
|
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if (mode & MODE_TX) {
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IOInit(tx, OWNER_SERIAL, RESOURCE_UART_TX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(tx, IOCFG_AF_PP, uart->af);
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}
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if (mode & MODE_RX) {
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IOInit(rx, OWNER_SERIAL, RESOURCE_UART_RX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(rx, IOCFG_AF_PP, uart->af);
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}
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}
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// DMA TX Interrupt
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dmaSetHandler(uart->txIrq, dmaIRQHandler, uart->txPriority, (uint32_t)uart);
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//HAL_NVIC_SetPriority(uart->txIrq, NVIC_PRIORITY_BASE(uart->txPriority), NVIC_PRIORITY_SUB(uart->txPriority));
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//HAL_NVIC_EnableIRQ(uart->txIrq);
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if(!s->rxDMAChannel)
|
||||
{
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HAL_NVIC_SetPriority(uart->rxIrq, NVIC_PRIORITY_BASE(uart->rxPriority), NVIC_PRIORITY_SUB(uart->rxPriority));
|
||||
HAL_NVIC_EnableIRQ(uart->rxIrq);
|
||||
}
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|
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return s;
|
||||
}
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||||
|
||||
#ifdef USE_UART1
|
||||
uartPort_t *serialUART1(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_1, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// USART1 Rx/Tx IRQ Handler
|
||||
void USART1_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_1]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART2
|
||||
uartPort_t *serialUART2(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_2, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// USART2 Rx/Tx IRQ Handler
|
||||
void USART2_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_2]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART3
|
||||
uartPort_t *serialUART3(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_3, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// USART3 Rx/Tx IRQ Handler
|
||||
void USART3_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_3]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART4
|
||||
uartPort_t *serialUART4(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_4, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// UART4 Rx/Tx IRQ Handler
|
||||
void UART4_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_4]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART5
|
||||
uartPort_t *serialUART5(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_5, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// UART5 Rx/Tx IRQ Handler
|
||||
void UART5_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_5]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART6
|
||||
uartPort_t *serialUART6(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_6, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// USART6 Rx/Tx IRQ Handler
|
||||
void USART6_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_6]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART7
|
||||
uartPort_t *serialUART7(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_7, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// UART7 Rx/Tx IRQ Handler
|
||||
void UART7_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_7]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_UART8
|
||||
uartPort_t *serialUART8(uint32_t baudRate, portMode_t mode, portOptions_t options)
|
||||
{
|
||||
return serialUART(UARTDEV_8, baudRate, mode, options);
|
||||
}
|
||||
|
||||
// UART8 Rx/Tx IRQ Handler
|
||||
void UART8_IRQHandler(void)
|
||||
{
|
||||
uartPort_t *s = &(uartHardwareMap[UARTDEV_8]->port);
|
||||
HAL_UART_IRQHandler(&s->Handle);
|
||||
uartIrqHandler(s);
|
||||
}
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue