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Add UART9/10 support.

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* UART9 was supported as LPUART on some H7s.
* Newer 100-pin H7 CPUs support UART9 and USART10.
* 100+ pin devices support higher numbered UARTS than UART10.

Use USE_LPUART instead of hacking into UART9 for clarity.

* LPUARTS are different from other types of UARTS.
* They need different ID ranges.
* They have and different capabilities.
* Renumber LPUART1 to 40.

0-19 reserved for UART1-20
40-49 onwards for LPUART instances.

It makes sense to treat them as a different class of UART.  Just like we
do for softserial, vcp, etc.
This commit is contained in:
Dominic Clifton 2021-04-21 21:38:16 +02:00
parent 025ee87a7a
commit 263c5fa373
15 changed files with 201 additions and 26 deletions
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10
docs/Serial.md
View file

@ -85,10 +85,18 @@ Note: for Identifier see serialPortIdentifier_e in the source; for Function bitm
| SERIAL_PORT_USART6 | 5 |
| SERIAL_PORT_USART7 | 6 |
| SERIAL_PORT_USART8 | 7 |
| SERIAL_PORT_LPUART1 | 8 |
| SERIAL_PORT_UART9 | 8 |
| SERIAL_PORT_USART10 | 9 |
| SERIAL_PORT_USB_VCP | 20 |
| SERIAL_PORT_SOFTSERIAL1 | 30 |
| SERIAL_PORT_SOFTSERIAL2 | 31 |
| SERIAL_PORT_LPUART1 | 40 |
ID's 0-19 reserved for UARTS 1-20
ID's 20-29 reserved for USB 1-10
ID's 30-39 reserved for SoftSerial 1-10
ID's 40-49 reserved for LPUART 1-10
Other devices can be added starting from id 50.
### 2. Serial Port Function

9
src/main/drivers/nvic.h
View file

@ -56,6 +56,15 @@
#define NVIC_PRIO_SERIALUART8_TXDMA NVIC_BUILD_PRIORITY(1, 0)
#define NVIC_PRIO_SERIALUART8_RXDMA NVIC_BUILD_PRIORITY(1, 1)
#define NVIC_PRIO_SERIALUART8 NVIC_BUILD_PRIORITY(1, 2)
#define NVIC_PRIO_SERIALUART9_TXDMA NVIC_BUILD_PRIORITY(1, 0)
#define NVIC_PRIO_SERIALUART9_RXDMA NVIC_BUILD_PRIORITY(1, 1)
#define NVIC_PRIO_SERIALUART9 NVIC_BUILD_PRIORITY(1, 2)
#define NVIC_PRIO_SERIALUART10_TXDMA NVIC_BUILD_PRIORITY(1, 0)
#define NVIC_PRIO_SERIALUART10_RXDMA NVIC_BUILD_PRIORITY(1, 1)
#define NVIC_PRIO_SERIALUART10 NVIC_BUILD_PRIORITY(1, 2)
#define NVIC_PRIO_SERIALLPUART1_TXDMA NVIC_BUILD_PRIORITY(1, 0)
#define NVIC_PRIO_SERIALLPUART1_RXDMA NVIC_BUILD_PRIORITY(1, 1)
#define NVIC_PRIO_SERIALLPUART1 NVIC_BUILD_PRIORITY(1, 2)
#define NVIC_PRIO_I2C_ER NVIC_BUILD_PRIORITY(0, 0)
#define NVIC_PRIO_I2C_EV NVIC_BUILD_PRIORITY(0, 0)
#define NVIC_PRIO_USB NVIC_BUILD_PRIORITY(2, 0)

32
src/main/drivers/serial_pinconfig.c
View file

@ -217,6 +217,30 @@
# endif
#endif
#ifdef USE_UART10
# if !defined(UART10_RX_PIN)
# define UART10_RX_PIN NONE
# endif
# if !defined(UART10_TX_PIN)
# define UART10_TX_PIN NONE
# endif
# if !defined(INVERTER_PIN_UART10)
# define INVERTER_PIN_UART10 NONE
# endif
#endif
#ifdef USE_LPUART1
# if !defined(LPUART1_RX_PIN)
# define LPUART1_RX_PIN NONE
# endif
# if !defined(LPUART1_TX_PIN)
# define LPUART1_TX_PIN NONE
# endif
# if !defined(INVERTER_PIN_LPUART1)
# define INVERTER_PIN_LPUART1 NONE
# endif
#endif
#ifdef USE_SOFTSERIAL1
# if !defined(SOFTSERIAL1_RX_PIN)
# define SOFTSERIAL1_RX_PIN NONE
@ -267,7 +291,13 @@ static const serialDefaultPin_t serialDefaultPin[] = {
{ SERIAL_PORT_USART8, IO_TAG(UART8_RX_PIN), IO_TAG(UART8_TX_PIN), IO_TAG(INVERTER_PIN_UART8) },
#endif
#ifdef USE_UART9
{ SERIAL_PORT_LPUART1, IO_TAG(UART9_RX_PIN), IO_TAG(UART9_TX_PIN), IO_TAG(INVERTER_PIN_UART9) },
{ SERIAL_PORT_UART9, IO_TAG(UART9_RX_PIN), IO_TAG(UART9_TX_PIN), IO_TAG(INVERTER_PIN_UART9) },
#endif
#ifdef USE_UART10
{ SERIAL_PORT_USART10, IO_TAG(UART10_RX_PIN), IO_TAG(UART10_TX_PIN), IO_TAG(INVERTER_PIN_UART10) },
#endif
#ifdef USE_LPUART1
{ SERIAL_PORT_LPUART1, IO_TAG(LPUART1_RX_PIN), IO_TAG(LPUART1_TX_PIN), IO_TAG(INVERTER_PIN_LPUART1) },
#endif
#ifdef USE_SOFTSERIAL1
{ SERIAL_PORT_SOFTSERIAL1, IO_TAG(SOFTSERIAL1_RX_PIN), IO_TAG(SOFTSERIAL1_TX_PIN), IO_TAG(NONE) },

12
src/main/drivers/serial_uart.c
View file

@ -65,6 +65,10 @@
UART_BUFFER(UART_TX_BUFFER_ATTRIBUTE, n, T); \
UART_BUFFER(UART_RX_BUFFER_ATTRIBUTE, n, R); struct dummy_s
#define LPUART_BUFFERS(n) \
LPUART_BUFFER(UART_TX_BUFFER_ATTRIBUTE, n, T); \
LPUART_BUFFER(UART_RX_BUFFER_ATTRIBUTE, n, R); struct dummy_s
#ifdef USE_UART1
UART_BUFFERS(1);
#endif
@ -101,6 +105,14 @@ UART_BUFFERS(8);
UART_BUFFERS(9);
#endif
#ifdef USE_UART10
UART_BUFFERS(10);
#endif
#ifdef USE_LPUART1
LPUART_BUFFERS(1);
#endif
#undef UART_BUFFERS
serialPort_t *uartOpen(UARTDevice_e device, serialReceiveCallbackPtr rxCallback, void *rxCallbackData, uint32_t baudRate, portMode_e mode, portOptions_e options)

2
src/main/drivers/serial_uart.h
View file

@ -39,6 +39,8 @@ typedef enum {
UARTDEV_7 = 6,
UARTDEV_8 = 7,
UARTDEV_9 = 8,
UARTDEV_10 = 9,
LPUARTDEV_1 = 10,
} UARTDevice_e;
typedef struct uartPort_s {

28
src/main/drivers/serial_uart_impl.h
View file

@ -152,7 +152,19 @@
#define UARTDEV_COUNT_9 0
#endif
#define UARTDEV_COUNT (UARTDEV_COUNT_1 + UARTDEV_COUNT_2 + UARTDEV_COUNT_3 + UARTDEV_COUNT_4 + UARTDEV_COUNT_5 + UARTDEV_COUNT_6 + UARTDEV_COUNT_7 + UARTDEV_COUNT_8 + UARTDEV_COUNT_9)
#ifdef USE_UART10
#define UARTDEV_COUNT_10 1
#else
#define UARTDEV_COUNT_10 0
#endif
#ifdef USE_LPUART1
#define LPUARTDEV_COUNT_1 1
#else
#define LPUARTDEV_COUNT_1 0
#endif
#define UARTDEV_COUNT (UARTDEV_COUNT_1 + UARTDEV_COUNT_2 + UARTDEV_COUNT_3 + UARTDEV_COUNT_4 + UARTDEV_COUNT_5 + UARTDEV_COUNT_6 + UARTDEV_COUNT_7 + UARTDEV_COUNT_8 + UARTDEV_COUNT_9 + UARTDEV_COUNT_10 + LPUARTDEV_COUNT_1)
typedef struct uartPinDef_s {
ioTag_t pin;
@ -242,6 +254,12 @@ void uartDmaIrqHandler(dmaChannelDescriptor_t* descriptor);
UART_BUFFER(extern, n, R); \
UART_BUFFER(extern, n, T); struct dummy_s
#define LPUART_BUFFER(type, n, rxtx) type volatile uint8_t lpuart ## n ## rxtx ## xBuffer[UART_ ## rxtx ## X_BUFFER_SIZE]
#define LPUART_BUFFERS_EXTERN(n) \
LPUART_BUFFER(extern, n, R); \
LPUART_BUFFER(extern, n, T); struct dummy_s
#ifdef USE_UART1
UART_BUFFERS_EXTERN(1);
#endif
@ -278,4 +296,12 @@ UART_BUFFERS_EXTERN(8);
UART_BUFFERS_EXTERN(9);
#endif
#ifdef USE_UART10
UART_BUFFERS_EXTERN(10);
#endif
#ifdef USE_LPUART1
LPUART_BUFFERS_EXTERN(1);
#endif
#undef UART_BUFFERS_EXTERN

80
src/main/drivers/serial_uart_stm32h7xx.c
View file

@ -87,6 +87,18 @@
#ifndef UART8_RX_DMA_STREAM
#define UART8_RX_DMA_STREAM NULL
#endif
#ifndef UART9_TX_DMA_STREAM
#define UART9_TX_DMA_STREAM NULL
#endif
#ifndef UART9_RX_DMA_STREAM
#define UART9_RX_DMA_STREAM NULL
#endif
#ifndef UART10_TX_DMA_STREAM
#define UART10_TX_DMA_STREAM NULL
#endif
#ifndef UART10_RX_DMA_STREAM
#define UART10_RX_DMA_STREAM NULL
#endif
const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART1
@ -336,9 +348,62 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#endif
#ifdef USE_UART9
// On H7, UART9 is implemented with LPUART1
{
.device = UARTDEV_9,
.reg = UART9,
#ifdef USE_DMA
.rxDMAChannel = DMA_REQUEST_UART9_RX,
.rxDMAResource = (dmaResource_t *)UART9_RX_DMA_STREAM,
.txDMAChannel = DMA_REQUEST_UART9_TX,
.txDMAResource = (dmaResource_t *)UART9_TX_DMA_STREAM,
#endif
.rxPins = {
{ DEFIO_TAG_E(PD14), GPIO_AF11_UART9 }
},
.txPins = {
{ DEFIO_TAG_E(PD15), GPIO_AF11_UART9 }
},
.rcc = RCC_APB2(UART9),
.rxIrq = UART9_IRQn,
.txPriority = NVIC_PRIO_SERIALUART9_TXDMA,
.rxPriority = NVIC_PRIO_SERIALUART9,
.txBuffer = uart9TxBuffer,
.rxBuffer = uart9RxBuffer,
.txBufferSize = sizeof(uart9TxBuffer),
.rxBufferSize = sizeof(uart9RxBuffer),
},
#endif
#ifdef USE_UART10
{
.device = UARTDEV_10,
.reg = USART10,
#ifdef USE_DMA
.rxDMAChannel = DMA_REQUEST_USART10_RX,
.rxDMAResource = (dmaResource_t *)UART10_RX_DMA_STREAM,
.txDMAChannel = DMA_REQUEST_USART10_TX,
.txDMAResource = (dmaResource_t *)UART10_TX_DMA_STREAM,
#endif
.rxPins = {
{ DEFIO_TAG_E(PE2), GPIO_AF11_USART10 }
},
.txPins = {
{ DEFIO_TAG_E(PE3), GPIO_AF11_USART10 }
},
.rcc = RCC_APB2(USART10),
.rxIrq = USART10_IRQn,
.txPriority = NVIC_PRIO_SERIALUART10_TXDMA,
.rxPriority = NVIC_PRIO_SERIALUART10,
.txBuffer = uart10TxBuffer,
.rxBuffer = uart10RxBuffer,
.txBufferSize = sizeof(uart10TxBuffer),
.rxBufferSize = sizeof(uart10RxBuffer),
},
#endif
#ifdef USE_LPUART1
{
.device = LPUARTDEV_1,
.reg = LPUART1,
#ifdef USE_DMA
.rxDMAChannel = BDMA_REQUEST_LPUART1_RX,
@ -356,14 +421,15 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
},
.rcc = RCC_APB4(LPUART1),
.rxIrq = LPUART1_IRQn,
.txPriority = NVIC_PRIO_SERIALUART8_TXDMA, // Not used until DMA is supported
.rxPriority = NVIC_PRIO_SERIALUART8, // Not used until DMA is supported
.txBuffer = uart9TxBuffer,
.rxBuffer = uart9RxBuffer,
.txBufferSize = sizeof(uart9TxBuffer),
.rxBufferSize = sizeof(uart9RxBuffer),
.txPriority = NVIC_PRIO_SERIALLPUART1_TXDMA, // Not used until DMA is supported
.rxPriority = NVIC_PRIO_SERIALLPUART1, // Not used until DMA is supported
.txBuffer = lpuart1TxBuffer,
.rxBuffer = lpuart1RxBuffer,
.txBufferSize = sizeof(lpuart1TxBuffer),
.rxBufferSize = sizeof(lpuart1RxBuffer),
},
#endif
};
// XXX Should serialUART be consolidated?

10
src/main/io/serial.c
View file

@ -94,7 +94,10 @@ const serialPortIdentifier_e serialPortIdentifiers[SERIAL_PORT_COUNT] = {
SERIAL_PORT_USART8,
#endif
#ifdef USE_UART9
SERIAL_PORT_LPUART1,
SERIAL_PORT_UART9_INSTANCE,
#endif
#ifdef USE_UART10
SERIAL_PORT_UART10_INSTANCE,
#endif
#ifdef USE_SOFTSERIAL1
SERIAL_PORT_SOFTSERIAL1,
@ -395,7 +398,10 @@ serialPort_t *openSerialPort(
case SERIAL_PORT_USART8:
#endif
#ifdef USE_UART9
case SERIAL_PORT_LPUART1:
case SERIAL_PORT_UART9:
#endif
#ifdef USE_UART10
case SERIAL_PORT_USART10:
#endif
#if defined(SIMULATOR_BUILD)
// emulate serial ports over TCP

6
src/main/io/serial.h
View file

@ -88,11 +88,13 @@ typedef enum {
SERIAL_PORT_USART6,
SERIAL_PORT_USART7,
SERIAL_PORT_USART8,
SERIAL_PORT_LPUART1,
SERIAL_PORT_UART9,
SERIAL_PORT_USART10,
SERIAL_PORT_USB_VCP = 20,
SERIAL_PORT_SOFTSERIAL1 = 30,
SERIAL_PORT_SOFTSERIAL2,
SERIAL_PORT_IDENTIFIER_MAX = SERIAL_PORT_SOFTSERIAL2,
SERIAL_PORT_LPUART1 = 40,
SERIAL_PORT_IDENTIFIER_MAX = SERIAL_PORT_LPUART1,
} serialPortIdentifier_e;
extern const serialPortIdentifier_e serialPortIdentifiers[SERIAL_PORT_COUNT];

3
src/main/pg/serial_uart.c
View file

@ -71,6 +71,9 @@ static uartDmaopt_t uartDmaopt[] = {
#ifdef USE_UART9
{ UARTDEV_9, UART9_TX_DMA_OPT, UART9_RX_DMA_OPT },
#endif
#ifdef USE_UART10
{ UARTDEV_10, UART10_TX_DMA_OPT, UART10_RX_DMA_OPT },
#endif
};
void pgResetFn_serialUartConfig(serialUartConfig_t *config)

6
src/main/target/NUCLEOH723ZG/target.h
View file

@ -75,9 +75,9 @@
#define UART8_RX_PIN PE0
#define UART8_TX_PIN PE1
#define USE_UART9 // LPUART1
#define UART9_RX_PIN PB7 // PA10 (Shared with UART1)
#define UART9_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_LPUART1
#define LPUART1_RX_PIN PB7 // PA10 (Shared with UART1)
#define LPUART1_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_VCP

6
src/main/target/NUCLEOH725ZG/target.h
View file

@ -84,9 +84,9 @@
#define UART8_RX_PIN PE0
#define UART8_TX_PIN PE1
#define USE_UART9 // LPUART1
#define UART9_RX_PIN PB7 // PA10 (Shared with UART1)
#define UART9_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_LPUART1
#define LPUART1_RX_PIN PB7 // PA10 (Shared with UART1)
#define LPUART1_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_VCP

6
src/main/target/NUCLEOH743/target.h
View file

@ -78,9 +78,9 @@
#define UART8_RX_PIN PE0
#define UART8_TX_PIN PE1
#define USE_UART9 // LPUART1
#define UART9_RX_PIN PB7 // PA10 (Shared with UART1)
#define UART9_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_LPUART1
#define LPUART1_RX_PIN PB7 // PA10 (Shared with UART1)
#define LPUART1_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_VCP

8
src/main/target/NUCLEOH7A3ZI/target.h
View file

@ -75,9 +75,9 @@
#define UART8_RX_PIN PE0
#define UART8_TX_PIN PE1
#define USE_UART9 // LPUART1
#define UART9_RX_PIN PB7 // PA10 (Shared with UART1)
#define UART9_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_LPUART1
#define LPUART1_RX_PIN PB7 // PA10 (Shared with UART1)
#define LPUART1_TX_PIN PB6 // PA9 (Shared with UART1)
#define USE_VCP
@ -267,6 +267,8 @@
//#define UART6_TX_DMA_OPT 5
//#define UART7_TX_DMA_OPT 6
//#define UART8_TX_DMA_OPT 7
//#define UART9_TX_DMA_OPT 8
//#define UART10_TX_DMA_OPT 9
#define ADC1_DMA_OPT 8
#define ADC2_DMA_OPT 9
#define ADC3_DMA_OPT 10

9
src/main/target/common_defaults_post.h
View file

@ -639,6 +639,15 @@
#endif
#endif
#ifdef USE_UART10
#ifndef UART10_TX_DMA_OPT
#define UART10_TX_DMA_OPT (DMA_OPT_UNUSED)
#endif
#ifndef UART10_RX_DMA_OPT
#define UART10_RX_DMA_OPT (DMA_OPT_UNUSED)
#endif
#endif
#ifndef RTC6705_CS_PIN
#define RTC6705_CS_PIN NONE
#endif