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https://github.com/betaflight/betaflight.git
synced 2025-07-20 06:45:16 +03:00
Re-design DMA driver
This commit is contained in:
parent
1c1dff4b12
commit
2d070a3507
16 changed files with 299 additions and 394 deletions
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@ -87,7 +87,7 @@ static uartDevice_t uart1 =
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.rcc_ahb1 = USART1_AHB1_PERIPHERALS,
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#endif
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.rcc_apb2 = RCC_APB2(USART1),
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.txIrq = DMA2_Stream7_IRQn,
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.txIrq = DMA2_ST7_HANDLER,
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.rxIrq = USART1_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART1_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART1
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@ -110,7 +110,7 @@ static uartDevice_t uart2 =
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.rcc_ahb1 = USART2_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(USART2),
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.txIrq = DMA1_Stream6_IRQn,
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.txIrq = DMA1_ST6_HANDLER,
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.rxIrq = USART2_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART2_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART2
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@ -133,7 +133,7 @@ static uartDevice_t uart3 =
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.rcc_ahb1 = USART3_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(USART3),
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.txIrq = DMA1_Stream3_IRQn,
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.txIrq = DMA1_ST3_HANDLER,
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.rxIrq = USART3_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART3_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART3
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@ -156,7 +156,7 @@ static uartDevice_t uart4 =
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.rcc_ahb1 = USART4_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(UART4),
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.txIrq = DMA1_Stream4_IRQn,
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.txIrq = DMA1_ST4_HANDLER,
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.rxIrq = UART4_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART4_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART4
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@ -179,7 +179,7 @@ static uartDevice_t uart5 =
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.rcc_ahb1 = USART5_AHB1_PERIPHERALS,
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#endif
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.rcc_apb1 = RCC_APB1(UART5),
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.txIrq = DMA2_Stream7_IRQn,
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.txIrq = DMA2_ST7_HANDLER,
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.rxIrq = UART5_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART5_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART5
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@ -202,7 +202,7 @@ static uartDevice_t uart6 =
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.rcc_ahb1 = USART6_AHB1_PERIPHERALS,
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#endif
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.rcc_apb2 = RCC_APB2(USART6),
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.txIrq = DMA2_Stream6_IRQn,
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.txIrq = DMA2_ST6_HANDLER,
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.rxIrq = USART6_IRQn,
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.txPriority = NVIC_PRIO_SERIALUART6_TXDMA,
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.rxPriority = NVIC_PRIO_SERIALUART6
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@ -278,6 +278,29 @@ static void handleUsartTxDma(uartPort_t *s)
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s->txDMAEmpty = true;
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}
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void dmaIRQHandler(dmaChannelDescriptor_t descriptor)
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{
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uartPort_t *s = &((uartDevice_t*)(descriptor->userParam)->port);
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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DMA_CLEAR_FLAG(descriptor, DMA_IT_HTIF);
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_FEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_FEIF);
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}
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handleUsartTxDma(s);
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}
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TEIF);
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}
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_DMEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_DMEIF);
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}
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}
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uartPort_t *serialUSART(UARTDevice device, uint32_t baudRate, portMode_t mode, portOptions_t options)
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{
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uartPort_t *s;
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@ -336,11 +359,7 @@ uartPort_t *serialUSART(UARTDevice device, uint32_t baudRate, portMode_t mode, p
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}
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// DMA TX Interrupt
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NVIC_InitStructure.NVIC_IRQChannel = uart->txIrq;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(uart->txPriority);
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(uart->txPriority);
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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dmaSetHandler(uart->txIrq, dmaIRQHandler, uart->txPriority, (uint32_t)uart);
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if (!(s->rxDMAChannel)) {
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NVIC_InitStructure.NVIC_IRQChannel = uart->rxIrq;
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@ -359,30 +378,6 @@ uartPort_t *serialUSART1(uint32_t baudRate, portMode_t mode, portOptions_t optio
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return serialUSART(UARTDEV_1, baudRate, mode, options);
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}
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// USART1 Tx DMA Handler
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void DMA2_Stream7_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_1]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF7))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF7);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF7);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF7);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF7);
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}
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}
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// USART1 Rx/Tx IRQ Handler
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void USART1_IRQHandler(void)
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{
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@ -398,30 +393,6 @@ uartPort_t *serialUSART2(uint32_t baudRate, portMode_t mode, portOptions_t optio
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return serialUSART(UARTDEV_2, baudRate, mode, options);
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}
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// USART2 Tx DMA Handler
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void DMA1_Stream6_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_2]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF6))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF6);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF6);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF6);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF6);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF6);
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}
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}
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void USART2_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_2]->port);
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@ -436,30 +407,6 @@ uartPort_t *serialUSART3(uint32_t baudRate, portMode_t mode, portOptions_t optio
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return serialUSART(UARTDEV_3, baudRate, mode, options);
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}
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// USART3 Tx DMA Handler
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void DMA1_Stream3_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_3]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF3))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF3);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF3);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF3);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF3);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF3);
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}
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}
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void USART3_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_3]->port);
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@ -474,30 +421,6 @@ uartPort_t *serialUSART4(uint32_t baudRate, portMode_t mode, portOptions_t optio
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return serialUSART(UARTDEV_4, baudRate, mode, options);
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}
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// USART4 Tx DMA Handler
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void DMA1_Stream4_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_4]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF4))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF4);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF4);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF4);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF4);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF4);
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}
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}
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void UART4_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_4]->port);
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@ -512,30 +435,6 @@ uartPort_t *serialUSART5(uint32_t baudRate, portMode_t mode, portOptions_t optio
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return serialUSART(UARTDEV_5, baudRate, mode, options);
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}
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// USART5 Tx DMA Handler
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void DMA1_Stream7_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_5]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF7))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF7);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF7);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF7);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF7);
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}
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}
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void UART5_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_5]->port);
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@ -550,30 +449,6 @@ uartPort_t *serialUSART6(uint32_t baudRate, portMode_t mode, portOptions_t optio
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return serialUSART(UARTDEV_6, baudRate, mode, options);
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}
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// USART6 Tx DMA Handler
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void DMA2_Stream6_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_6]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF6))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF6);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF6);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF6);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF6);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF6);
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}
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}
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void USART6_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_6]->port);
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