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Adding RP2350 SDK and target framework (#13988)
* Adding RP2350 SDK and target framework * Spacing * Removing board definitions
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154
lib/main/pico-sdk/host/hardware_sync/include/hardware/sync.h
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154
lib/main/pico-sdk/host/hardware_sync/include/hardware/sync.h
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/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_SYNC_H
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#define _HARDWARE_SYNC_H
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#include "pico.h"
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#ifndef __cplusplus
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#if (__STDC_VERSION__ >= 201112L)
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#include <stdatomic.h>
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#else
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enum {
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memory_order_acquire, memory_order_release
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};
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static inline void atomic_thread_fence(uint x) {}
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#endif
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#else
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#include <atomic>
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_ATOMIC, Spinlock ID for atomics, min=0, max=31, default=8, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_ATOMIC
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#define PICO_SPINLOCK_ID_ATOMIC 8
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_IRQ, Spinlock ID for IRQ protection, min=0, max=31, default=9, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_IRQ
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#define PICO_SPINLOCK_ID_IRQ 9
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_TIMER, Spinlock ID for Timer protection, min=0, max=31, default=10, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_TIMER
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#define PICO_SPINLOCK_ID_TIMER 10
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_HARDWARE_CLAIM, Spinlock ID for Hardware claim protection, min=0, max=31, default=11, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_HARDWARE_CLAIM
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#define PICO_SPINLOCK_ID_HARDWARE_CLAIM 11
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_RAND, Spinlock ID for Random Number Generator, min=0, max=31, default=12, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_RAND
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#define PICO_SPINLOCK_ID_RAND 12
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_OS1, First Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=14, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_OS1
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#define PICO_SPINLOCK_ID_OS1 14
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_OS2, Second Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=15, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_OS2
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#define PICO_SPINLOCK_ID_OS2 15
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_STRIPED_FIRST, Lowest Spinlock ID in the 'striped' range, min=0, max=31, default=16, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_STRIPED_FIRST
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#define PICO_SPINLOCK_ID_STRIPED_FIRST 16
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_STRIPED_LAST, Highest Spinlock ID in the 'striped' range, min=0, max=31, default=23, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_STRIPED_LAST
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#define PICO_SPINLOCK_ID_STRIPED_LAST 23
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_CLAIM_FREE_FIRST, Lowest Spinlock ID in the 'claim free' range, min=0, max=31, default=24, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_CLAIM_FREE_FIRST
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#define PICO_SPINLOCK_ID_CLAIM_FREE_FIRST 24
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#endif
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#ifdef PICO_SPINLOCK_ID_CLAIM_FREE_END
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#warning PICO_SPINLOCK_ID_CLAIM_FREE_END has been renamed to PICO_SPINLOCK_ID_CLAIM_FREE_LAST
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#endif
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// PICO_CONFIG: PICO_SPINLOCK_ID_CLAIM_FREE_LAST, Highest Spinlock ID in the 'claim free' range, min=0, max=31, default=31, group=hardware_sync
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#ifndef PICO_SPINLOCK_ID_CLAIM_FREE_LAST
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#define PICO_SPINLOCK_ID_CLAIM_FREE_LAST 31
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#endif
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typedef struct _spin_lock_t spin_lock_t;
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inline static void __mem_fence_acquire() {
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#ifndef __cplusplus
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atomic_thread_fence(memory_order_acquire);
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#else
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std::atomic_thread_fence(std::memory_order_acquire);
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#endif
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}
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inline static void __mem_fence_release() {
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#ifndef __cplusplus
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atomic_thread_fence(memory_order_release);
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#else
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std::atomic_thread_fence(std::memory_order_release);
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#endif
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}
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#ifdef __cplusplus
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extern "C" {
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#endif
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void __sev();
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void __wev();
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void __wfi();
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void __wfe();
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uint32_t save_and_disable_interrupts();
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void restore_interrupts(uint32_t status);
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void restore_interrupts_from_disabled(uint32_t status);
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uint spin_lock_get_num(spin_lock_t *lock);
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spin_lock_t *spin_lock_instance(uint lock_num);
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void spin_lock_unsafe_blocking(spin_lock_t *lock);
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void spin_unlock_unsafe(spin_lock_t *lock);
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uint32_t spin_lock_blocking(spin_lock_t *lock);
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bool is_spin_locked(const spin_lock_t *lock);
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void spin_unlock(spin_lock_t *lock, uint32_t saved_irq);
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spin_lock_t *spin_lock_init(uint lock_num);
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void clear_spin_locks(void);
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#define spin_locks_reset() clear_spin_locks()
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uint next_striped_spin_lock_num();
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void spin_lock_claim(uint lock_num);
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void spin_lock_claim_mask(uint32_t lock_num_mask);
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void spin_lock_unclaim(uint lock_num);
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int spin_lock_claim_unused(bool required);
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uint spin_lock_num(spin_lock_t *lock);
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#ifdef __cplusplus
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}
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#endif
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#endif
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140
lib/main/pico-sdk/host/hardware_sync/sync_core0_only.c
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140
lib/main/pico-sdk/host/hardware_sync/sync_core0_only.c
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/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "hardware/sync.h"
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#include "hardware/platform_defs.h"
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// This is a dummy implementation that is single threaded
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static struct _spin_lock_t {
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bool locked;
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} _spinlocks[NUM_SPIN_LOCKS];
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PICO_WEAK_FUNCTION_DEF(save_and_disable_interrupts)
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//static uint8_t striped_spin_lock_num;
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uint32_t PICO_WEAK_FUNCTION_IMPL_NAME(save_and_disable_interrupts)() {
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return 0;
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}
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PICO_WEAK_FUNCTION_DEF(restore_interrupts)
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void PICO_WEAK_FUNCTION_IMPL_NAME(restore_interrupts)(uint32_t status) {
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}
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PICO_WEAK_FUNCTION_DEF(restore_interrupts_from_disabled)
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void PICO_WEAK_FUNCTION_IMPL_NAME(restore_interrupts_from_disabled)(uint32_t status) {
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_instance)
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spin_lock_t *PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_instance)(uint lock_num) {
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assert(lock_num < NUM_SPIN_LOCKS);
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return &_spinlocks[lock_num];
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_get_num)
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uint PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_get_num)(spin_lock_t *lock) {
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return lock - _spinlocks;
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_init)
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spin_lock_t *PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_init)(uint lock_num) {
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spin_lock_t *lock = spin_lock_instance(lock_num);
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spin_unlock_unsafe(lock);
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return lock;
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_unsafe_blocking)
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void PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_unsafe_blocking)(spin_lock_t *lock) {
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lock->locked = true;
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_blocking)
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uint32_t PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_blocking)(spin_lock_t *lock) {
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spin_lock_unsafe_blocking(lock);
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return 1; // todo wrong value
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}
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PICO_WEAK_FUNCTION_DEF(is_spin_locked)
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bool PICO_WEAK_FUNCTION_IMPL_NAME(is_spin_locked)(const spin_lock_t *lock) {
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return lock->locked;
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}
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PICO_WEAK_FUNCTION_DEF(spin_unlock_unsafe)
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void PICO_WEAK_FUNCTION_IMPL_NAME(spin_unlock_unsafe)(spin_lock_t *lock) {
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lock->locked = false;
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}
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PICO_WEAK_FUNCTION_DEF(spin_unlock)
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void PICO_WEAK_FUNCTION_IMPL_NAME(spin_unlock)(spin_lock_t *lock, uint32_t saved_irq) {
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spin_unlock_unsafe(lock);
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}
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PICO_WEAK_FUNCTION_DEF(__sev)
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volatile bool event_fired;
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void PICO_WEAK_FUNCTION_IMPL_NAME(__sev)() {
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event_fired = true;
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}
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PICO_WEAK_FUNCTION_DEF(__wfi)
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void PICO_WEAK_FUNCTION_IMPL_NAME(__wfi)() {
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panic("Can't wait on irq for host core0 only implementation");
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}
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PICO_WEAK_FUNCTION_DEF(__wfe)
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void PICO_WEAK_FUNCTION_IMPL_NAME(__wfe)() {
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while (!event_fired) tight_loop_contents();
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}
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PICO_WEAK_FUNCTION_DEF(clear_spin_locks)
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void PICO_WEAK_FUNCTION_IMPL_NAME(clear_spin_locks)(void) {
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for (uint i = 0; i < NUM_SPIN_LOCKS; i++) {
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spin_unlock_unsafe(spin_lock_instance(i));
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}
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}
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PICO_WEAK_FUNCTION_DEF(next_striped_spin_lock_num)
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uint PICO_WEAK_FUNCTION_IMPL_NAME(next_striped_spin_lock_num)() {
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return 0;
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_claim)
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void PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_claim)(uint lock_num) {
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_claim_mask)
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void PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_claim_mask)(uint32_t mask) {
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_unclaim)
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void PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_unclaim)(uint lock_num) {
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_claim_unused)
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int PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_claim_unused)(bool required) {
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return 0;
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}
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PICO_WEAK_FUNCTION_DEF(spin_lock_num)
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uint PICO_WEAK_FUNCTION_IMPL_NAME(spin_lock_num)(spin_lock_t *lock) {
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return 0;
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}
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