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Adding RP2350 SDK and target framework (#13988)
* Adding RP2350 SDK and target framework * Spacing * Removing board definitions
This commit is contained in:
J Blackman
GitHub
parent
462cb05930
commit
2dd6f95aad
576 changed files with 435012 additions and 0 deletions
221
lib/main/pico-sdk/rp2_common/hardware_flash/flash.c
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lib/main/pico-sdk/rp2_common/hardware_flash/flash.c
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/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "hardware/flash.h"
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#include "pico/bootrom.h"
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#if PICO_RP2040
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#include "hardware/structs/io_qspi.h"
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#include "hardware/structs/ssi.h"
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#else
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#include "hardware/structs/qmi.h"
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#endif
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#define FLASH_BLOCK_ERASE_CMD 0xd8
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// Standard RUID instruction: 4Bh command prefix, 32 dummy bits, 64 data bits.
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#define FLASH_RUID_CMD 0x4b
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#define FLASH_RUID_DUMMY_BYTES 4
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#define FLASH_RUID_DATA_BYTES FLASH_UNIQUE_ID_SIZE_BYTES
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#define FLASH_RUID_TOTAL_BYTES (1 + FLASH_RUID_DUMMY_BYTES + FLASH_RUID_DATA_BYTES)
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//-----------------------------------------------------------------------------
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// Infrastructure for reentering XIP mode after exiting for programming (take
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// a copy of boot2 before XIP exit). Calling boot2 as a function works because
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// it accepts a return vector in LR (and doesn't trash r4-r7). Bootrom passes
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// NULL in LR, instructing boot2 to enter flash vector table's reset handler.
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#if !PICO_NO_FLASH
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#define BOOT2_SIZE_WORDS 64
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static uint32_t boot2_copyout[BOOT2_SIZE_WORDS];
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static bool boot2_copyout_valid = false;
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static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {
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if (boot2_copyout_valid)
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return;
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// todo we may want the option of boot2 just being a free function in
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// user RAM, e.g. if it is larger than 256 bytes
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#if PICO_RP2040
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const volatile uint32_t *copy_from = (uint32_t *)XIP_BASE;
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#else
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const volatile uint32_t *copy_from = (uint32_t *)BOOTRAM_BASE;
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#endif
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for (int i = 0; i < BOOT2_SIZE_WORDS; ++i)
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boot2_copyout[i] = copy_from[i];
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__compiler_memory_barrier();
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boot2_copyout_valid = true;
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}
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static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) {
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((void (*)(void))((intptr_t)boot2_copyout+1))();
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}
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#else
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static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {}
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static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) {
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// Set up XIP for 03h read on bus access (slow but generic)
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rom_flash_enter_cmd_xip_fn flash_enter_cmd_xip_func = (rom_flash_enter_cmd_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_ENTER_CMD_XIP);
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assert(flash_enter_cmd_xip_func);
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flash_enter_cmd_xip_func();
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}
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#endif
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//-----------------------------------------------------------------------------
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// Actual flash programming shims (work whether or not PICO_NO_FLASH==1)
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void __no_inline_not_in_flash_func(flash_range_erase)(uint32_t flash_offs, size_t count) {
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#ifdef PICO_FLASH_SIZE_BYTES
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hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
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#endif
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invalid_params_if(HARDWARE_FLASH, flash_offs & (FLASH_SECTOR_SIZE - 1));
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invalid_params_if(HARDWARE_FLASH, count & (FLASH_SECTOR_SIZE - 1));
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rom_connect_internal_flash_fn connect_internal_flash_func = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH);
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rom_flash_exit_xip_fn flash_exit_xip_func = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP);
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rom_flash_range_erase_fn flash_range_erase_func = (rom_flash_range_erase_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_RANGE_ERASE);
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rom_flash_flush_cache_fn flash_flush_cache_func = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE);
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assert(connect_internal_flash_func && flash_exit_xip_func && flash_range_erase_func && flash_flush_cache_func);
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flash_init_boot2_copyout();
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// No flash accesses after this point
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__compiler_memory_barrier();
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connect_internal_flash_func();
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flash_exit_xip_func();
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flash_range_erase_func(flash_offs, count, FLASH_BLOCK_SIZE, FLASH_BLOCK_ERASE_CMD);
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flash_flush_cache_func(); // Note this is needed to remove CSn IO force as well as cache flushing
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flash_enable_xip_via_boot2();
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}
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void __no_inline_not_in_flash_func(flash_flush_cache)(void) {
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rom_flash_flush_cache_fn flash_flush_cache_func = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE);
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flash_flush_cache_func();
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}
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void __no_inline_not_in_flash_func(flash_range_program)(uint32_t flash_offs, const uint8_t *data, size_t count) {
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#ifdef PICO_FLASH_SIZE_BYTES
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hard_assert(flash_offs + count <= PICO_FLASH_SIZE_BYTES);
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#endif
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invalid_params_if(HARDWARE_FLASH, flash_offs & (FLASH_PAGE_SIZE - 1));
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invalid_params_if(HARDWARE_FLASH, count & (FLASH_PAGE_SIZE - 1));
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rom_connect_internal_flash_fn connect_internal_flash_func = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH);
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rom_flash_exit_xip_fn flash_exit_xip_func = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP);
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rom_flash_range_program_fn flash_range_program_func = (rom_flash_range_program_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_RANGE_PROGRAM);
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rom_flash_flush_cache_fn flash_flush_cache_func = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE);
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assert(connect_internal_flash_func && flash_exit_xip_func && flash_range_program_func && flash_flush_cache_func);
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flash_init_boot2_copyout();
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__compiler_memory_barrier();
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connect_internal_flash_func();
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flash_exit_xip_func();
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flash_range_program_func(flash_offs, data, count);
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flash_flush_cache_func(); // Note this is needed to remove CSn IO force as well as cache flushing
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flash_enable_xip_via_boot2();
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}
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//-----------------------------------------------------------------------------
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// Lower-level flash access functions
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#if !PICO_NO_FLASH
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// Bitbanging the chip select using IO overrides, in case RAM-resident IRQs
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// are still running, and the FIFO bottoms out. (the bootrom does the same)
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static void __no_inline_not_in_flash_func(flash_cs_force)(bool high) {
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#if PICO_RP2040
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uint32_t field_val = high ?
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IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_HIGH :
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IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_VALUE_LOW;
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hw_write_masked(&io_qspi_hw->io[1].ctrl,
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field_val << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB,
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IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS
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);
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#else
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if (high) {
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hw_clear_bits(&qmi_hw->direct_csr, QMI_DIRECT_CSR_ASSERT_CS0N_BITS);
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} else {
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hw_set_bits(&qmi_hw->direct_csr, QMI_DIRECT_CSR_ASSERT_CS0N_BITS);
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}
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#endif
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}
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void __no_inline_not_in_flash_func(flash_do_cmd)(const uint8_t *txbuf, uint8_t *rxbuf, size_t count) {
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rom_connect_internal_flash_fn connect_internal_flash_func = (rom_connect_internal_flash_fn)rom_func_lookup_inline(ROM_FUNC_CONNECT_INTERNAL_FLASH);
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rom_flash_exit_xip_fn flash_exit_xip_func = (rom_flash_exit_xip_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_EXIT_XIP);
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rom_flash_flush_cache_fn flash_flush_cache_func = (rom_flash_flush_cache_fn)rom_func_lookup_inline(ROM_FUNC_FLASH_FLUSH_CACHE);
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assert(connect_internal_flash_func && flash_exit_xip_func && flash_flush_cache_func);
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flash_init_boot2_copyout();
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__compiler_memory_barrier();
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connect_internal_flash_func();
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flash_exit_xip_func();
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flash_cs_force(0);
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size_t tx_remaining = count;
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size_t rx_remaining = count;
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#if PICO_RP2040
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// Synopsys SSI version
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// We may be interrupted -- don't want FIFO to overflow if we're distracted.
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const size_t max_in_flight = 16 - 2;
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while (tx_remaining || rx_remaining) {
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uint32_t flags = ssi_hw->sr;
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bool can_put = flags & SSI_SR_TFNF_BITS;
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bool can_get = flags & SSI_SR_RFNE_BITS;
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if (can_put && tx_remaining && rx_remaining - tx_remaining < max_in_flight) {
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ssi_hw->dr0 = *txbuf++;
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--tx_remaining;
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}
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if (can_get && rx_remaining) {
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*rxbuf++ = (uint8_t)ssi_hw->dr0;
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--rx_remaining;
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}
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}
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#else
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// QMI version -- no need to bound FIFO contents as QMI stalls on full DIRECT_RX.
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hw_set_bits(&qmi_hw->direct_csr, QMI_DIRECT_CSR_EN_BITS);
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while (tx_remaining || rx_remaining) {
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uint32_t flags = qmi_hw->direct_csr;
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bool can_put = !(flags & QMI_DIRECT_CSR_TXFULL_BITS);
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bool can_get = !(flags & QMI_DIRECT_CSR_RXEMPTY_BITS);
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if (can_put && tx_remaining) {
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qmi_hw->direct_tx = *txbuf++;
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--tx_remaining;
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}
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if (can_get && rx_remaining) {
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*rxbuf++ = (uint8_t)qmi_hw->direct_rx;
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--rx_remaining;
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}
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}
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hw_clear_bits(&qmi_hw->direct_csr, QMI_DIRECT_CSR_EN_BITS);
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#endif
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flash_cs_force(1);
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flash_flush_cache_func();
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flash_enable_xip_via_boot2();
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}
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#endif
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// Use standard RUID command to get a unique identifier for the flash (and
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// hence the board)
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static_assert(FLASH_UNIQUE_ID_SIZE_BYTES == FLASH_RUID_DATA_BYTES, "");
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void flash_get_unique_id(uint8_t *id_out) {
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#if PICO_NO_FLASH
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__unused uint8_t *ignore = id_out;
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panic_unsupported();
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#else
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uint8_t txbuf[FLASH_RUID_TOTAL_BYTES] = {0};
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uint8_t rxbuf[FLASH_RUID_TOTAL_BYTES] = {0};
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txbuf[0] = FLASH_RUID_CMD;
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flash_do_cmd(txbuf, rxbuf, FLASH_RUID_TOTAL_BYTES);
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for (int i = 0; i < FLASH_RUID_DATA_BYTES; i++)
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id_out[i] = rxbuf[i + 1 + FLASH_RUID_DUMMY_BYTES];
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#endif
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}
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/*
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* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_FLASH_H
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#define _HARDWARE_FLASH_H
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#include "pico.h"
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/** \file flash.h
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* \defgroup hardware_flash hardware_flash
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*
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* \brief Low level flash programming and erase API
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*
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* Note these functions are *unsafe* if you are using both cores, and the other
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* is executing from flash concurrently with the operation. In this could be the
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* case, you must perform your own synchronisation to make sure that no XIP
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* accesses take place during flash programming. One option is to use the
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* \ref multicore_lockout functions.
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*
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* Likewise they are *unsafe* if you have interrupt handlers or an interrupt
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* vector table in flash, so you must disable interrupts before calling in
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* this case.
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*
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* If PICO_NO_FLASH=1 is not defined (i.e. if the program is built to run from
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* flash) then these functions will make a static copy of the second stage
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* bootloader in SRAM, and use this to reenter execute-in-place mode after
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* programming or erasing flash, so that they can safely be called from
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* flash-resident code.
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*
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* \subsection flash_example Example
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* \include flash_program.c
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*/
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// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_HARDWARE_FLASH, Enable/disable assertions in the hardware_flash module, type=bool, default=0, group=hardware_flash
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#ifndef PARAM_ASSERTIONS_ENABLED_HARDWARE_FLASH
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#ifdef PARAM_ASSERTIONS_ENABLED_FLASH // backwards compatibility with SDK < 2.0.0
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#define PARAM_ASSERTIONS_ENABLED_HARDWARE_FLASH PARAM_ASSERTIONS_ENABLED_FLASH
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#else
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#define PARAM_ASSERTIONS_ENABLED_HARDWARE_FLASH 0
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#endif
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#endif
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#define FLASH_PAGE_SIZE (1u << 8)
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#define FLASH_SECTOR_SIZE (1u << 12)
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#define FLASH_BLOCK_SIZE (1u << 16)
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#ifndef FLASH_UNIQUE_ID_SIZE_BYTES
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#define FLASH_UNIQUE_ID_SIZE_BYTES 8
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#endif
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// PICO_CONFIG: PICO_FLASH_SIZE_BYTES, size of primary flash in bytes, type=int, default=Usually provided via board header, group=hardware_flash
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*! \brief Erase areas of flash
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* \ingroup hardware_flash
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*
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* \param flash_offs Offset into flash, in bytes, to start the erase. Must be aligned to a 4096-byte flash sector.
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* \param count Number of bytes to be erased. Must be a multiple of 4096 bytes (one sector).
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*
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* @note Erasing a flash sector sets all the bits in all the pages in that sector to one.
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* You can then "program" flash pages in the sector to turn some of the bits to zero.
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* Once a bit is set to zero it can only be changed back to one by erasing the whole sector again.
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*/
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void flash_range_erase(uint32_t flash_offs, size_t count);
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/*! \brief Program flash
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* \ingroup hardware_flash
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*
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* \param flash_offs Flash address of the first byte to be programmed. Must be aligned to a 256-byte flash page.
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* \param data Pointer to the data to program into flash
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* \param count Number of bytes to program. Must be a multiple of 256 bytes (one page).
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*
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* @note: Programming a flash page effectively changes some of the bits from one to zero.
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* The only way to change a zero bit back to one is to "erase" the whole sector that the page resides in.
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* So you may need to make sure you have called flash_range_erase before calling flash_range_program.
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*/
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void flash_range_program(uint32_t flash_offs, const uint8_t *data, size_t count);
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/*! \brief Get flash unique 64 bit identifier
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* \ingroup hardware_flash
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*
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* Use a standard 4Bh RUID instruction to retrieve the 64 bit unique
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* identifier from a flash device attached to the QSPI interface. Since there
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* is a 1:1 association between the MCU and this flash, this also serves as a
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* unique identifier for the board.
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*
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* \param id_out Pointer to an 8-byte buffer to which the ID will be written
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*/
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void flash_get_unique_id(uint8_t *id_out);
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/*! \brief Execute bidirectional flash command
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* \ingroup hardware_flash
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*
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* Low-level function to execute a serial command on a flash device attached
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* to the QSPI interface. Bytes are simultaneously transmitted and received
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* from txbuf and to rxbuf. Therefore, both buffers must be the same length,
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* count, which is the length of the overall transaction. This is useful for
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* reading metadata from the flash chip, such as device ID or SFDP
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* parameters.
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*
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* The XIP cache is flushed following each command, in case flash state
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* has been modified. Like other hardware_flash functions, the flash is not
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* accessible for execute-in-place transfers whilst the command is in
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* progress, so entering a flash-resident interrupt handler or executing flash
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* code on the second core concurrently will be fatal. To avoid these pitfalls
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* it is recommended that this function only be used to extract flash metadata
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* during startup, before the main application begins to run: see the
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* implementation of pico_get_unique_id() for an example of this.
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*
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* \param txbuf Pointer to a byte buffer which will be transmitted to the flash
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* \param rxbuf Pointer to a byte buffer where data received from the flash will be written. txbuf and rxbuf may be the same buffer.
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* \param count Length in bytes of txbuf and of rxbuf
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*/
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void flash_do_cmd(const uint8_t *txbuf, uint8_t *rxbuf, size_t count);
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void flash_flush_cache(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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