Mirror/betaflight
1
0
Fork 0
mirror of https://github.com/betaflight/betaflight.git synced 2025-07-26 01:35:41 +03:00
Code Issues Wiki Activity

Rename SPI functions. Rationalise parameter order.

Browse source
This commit is contained in:
Martin Budden 2017-07-02 08:35:14 +01:00
parent e0a7594379
commit 2fd20c2bd9
26 changed files with 249 additions and 194 deletions
Download patch file Download diff file Expand all files Collapse all files

32
src/main/drivers/bus_spi.c
View file

@ -131,8 +131,7 @@ void spiInitDevice(SPIDevice device)
bool spiInit(SPIDevice device)
{
switch (device)
{
switch (device) {
case SPIINVALID:
return false;
case SPIDEV_1:
@ -170,8 +169,9 @@ bool spiInit(SPIDevice device)
uint32_t spiTimeoutUserCallback(SPI_TypeDef *instance)
{
SPIDevice device = spiDeviceByInstance(instance);
if (device == SPIINVALID)
if (device == SPIINVALID) {
return -1;
}
spiDevice[device].errorCount++;
return spiDevice[device].errorCount;
}
@ -215,7 +215,7 @@ bool spiIsBusBusy(SPI_TypeDef *instance)
}
bool spiTransfer(SPI_TypeDef *instance, uint8_t *rxData, const uint8_t *txData, int len)
bool spiTransfer(SPI_TypeDef *instance, const uint8_t *txData, uint8_t *rxData, int len)
{
uint16_t spiTimeout = 1000;
@ -249,10 +249,10 @@ bool spiTransfer(SPI_TypeDef *instance, uint8_t *rxData, const uint8_t *txData,
return true;
}
bool spiBusTransfer(const busDevice_t *bus, uint8_t *rxData, const uint8_t *txData, int length)
bool spiBusTransfer(const busDevice_t *bus, const uint8_t *txData, uint8_t *rxData, int length)
{
IOLo(bus->busdev_u.spi.csnPin);
spiTransfer(bus->busdev_u.spi.instance, rxData, txData, length);
spiTransfer(bus->busdev_u.spi.instance, txData, rxData, length);
IOHi(bus->busdev_u.spi.csnPin);
return true;
}
@ -260,11 +260,9 @@ bool spiBusTransfer(const busDevice_t *bus, uint8_t *rxData, const uint8_t *txDa
void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
{
#define BR_CLEAR_MASK 0xFFC7
uint16_t tempRegister;
SPI_Cmd(instance, DISABLE);
tempRegister = (instance->CR1 & BR_CLEAR_MASK);
const uint16_t tempRegister = (instance->CR1 & BR_CLEAR_MASK);
instance->CR1 = (tempRegister | ((ffs(divisor | 0x100) - 2) << 3));
SPI_Cmd(instance, ENABLE);
@ -273,19 +271,21 @@ void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
uint16_t spiGetErrorCounter(SPI_TypeDef *instance)
{
SPIDevice device = spiDeviceByInstance(instance);
if (device == SPIINVALID)
if (device == SPIINVALID) {
return 0;
}
return spiDevice[device].errorCount;
}
void spiResetErrorCounter(SPI_TypeDef *instance)
{
SPIDevice device = spiDeviceByInstance(instance);
if (device != SPIINVALID)
if (device != SPIINVALID) {
spiDevice[device].errorCount = 0;
}
}
bool spiWriteRegister(const busDevice_t *bus, uint8_t reg, uint8_t data)
bool spiBusWriteRegister(const busDevice_t *bus, uint8_t reg, uint8_t data)
{
IOLo(bus->busdev_u.spi.csnPin);
spiTransferByte(bus->busdev_u.spi.instance, reg);
@ -295,22 +295,22 @@ bool spiWriteRegister(const busDevice_t *bus, uint8_t reg, uint8_t data)
return true;
}
bool spiReadRegisterBuffer(const busDevice_t *bus, uint8_t reg, uint8_t length, uint8_t *data)
bool spiBusReadRegisterBuffer(const busDevice_t *bus, uint8_t reg, uint8_t *data, uint8_t length)
{
IOLo(bus->busdev_u.spi.csnPin);
spiTransferByte(bus->busdev_u.spi.instance, reg | 0x80); // read transaction
spiTransfer(bus->busdev_u.spi.instance, data, NULL, length);
spiTransfer(bus->busdev_u.spi.instance, NULL, data, length);
IOHi(bus->busdev_u.spi.csnPin);
return true;
}
uint8_t spiReadRegister(const busDevice_t *bus, uint8_t reg)
uint8_t spiBusReadRegister(const busDevice_t *bus, uint8_t reg)
{
uint8_t data;
IOLo(bus->busdev_u.spi.csnPin);
spiTransferByte(bus->busdev_u.spi.instance, reg | 0x80); // read transaction
spiTransfer(bus->busdev_u.spi.instance, &data, NULL, 1);
spiTransfer(bus->busdev_u.spi.instance, NULL, &data, 1);
IOHi(bus->busdev_u.spi.csnPin);
return data;