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Source file re-arrangement for better separation of MCU types (#12268)
Source file re-arrangement for better spearation of MCU types - Move STM32 specific files to drivers/stm32
This commit is contained in:
J Blackman
GitHub
parent
a3b7d74016
commit
33a96bb5f6
79 changed files with 537 additions and 485 deletions
330
src/main/drivers/stm32/bus_i2c_hal_init.c
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330
src/main/drivers/stm32/bus_i2c_hal_init.c
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#include "platform.h"
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#if defined(USE_I2C) && !defined(SOFT_I2C)
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#include "drivers/io.h"
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#include "drivers/io_impl.h"
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#include "drivers/nvic.h"
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#include "drivers/time.h"
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#include "drivers/rcc.h"
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#include "drivers/bus_i2c.h"
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#include "drivers/bus_i2c_impl.h"
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#include "drivers/bus_i2c_timing.h"
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// Number of bits in I2C protocol phase
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#define LEN_ADDR 7
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#define LEN_RW 1
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#define LEN_ACK 1
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// Clock period in us during unstick transfer
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#define UNSTICK_CLK_US 10
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// Allow 500us for clock strech to complete during unstick
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#define UNSTICK_CLK_STRETCH (500/UNSTICK_CLK_US)
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static void i2cUnstick(IO_t scl, IO_t sda);
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#define IOCFG_I2C_PU IO_CONFIG(GPIO_MODE_AF_OD, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define IOCFG_I2C IO_CONFIG(GPIO_MODE_AF_OD, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#define GPIO_AF4_I2C GPIO_AF4_I2C1
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const i2cHardware_t i2cHardware[I2CDEV_COUNT] = {
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#if defined(STM32F7)
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#ifdef USE_I2C_DEVICE_1
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{
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.device = I2CDEV_1,
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.reg = I2C1,
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.sclPins = { I2CPINDEF(PB6), I2CPINDEF(PB8) },
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.sdaPins = { I2CPINDEF(PB7), I2CPINDEF(PB9) },
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.rcc = RCC_APB1(I2C1),
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.ev_irq = I2C1_EV_IRQn,
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.er_irq = I2C1_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_2
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{
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.device = I2CDEV_2,
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.reg = I2C2,
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.sclPins = { I2CPINDEF(PB10), I2CPINDEF(PF1) },
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.sdaPins = { I2CPINDEF(PB11), I2CPINDEF(PF0) },
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.rcc = RCC_APB1(I2C2),
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.ev_irq = I2C2_EV_IRQn,
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.er_irq = I2C2_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_3
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{
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.device = I2CDEV_3,
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.reg = I2C3,
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.sclPins = { I2CPINDEF(PA8) },
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.sdaPins = { I2CPINDEF(PC9) },
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.rcc = RCC_APB1(I2C3),
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.ev_irq = I2C3_EV_IRQn,
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.er_irq = I2C3_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_4
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{
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.device = I2CDEV_4,
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.reg = I2C4,
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.sclPins = { I2CPINDEF(PD12), I2CPINDEF(PF14) },
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.sdaPins = { I2CPINDEF(PD13), I2CPINDEF(PF15) },
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.rcc = RCC_APB1(I2C4),
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.ev_irq = I2C4_EV_IRQn,
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.er_irq = I2C4_ER_IRQn,
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},
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#endif
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#elif defined(STM32H7)
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#ifdef USE_I2C_DEVICE_1
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{
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.device = I2CDEV_1,
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.reg = I2C1,
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.sclPins = { I2CPINDEF(PB6, GPIO_AF4_I2C1), I2CPINDEF(PB8, GPIO_AF4_I2C1) },
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.sdaPins = { I2CPINDEF(PB7, GPIO_AF4_I2C1), I2CPINDEF(PB9, GPIO_AF4_I2C1) },
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.rcc = RCC_APB1L(I2C1),
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.ev_irq = I2C1_EV_IRQn,
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.er_irq = I2C1_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_2
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{
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.device = I2CDEV_2,
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.reg = I2C2,
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.sclPins = { I2CPINDEF(PB10, GPIO_AF4_I2C2), I2CPINDEF(PF1, GPIO_AF4_I2C2) },
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.sdaPins = { I2CPINDEF(PB11, GPIO_AF4_I2C2), I2CPINDEF(PF0, GPIO_AF4_I2C2) },
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.rcc = RCC_APB1L(I2C2),
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.ev_irq = I2C2_EV_IRQn,
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.er_irq = I2C2_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_3
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{
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.device = I2CDEV_3,
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.reg = I2C3,
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.sclPins = { I2CPINDEF(PA8, GPIO_AF4_I2C3) },
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.sdaPins = { I2CPINDEF(PC9, GPIO_AF4_I2C3) },
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.rcc = RCC_APB1L(I2C3),
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.ev_irq = I2C3_EV_IRQn,
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.er_irq = I2C3_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_4
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{
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.device = I2CDEV_4,
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.reg = I2C4,
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.sclPins = { I2CPINDEF(PD12, GPIO_AF4_I2C4), I2CPINDEF(PF14, GPIO_AF4_I2C4), I2CPINDEF(PB6, GPIO_AF6_I2C4), I2CPINDEF(PB8, GPIO_AF6_I2C4) },
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.sdaPins = { I2CPINDEF(PD13, GPIO_AF4_I2C4), I2CPINDEF(PF15, GPIO_AF4_I2C4), I2CPINDEF(PB7, GPIO_AF6_I2C4), I2CPINDEF(PB9, GPIO_AF6_I2C4) },
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.rcc = RCC_APB4(I2C4),
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.ev_irq = I2C4_EV_IRQn,
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.er_irq = I2C4_ER_IRQn,
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},
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#endif
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#elif defined(STM32G4)
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#ifdef USE_I2C_DEVICE_1
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{
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.device = I2CDEV_1,
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.reg = I2C1,
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// Some boards are overloading SWD pins with I2C1 for maximum pin utilization on 48-pin CE(U) packages.
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// Be carefull when using SWD on these boards if I2C1 pins are defined by default.
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.sclPins = { I2CPINDEF(PA13, GPIO_AF4_I2C1), I2CPINDEF(PA15, GPIO_AF4_I2C1), I2CPINDEF(PB6, GPIO_AF4_I2C1), I2CPINDEF(PB8, GPIO_AF4_I2C1), },
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.sdaPins = { I2CPINDEF(PA14, GPIO_AF4_I2C1), I2CPINDEF(PB7, GPIO_AF4_I2C1), I2CPINDEF(PB9, GPIO_AF4_I2C1), },
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.rcc = RCC_APB11(I2C1),
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.ev_irq = I2C1_EV_IRQn,
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.er_irq = I2C1_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_2
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{
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.device = I2CDEV_2,
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.reg = I2C2,
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.sclPins = { I2CPINDEF(PA9, GPIO_AF4_I2C2), },
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.sdaPins = { I2CPINDEF(PA10, GPIO_AF4_I2C2), },
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.rcc = RCC_APB11(I2C2),
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.ev_irq = I2C2_EV_IRQn,
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.er_irq = I2C2_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_3
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{
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.device = I2CDEV_3,
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.reg = I2C3,
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.sclPins = { I2CPINDEF(PA10, GPIO_AF2_I2C3), I2CPINDEF(PC8, GPIO_AF8_I2C3), },
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.sdaPins = { I2CPINDEF(PB5, GPIO_AF8_I2C3), I2CPINDEF(PC9, GPIO_AF8_I2C3), I2CPINDEF(PC11, GPIO_AF8_I2C3), },
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.rcc = RCC_APB11(I2C3),
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.ev_irq = I2C3_EV_IRQn,
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.er_irq = I2C3_ER_IRQn,
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},
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#endif
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#ifdef USE_I2C_DEVICE_4
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{
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.device = I2CDEV_4,
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.reg = I2C4,
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// Here, SWDIO(PA13) is overloaded with I2C4_SCL, too.
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// See comment in the I2C1 section above.
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.sclPins = { I2CPINDEF(PA13, GPIO_AF3_I2C4), I2CPINDEF(PB6, GPIO_AF3_I2C4), I2CPINDEF(PC6, GPIO_AF8_I2C4), },
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.sdaPins = { I2CPINDEF(PB7, GPIO_AF4_I2C4), I2CPINDEF(PC7, GPIO_AF8_I2C4), },
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.rcc = RCC_APB12(I2C4),
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.ev_irq = I2C4_EV_IRQn,
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.er_irq = I2C4_ER_IRQn,
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},
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#endif
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#endif
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};
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i2cDevice_t i2cDevice[I2CDEV_COUNT];
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void i2cInit(I2CDevice device)
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{
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if (device == I2CINVALID) {
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return;
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}
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i2cDevice_t *pDev = &i2cDevice[device];
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const i2cHardware_t *hardware = pDev->hardware;
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const IO_t scl = pDev->scl;
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const IO_t sda = pDev->sda;
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if (!hardware || IOGetOwner(scl) || IOGetOwner(sda)) {
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return;
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}
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IOInit(scl, OWNER_I2C_SCL, RESOURCE_INDEX(device));
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IOInit(sda, OWNER_I2C_SDA, RESOURCE_INDEX(device));
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// Enable RCC
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RCC_ClockCmd(hardware->rcc, ENABLE);
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i2cUnstick(scl, sda);
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// Init pins
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#if defined(STM32F7)
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IOConfigGPIOAF(scl, pDev->pullUp ? IOCFG_I2C_PU : IOCFG_I2C, GPIO_AF4_I2C);
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IOConfigGPIOAF(sda, pDev->pullUp ? IOCFG_I2C_PU : IOCFG_I2C, GPIO_AF4_I2C);
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#elif defined(STM32H7) || defined(STM32G4)
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IOConfigGPIOAF(scl, pDev->pullUp ? IOCFG_I2C_PU : IOCFG_I2C, pDev->sclAF);
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IOConfigGPIOAF(sda, pDev->pullUp ? IOCFG_I2C_PU : IOCFG_I2C, pDev->sdaAF);
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#else
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IOConfigGPIO(scl, IOCFG_AF_OD);
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IOConfigGPIO(sda, IOCFG_AF_OD);
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#endif
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// Init I2C peripheral
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I2C_HandleTypeDef *pHandle = &pDev->handle;
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memset(pHandle, 0, sizeof(*pHandle));
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pHandle->Instance = pDev->hardware->reg;
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// Compute TIMINGR value based on peripheral clock for this device instance
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uint32_t i2cPclk;
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#if defined(STM32F7) || defined(STM32G4)
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// F7 Clock source configured in startup/system_stm32f7xx.c as:
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// I2C1234 : PCLK1
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// G4 Clock source configured in startup/system_stm32g4xx.c as:
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// I2C1234 : PCLK1
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i2cPclk = HAL_RCC_GetPCLK1Freq();
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#elif defined(STM32H7)
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// Clock sources configured in startup/system_stm32h7xx.c as:
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// I2C123 : D2PCLK1 (rcc_pclk1 for APB1)
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// I2C4 : D3PCLK1 (rcc_pclk4 for APB4)
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i2cPclk = (pHandle->Instance == I2C4) ? HAL_RCCEx_GetD3PCLK1Freq() : HAL_RCC_GetPCLK1Freq();
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#else
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#error Unknown MCU type
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#endif
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pHandle->Init.Timing = i2cClockTIMINGR(i2cPclk, pDev->clockSpeed, 0);
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pHandle->Init.OwnAddress1 = 0x0;
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pHandle->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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pHandle->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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pHandle->Init.OwnAddress2 = 0x0;
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pHandle->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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pHandle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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HAL_I2C_Init(pHandle);
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// Enable the Analog I2C Filter
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HAL_I2CEx_ConfigAnalogFilter(pHandle, I2C_ANALOGFILTER_ENABLE);
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// Setup interrupt handlers
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HAL_NVIC_SetPriority(hardware->er_irq, NVIC_PRIORITY_BASE(NVIC_PRIO_I2C_ER), NVIC_PRIORITY_SUB(NVIC_PRIO_I2C_ER));
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HAL_NVIC_EnableIRQ(hardware->er_irq);
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HAL_NVIC_SetPriority(hardware->ev_irq, NVIC_PRIORITY_BASE(NVIC_PRIO_I2C_EV), NVIC_PRIORITY_SUB(NVIC_PRIO_I2C_EV));
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HAL_NVIC_EnableIRQ(hardware->ev_irq);
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}
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static void i2cUnstick(IO_t scl, IO_t sda)
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{
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int i;
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IOHi(scl);
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IOHi(sda);
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IOConfigGPIO(scl, IOCFG_OUT_OD);
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IOConfigGPIO(sda, IOCFG_OUT_OD);
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// Clock out, with SDA high:
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// 7 data bits
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// 1 READ bit
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// 1 cycle for the ACK
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for (i = 0; i < (LEN_ADDR + LEN_RW + LEN_ACK); i++) {
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// Wait for any clock stretching to finish
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int timeout = UNSTICK_CLK_STRETCH;
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while (!IORead(scl) && timeout) {
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delayMicroseconds(UNSTICK_CLK_US);
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timeout--;
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}
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// Pull low
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IOLo(scl); // Set bus low
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(scl); // Set bus high
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delayMicroseconds(UNSTICK_CLK_US/2);
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}
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// Generate a stop condition in case there was none
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IOLo(scl);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOLo(sda);
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(scl); // Set bus scl high
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delayMicroseconds(UNSTICK_CLK_US/2);
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IOHi(sda); // Set bus sda high
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}
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#endif
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