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https://github.com/betaflight/betaflight.git
synced 2025-07-14 03:50:02 +03:00
Whitespace tidy
This commit is contained in:
Martin Budden
parent
ee8763bbf1
commit
3d4f0bb137
97 changed files with 555 additions and 555 deletions
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@ -78,7 +78,7 @@ static uint8_t lookupTimerIndex(const TIM_TypeDef *tim)
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#define _CASE(i) _CASE_(TIM##i##_BASE, TIMER_INDEX(i))
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// let gcc do the work, switch should be quite optimized
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switch((unsigned)tim >> _CASE_SHF) {
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switch ((unsigned)tim >> _CASE_SHF) {
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#if USED_TIMERS & TIM_N(1)
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_CASE(1);
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#endif
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@ -254,7 +254,7 @@ void timerConfigure(const timerHardware_t *timerHardwarePtr, uint16_t period, ui
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uint8_t irq = timerInputIrq(timerHardwarePtr->tim);
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timerNVICConfigure(irq);
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// HACK - enable second IRQ on timers that need it
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switch(irq) {
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switch (irq) {
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#if defined(STM32F10X)
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case TIM1_CC_IRQn:
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timerNVICConfigure(TIM1_UP_IRQn);
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@ -287,14 +287,14 @@ void timerConfigure(const timerHardware_t *timerHardwarePtr, uint16_t period, ui
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void timerChInit(const timerHardware_t *timHw, channelType_t type, int irqPriority, uint8_t irq)
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{
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unsigned channel = timHw - timerHardware;
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if(channel >= USABLE_TIMER_CHANNEL_COUNT)
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if (channel >= USABLE_TIMER_CHANNEL_COUNT)
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return;
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timerChannelInfo[channel].type = type;
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unsigned timer = lookupTimerIndex(timHw->tim);
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if(timer >= USED_TIMER_COUNT)
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if (timer >= USED_TIMER_COUNT)
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return;
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if(irqPriority < timerInfo[timer].priority) {
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if (irqPriority < timerInfo[timer].priority) {
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// it would be better to set priority in the end, but current startup sequence is not ready
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configTimeBase(usedTimers[timer], 0, 1);
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TIM_Cmd(usedTimers[timer], ENABLE);
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@ -327,8 +327,8 @@ void timerChOvrHandlerInit(timerOvrHandlerRec_t *self, timerOvrHandlerCallback *
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static void timerChConfig_UpdateOverflow(timerConfig_t *cfg, TIM_TypeDef *tim) {
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timerOvrHandlerRec_t **chain = &cfg->overflowCallbackActive;
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ATOMIC_BLOCK(NVIC_PRIO_TIMER) {
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for(int i = 0; i < CC_CHANNELS_PER_TIMER; i++)
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if(cfg->overflowCallback[i]) {
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for (int i = 0; i < CC_CHANNELS_PER_TIMER; i++)
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if (cfg->overflowCallback[i]) {
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*chain = cfg->overflowCallback[i];
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chain = &cfg->overflowCallback[i]->next;
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}
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@ -346,13 +346,13 @@ void timerChConfigCallbacks(const timerHardware_t *timHw, timerCCHandlerRec_t *e
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return;
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}
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uint8_t channelIndex = lookupChannelIndex(timHw->channel);
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if(edgeCallback == NULL) // disable irq before changing callback to NULL
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if (edgeCallback == NULL) // disable irq before changing callback to NULL
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TIM_ITConfig(timHw->tim, TIM_IT_CCx(timHw->channel), DISABLE);
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// setup callback info
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timerConfig[timerIndex].edgeCallback[channelIndex] = edgeCallback;
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timerConfig[timerIndex].overflowCallback[channelIndex] = overflowCallback;
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// enable channel IRQ
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if(edgeCallback)
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if (edgeCallback)
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TIM_ITConfig(timHw->tim, TIM_IT_CCx(timHw->channel), ENABLE);
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timerChConfig_UpdateOverflow(&timerConfig[timerIndex], timHw->tim);
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@ -371,9 +371,9 @@ void timerChConfigCallbacksDual(const timerHardware_t *timHw, timerCCHandlerRec_
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uint16_t chHi = timHw->channel | TIM_Channel_2; // upper channel
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uint8_t channelIndex = lookupChannelIndex(chLo); // get index of lower channel
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if(edgeCallbackLo == NULL) // disable irq before changing setting callback to NULL
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if (edgeCallbackLo == NULL) // disable irq before changing setting callback to NULL
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TIM_ITConfig(timHw->tim, TIM_IT_CCx(chLo), DISABLE);
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if(edgeCallbackHi == NULL) // disable irq before changing setting callback to NULL
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if (edgeCallbackHi == NULL) // disable irq before changing setting callback to NULL
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TIM_ITConfig(timHw->tim, TIM_IT_CCx(chHi), DISABLE);
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// setup callback info
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@ -383,11 +383,11 @@ void timerChConfigCallbacksDual(const timerHardware_t *timHw, timerCCHandlerRec_
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timerConfig[timerIndex].overflowCallback[channelIndex + 1] = NULL;
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// enable channel IRQs
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if(edgeCallbackLo) {
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if (edgeCallbackLo) {
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TIM_ClearFlag(timHw->tim, TIM_IT_CCx(chLo));
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TIM_ITConfig(timHw->tim, TIM_IT_CCx(chLo), ENABLE);
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}
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if(edgeCallbackHi) {
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if (edgeCallbackHi) {
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TIM_ClearFlag(timHw->tim, TIM_IT_CCx(chHi));
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TIM_ITConfig(timHw->tim, TIM_IT_CCx(chHi), ENABLE);
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}
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@ -433,8 +433,8 @@ static unsigned getFilter(unsigned ticks)
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16*5, 16*6, 16*8,
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32*5, 32*6, 32*8
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};
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for(unsigned i = 1; i < ARRAYLEN(ftab); i++)
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if(ftab[i] > ticks)
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for (unsigned i = 1; i < ARRAYLEN(ftab); i++)
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if (ftab[i] > ticks)
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return i - 1;
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return 0x0f;
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}
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@ -504,7 +504,7 @@ void timerChConfigOC(const timerHardware_t* timHw, bool outEnable, bool stateHig
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TIM_OCInitTypeDef TIM_OCInitStructure;
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TIM_OCStructInit(&TIM_OCInitStructure);
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if(outEnable) {
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if (outEnable) {
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TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Inactive;
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TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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if (timHw->output & TIMER_OUTPUT_INVERTED) {
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@ -541,17 +541,17 @@ static void timCCxHandler(TIM_TypeDef *tim, timerConfig_t *timerConfig)
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unsigned tim_status;
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tim_status = tim->SR & tim->DIER;
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#if 1
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while(tim_status) {
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while (tim_status) {
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// flags will be cleared by reading CCR in dual capture, make sure we call handler correctly
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// currrent order is highest bit first. Code should not rely on specific order (it will introduce race conditions anyway)
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unsigned bit = __builtin_clz(tim_status);
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unsigned mask = ~(0x80000000 >> bit);
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tim->SR = mask;
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tim_status &= mask;
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switch(bit) {
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switch (bit) {
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case __builtin_clz(TIM_IT_Update): {
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if(timerConfig->forcedOverflowTimerValue != 0){
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if (timerConfig->forcedOverflowTimerValue != 0) {
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capture = timerConfig->forcedOverflowTimerValue - 1;
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timerConfig->forcedOverflowTimerValue = 0;
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} else {
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@ -559,7 +559,7 @@ static void timCCxHandler(TIM_TypeDef *tim, timerConfig_t *timerConfig)
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}
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timerOvrHandlerRec_t *cb = timerConfig->overflowCallbackActive;
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while(cb) {
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while (cb) {
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cb->fn(cb, capture);
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cb = cb->next;
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}
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@ -584,7 +584,7 @@ static void timCCxHandler(TIM_TypeDef *tim, timerConfig_t *timerConfig)
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tim->SR = ~TIM_IT_Update;
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capture = tim->ARR;
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timerOvrHandlerRec_t *cb = timerConfig->overflowCallbackActive;
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while(cb) {
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while (cb) {
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cb->fn(cb, capture);
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cb = cb->next;
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}
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@ -714,10 +714,10 @@ void timerInit(void)
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#endif
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// initialize timer channel structures
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for(int i = 0; i < USABLE_TIMER_CHANNEL_COUNT; i++) {
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for (int i = 0; i < USABLE_TIMER_CHANNEL_COUNT; i++) {
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timerChannelInfo[i].type = TYPE_FREE;
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}
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for(int i = 0; i < USED_TIMER_COUNT; i++) {
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for (int i = 0; i < USED_TIMER_COUNT; i++) {
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timerInfo[i].priority = ~0;
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}
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}
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@ -728,18 +728,18 @@ void timerInit(void)
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void timerStart(void)
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{
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#if 0
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for(unsigned timer = 0; timer < USED_TIMER_COUNT; timer++) {
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for (unsigned timer = 0; timer < USED_TIMER_COUNT; timer++) {
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int priority = -1;
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int irq = -1;
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for(unsigned hwc = 0; hwc < USABLE_TIMER_CHANNEL_COUNT; hwc++)
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if((timerChannelInfo[hwc].type != TYPE_FREE) && (timerHardware[hwc].tim == usedTimers[timer])) {
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for (unsigned hwc = 0; hwc < USABLE_TIMER_CHANNEL_COUNT; hwc++)
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if ((timerChannelInfo[hwc].type != TYPE_FREE) && (timerHardware[hwc].tim == usedTimers[timer])) {
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// TODO - move IRQ to timer info
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irq = timerHardware[hwc].irq;
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}
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// TODO - aggregate required timer paramaters
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configTimeBase(usedTimers[timer], 0, 1);
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TIM_Cmd(usedTimers[timer], ENABLE);
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if(priority >= 0) { // maybe none of the channels was configured
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if (priority >= 0) { // maybe none of the channels was configured
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NVIC_InitTypeDef NVIC_InitStructure;
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NVIC_InitStructure.NVIC_IRQChannel = irq;
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