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Initial ADC support for AT32 (#12356)
Reads internal and external ADC channels. Internal Vref and temperature tested, external Vbat tested. Expect temperature to be inaccurate as the AT chips don't come with per chip calibration. External current and the generic 'external' channels haven't been tested.
This commit is contained in:
James
GitHub
parent
3598f3e41a
commit
4019369ec0
9 changed files with 309 additions and 130 deletions
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@ -66,17 +66,8 @@ void adc_enable(adc_type *adc_x, confirm_state new_state)
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/**
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* @brief adc base default para init.
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* @param sequence_mode: set the state of adc sequence mode.
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* this parameter can be:TRUE or FALSE
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* @param repeat_mode: set the state of adc repeat conversion mode.
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* this parameter can be:TRUE or FALSE
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* @param data_align: set the state of adc data alignment.
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* this parameter can be one of the following values:
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* - ADC_RIGHT_ALIGNMENT
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* - ADC_LEFT_ALIGNMENT
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* @param ordinary_channel_length: configure the adc ordinary channel sequence length.
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* this parameter can be:
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* - (0x1~0xf)
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* Sets sequence FALSE, repeat FALSE, align right, length 1
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* @param adc_base_struct pointer to the struct to be initialised
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* @retval none
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*/
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void adc_base_default_para_init(adc_base_config_type *adc_base_struct)
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@ -130,11 +130,25 @@ int32_t adcTSCAL1;
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int32_t adcTSCAL2;
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int32_t adcTSSlopeK;
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uint16_t adcInternalCompensateVref(uint16_t vrefAdcValue)
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/**
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* Use a measurement of the fixed internal vref to calculate the external Vref+
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*
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* The ADC full range reading equates to Vref+ on the channel. Vref+ is typically
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* fed from Vcc at 3.3V, but since Vcc isn't a critical value it may be off
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* by a little due to variation in the regulator. Some chips are provided with a
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* known internal voltage reference, typically around 1.2V. By measuring this
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* reference with an internally connected ADC channel we can then calculate a more
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* accurate value for Vref+ instead of assuming that it is 3.3V
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*
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* @param intVRefAdcValue reading from the internal calibration voltage
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*
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* @return the calculated value of Vref+
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*/
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uint16_t adcInternalCompensateVref(uint16_t intVRefAdcValue)
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{
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// This is essentially a tuned version of
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// __HAL_ADC_CALC_VREFANALOG_VOLTAGE(vrefAdcValue, ADC_RESOLUTION_12B);
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return (uint16_t)((uint32_t)(adcVREFINTCAL * VREFINT_CAL_VREF) / vrefAdcValue);
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return (uint16_t)((uint32_t)(adcVREFINTCAL * VREFINT_CAL_VREF) / intVRefAdcValue);
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}
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int16_t adcInternalComputeTemperature(uint16_t tempAdcValue, uint16_t vrefValue)
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@ -76,13 +76,20 @@ typedef enum {
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ADC_TEMPSENSOR = 4,
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ADC_VREFINT = 5,
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ADC_VBAT4 = 6,
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#elif defined(AT32F435)
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ADC_CHANNEL_INTERNAL_FIRST_ID = 4,
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ADC_TEMPSENSOR = 4,
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ADC_VREFINT = 5,
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// ADC_VBAT4 = 6,
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#endif
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ADC_CHANNEL_COUNT
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} AdcChannel;
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typedef struct adcOperatingConfig_s {
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ioTag_t tag;
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#if defined(STM32H7) || defined(STM32G4)
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#if defined(STM32H7) || defined(STM32G4) || defined(AT32F435)
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ADCDevice adcDevice; // ADCDEV_x for this input
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uint32_t adcChannel; // Channel number for this input. Note that H7 and G4 HAL requires this to be 32-bit encoded number.
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#else
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@ -27,6 +27,12 @@
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#if defined(STM32F4) || defined(STM32F7)
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#define ADC_TAG_MAP_COUNT 16
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#elif defined(AT32F435)
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#ifdef USE_ADC_INTERNAL
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#define ADC_TAG_MAP_COUNT 18
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#else
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#define ADC_TAG_MAP_COUNT 16
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#endif
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#elif defined(STM32H7)
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#ifdef USE_ADC_INTERNAL
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#define ADC_TAG_MAP_COUNT 30
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@ -47,7 +53,7 @@ typedef struct adcTagMap_s {
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ioTag_t tag;
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uint8_t devices;
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uint32_t channel;
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#if defined(STM32H7) || defined(STM32G4)
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#if defined(STM32H7) || defined(STM32G4) || defined(AT32F435)
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uint8_t channelOrdinal;
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#endif
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} adcTagMap_t;
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@ -139,3 +145,12 @@ void adcGetChannelValues(void);
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#define TEMPSENSOR_CAL1_TEMP ((int32_t) 30)
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#define TEMPSENSOR_CAL2_TEMP ((int32_t) 110)
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#endif
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#ifdef AT32F435
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#define VREFINT_EXPECTED (1489U) // The raw ADC reading at 12bit resolution expected for the 1V2 internal ref
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#define VREFINT_CAL_VREF (3300U) // The nominal external Vref+ for the above reading
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#define TEMPSENSOR_CAL_VREFANALOG (3300U)
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#define TEMPSENSOR_CAL1_TEMP (25U)
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#define TEMPSENSOR_CAL1_V (1.27f)
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#define TEMPSENSOR_SLOPE (-4.13f) // mV/C
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#endif
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@ -18,9 +18,31 @@
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* Read internal and external analog channels
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*
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* Internal channels provide temperature and the internal voltage reference
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* External channels are for vbat, rssi, current and a generic 'external' inputs
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*
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* The ADC is free running and so doesn't require a timer. Samples are moved from
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* the ADC output register to a buffer by DMA
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*
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* The sample rate is kept low to reduce impact on the DMA controller, and the lowest
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* priority is set for the DMA transfer. It's also recommended to use the highest numbered
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* DMA channel on the dma controller for ADC, since that is the lowest priority channel
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* for transfers at the same DMA priority.
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*
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* Sample rate is set between 1 and 2kHz by using a long input sampling time and reasonably
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* high hardware oversampling.
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*
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* Note that only ADC1 is used, although the code contains remnants of support for all
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* three ADC.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#include <math.h>
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#include "platform.h"
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@ -47,23 +69,27 @@ const adcDevice_t adcHardware[ADCDEV_COUNT] = {
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{
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.ADCx = ADC1,
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.rccADC = RCC_APB2(ADC1),
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#if !defined(USE_DMA_SPEC)
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.dmaResource = NULL
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#endif
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},
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{
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.ADCx = ADC2,
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.rccADC = RCC_APB2(ADC2),
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#if !defined(USE_DMA_SPEC)
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.dmaResource = NULL
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#endif
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},
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{
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.ADCx = ADC3,
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.rccADC = RCC_APB2(ADC3),
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#if !defined(USE_DMA_SPEC)
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.dmaResource = NULL
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#endif
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},
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};
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adcDevice_t adcDevice[ADCDEV_COUNT];
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#define ADC_CHANNEL_VREFINT ADC_CHANNEL_17
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#define ADC_CHANNEL_TEMPSENSOR_ADC1 ADC_CHANNEL_16
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@ -93,19 +119,38 @@ const adcTagMap_t adcTagMap[] = {
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{ DEFIO_TAG_E__PC5, ADC_DEVICES_12, ADC_CHANNEL_15, 15 },
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};
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void adcInitDevice(adcDevice_t *adcdev, int channelCount)
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static volatile DMA_DATA uint32_t adcConversionBuffer[ADC_CHANNEL_COUNT];
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/**
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* Initialise the specified ADC to read multiple channels in repeat mode
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*
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* Sets 12 bit resolution, right aligned
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*
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* @param dev Specifies the ADC device to use
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* @param channelCount how many channels to repeat over
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*
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*/
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void adcInitDevice(const adc_type *dev, const int channelCount)
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{
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adc_base_config_type adc_base_struct;
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adc_base_default_para_init(&adc_base_struct);
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adc_base_struct.sequence_mode = TRUE;
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adc_base_struct.repeat_mode = TRUE;
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adc_base_default_para_init(&adc_base_struct); // not currently needed, but insurance against the struct being changed in the future
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adc_base_struct.sequence_mode = TRUE; // reading multiple channels
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adc_base_struct.repeat_mode = TRUE; // free running, so no need to retrigger
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adc_base_struct.data_align = ADC_RIGHT_ALIGNMENT;
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adc_base_struct.ordinary_channel_length = channelCount;
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adc_base_config(adcdev->ADCx, &adc_base_struct);
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adc_resolution_set(adcdev->ADCx, ADC_RESOLUTION_12B);
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adc_base_config((adc_type *)dev, &adc_base_struct);
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adc_resolution_set((adc_type *)dev, ADC_RESOLUTION_12B);
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}
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int adcFindTagMapEntry(ioTag_t tag)
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/**
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* Find a given pin (defined by ioTag) in the map
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*
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* @param tag the ioTag to search for
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* @return the index in adcTagMap corresponding to the given ioTag or -1 if not found
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*/
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int adcFindTagMapEntry(const ioTag_t tag)
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{
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for (int i = 0; i < ADC_TAG_MAP_COUNT; i++) {
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if (adcTagMap[i].tag == tag) {
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@ -115,13 +160,82 @@ int adcFindTagMapEntry(ioTag_t tag)
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return -1;
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}
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volatile DMA_DATA uint32_t adcConversionBuffer[ADC_CHANNEL_COUNT];
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/**
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* Setup the scaling offsets and factors used in adc.c
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* @see src/main/drivers/adc.c
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* @see src/main/drivers/adc_impl.h
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*
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* There are a number of global calibration/scaling factors used in src/main/drivers/adc.c that need to
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* be set to appropriate values if we want to re-use existing code, e.g. adcInternalComputeTemperature
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* (the alternative would be to duplicate the code into ST and AT specific versions).
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* This is made a little confusing since the implementation based on ST datasheets approaches the calculation with
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* different formula and express the scaling factors in different units compared to the AT datasheets.
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* The constants are defined in src/main/drivers/adc_impl.h. It seems clearest to use the units from
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* the datasheet when defining those values, so here we have to convert to what's expected in
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* adcInternalComputeTemperature.
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*/
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void setScalingFactors(void)
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{
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// The expected reading for 1.2V internal reference if external vref+ was 3.3V
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adcVREFINTCAL = VREFINT_EXPECTED;
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// adcTSCAL1 needs to be the raw ADC value at 25C, but we can't adjust it for VREF+ because we haven't calculated it yet
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// So this will have to be aproximate (and the use should be fixed at some point)
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adcTSCAL1 = (TEMPSENSOR_CAL1_V * 4095.0f) / 3.3f;
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// TEMPSENSOR_SLOPE is given in mv/C.
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// adcTSSlopeK has the opposite sign compared to the AT32 standard because adcInternalComputeTemperature subtracts
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// the calibration value from the reading where as the AT32 docs subtract the reading from the calibration.
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// 3300/4095 converts the reading to mV and the factor of 1000 is needed to prevent the slope from rounding to 0.
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// The intermediate result when this is used is in mC, and adcInternalComputeTemperature then divides by 1000
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// to get an answer in C
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adcTSSlopeK = lrintf(-3300.0f*1000.0f/4095.0f/TEMPSENSOR_SLOPE);
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}
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/**
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* Setup the ADC so that it's running in the background and ready to
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* provide channel data
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*
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* Notes:
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* This code only uses ADC1 despite appearances to the contrary, and has not been tested with the other ADCs
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*
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* From the RM:
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* ADCCLK must be less than 80 MHz, while the ADCCLK frequency must be lower than PCLK2
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*
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* PCLK2 looks like it's running at 144Mhz, but should be confirmed
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*
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* With HCLK of 288, a divider of 4 gives an ADCCLK of 72MHz
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*
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* sample time is
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* ADC_SAMPLE + nbits + 0.5 ADCCLK periods
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*
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* So with 12bit samples and ADC_SAMPLE_92_5 that's 105 clks.
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*
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* We're using HCLK/4, so 288/4 = 72MHz, each tick is 14ns. Add 5 clks for the interval between conversions,
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* 110 clks total is 1.54us per channel.
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*
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* Max 6 channels is a total of 9.24us, or a basic sample rate of 108kHz per channel
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*
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* If we use 64x oversampling we'll get an effective rate of 1.7kHz per channel which should still be plenty.
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*
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* (RM and DS mention fast and slow channels, but don't give details on how this affects the above.
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* It's not relevant to our use case, so ignore the difference for now)
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*
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* Called from fc/init.c
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*
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* @param config - defines the channels to use for each external input (vbat, rssi, current, external) and also has calibration values for the temperature sensor
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*
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*/
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void adcInit(const adcConfig_t *config)
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{
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memset(adcOperatingConfig, 0, sizeof(adcOperatingConfig));
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memcpy(adcDevice, adcHardware, sizeof(adcDevice));
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uint32_t nChannelsUsed[ADCDEV_COUNT] = {0};
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setScalingFactors();
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memset(adcOperatingConfig, 0, sizeof(adcOperatingConfig)); // adcOperatingConfig defined in generic adc.c
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// Set channels (ioTags) for enabled ADC inputs
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if (config->vbat.enabled) {
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adcOperatingConfig[ADC_BATTERY].tag = config->vbat.ioTag;
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}
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@ -138,6 +252,8 @@ void adcInit(const adcConfig_t *config)
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adcOperatingConfig[ADC_CURRENT].tag = config->current.ioTag;
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}
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// loop over all possible channels and build the adcOperatingConfig to represent
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// the set of enabled channels
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for (int i = 0; i < ADC_CHANNEL_COUNT; i++) {
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int map;
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int dev;
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@ -158,89 +274,110 @@ void adcInit(const adcConfig_t *config)
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continue;
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}
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for (dev = 0; dev < ADCDEV_COUNT; dev++) {
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#ifndef USE_DMA_SPEC
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if (!adcDevice[dev].ADCx || !adcDevice[dev].dmaResource) {
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continue;
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}
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#else
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if (!adcDevice[dev].ADCx) {
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continue;
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}
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#endif
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// Since ADC1 can do all channels this will only ever return adc1 and is unnecessary
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if (adcTagMap[map].devices & (1 << dev)) {
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break;
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}
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// Find an ADC instance that can be used for the given TagMap index.
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// for (dev = 0; dev < ADCDEV_COUNT; dev++) {
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// #ifndef USE_DMA_SPEC
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// if (!adcDevice[dev].ADCx || !adcDevice[dev].dmaResource) {
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// continue;
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// }
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// #else
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// if (!adcDevice[dev].ADCx) {
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// continue;
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// }
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// #endif
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if (dev == ADCDEV_COUNT) {
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continue;
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}
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}
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// if (adcTagMap[map].devices & (1 << dev)) {
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// break;
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// }
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// }
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dev = ADCDEV_1;
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}
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adcOperatingConfig[i].adcDevice = dev;
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adcOperatingConfig[i].adcChannel = adcTagMap[map].channel;
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adcOperatingConfig[i].sampleTime = ADC_SAMPLING_INTERVAL_5CYCLES;
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adcOperatingConfig[i].sampleTime = ADC_SAMPLETIME_92_5;
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adcOperatingConfig[i].enabled = true;
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adcDevice[dev].channelBits |= (1 << adcTagMap[map].channelOrdinal);
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nChannelsUsed[dev] += 1; // increase the active channel count for this device
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// Enable the gpio for analog input
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if (adcOperatingConfig[i].tag) {
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IOInit(IOGetByTag(adcOperatingConfig[i].tag), OWNER_ADC_BATT + i, 0);
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IOConfigGPIO(IOGetByTag(adcOperatingConfig[i].tag), IO_CONFIG(GPIO_MODE_ANALOG,GPIO_DRIVE_STRENGTH_MODERATE, 0, GPIO_PULL_NONE));
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}
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} // for each channel
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adc_reset(); // reset all ADC instances
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// Enable the clock (power up the circuit)
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// This has to be done before calling adc_common_config for reasons that are unclear
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// NB only ADC1 will have any channels, so this loop for pedantry only
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for (int i = 0; i < ADCDEV_COUNT; i++) {
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if (nChannelsUsed[i] > 0) {
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RCC_ClockCmd(adcHardware[0].rccADC, ENABLE);
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}
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}
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// Common config applies equally to all three ADCs, so only apply it once
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adc_common_config_type adc_common_struct;
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adc_common_default_para_init(&adc_common_struct);
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adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
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adc_common_struct.div = ADC_HCLK_DIV_4;
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adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
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adc_common_struct.common_dma_request_repeat_state = FALSE;
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adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
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adc_common_struct.tempervintrv_state = TRUE; // internal channels need to be enabled before use
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adc_common_config(&adc_common_struct);
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// Only adc1 will have any channels assigned to it after the code above, so this can be simplified
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int dmaBufferIndex = 0;
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for (int dev = 0; dev < ADCDEV_COUNT; dev++) {
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adcDevice_t *adc = &adcDevice[dev];
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const adcDevice_t *adc = &adcHardware[dev];
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if (!(adc->ADCx && adc->channelBits)) {
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// skip this device if it doesn't have any active channels
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if (nChannelsUsed[dev] == 0) {
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continue;
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}
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RCC_ClockCmd(adc->rccADC, ENABLE);
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adcInitDevice(adc->ADCx, nChannelsUsed[dev]);
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|
||||
adc_reset();
|
||||
if (adc->ADCx == ADC1) {
|
||||
adc_common_config_type adc_common_struct;
|
||||
adc_common_default_para_init(&adc_common_struct);
|
||||
adc_common_struct.combine_mode = ADC_INDEPENDENT_MODE;
|
||||
adc_common_struct.div = ADC_HCLK_DIV_4;
|
||||
adc_common_struct.common_dma_mode = ADC_COMMON_DMAMODE_DISABLE;
|
||||
adc_common_struct.common_dma_request_repeat_state = FALSE;
|
||||
adc_common_struct.sampling_interval = ADC_SAMPLING_INTERVAL_5CYCLES;
|
||||
adc_common_struct.tempervintrv_state = TRUE;
|
||||
adc_common_struct.vbat_state = TRUE;
|
||||
adc_common_config(&adc_common_struct);
|
||||
}
|
||||
// Set the oversampling ratio and matching shift
|
||||
adc_oversample_ratio_shift_set(adc->ADCx, ADC_OVERSAMPLE_RATIO_64, ADC_OVERSAMPLE_SHIFT_6);
|
||||
|
||||
int configuredAdcChannels = BITCOUNT(adc->channelBits);
|
||||
adcInitDevice(adc, configuredAdcChannels);
|
||||
|
||||
#ifdef USE_DMA_SPEC
|
||||
#ifdef USE_DMA_SPEC
|
||||
|
||||
// Setup the DMA channel so that data is automatically and continuously transferred from the ADC output register
|
||||
// to the results buffer
|
||||
|
||||
const dmaChannelSpec_t *dmaSpec = dmaGetChannelSpecByPeripheral(DMA_PERIPH_ADC, dev, config->dmaopt[dev]);
|
||||
dmaIdentifier_e dmaIdentifier = dmaGetIdentifier(dmaSpec->ref);
|
||||
if (!dmaSpec || !dmaAllocate(dmaIdentifier, OWNER_ADC, RESOURCE_INDEX(dev))) {
|
||||
if (dmaSpec == NULL) {
|
||||
return;
|
||||
}
|
||||
|
||||
dmaEnable(dmaIdentifier);
|
||||
xDMA_DeInit(dmaSpec->ref);
|
||||
dmaIdentifier_e dmaIdentifier = dmaGetIdentifier(dmaSpec->ref);
|
||||
if ( ! dmaAllocate(dmaIdentifier, OWNER_ADC, RESOURCE_INDEX(dev)) ) {
|
||||
return;
|
||||
}
|
||||
|
||||
adc->dmaResource=dmaSpec->ref;
|
||||
dmaEnable(dmaIdentifier); // enables clock/power
|
||||
xDMA_DeInit(dmaSpec->ref);
|
||||
|
||||
dma_init_type dma_init_struct;
|
||||
dma_default_para_init(&dma_init_struct);
|
||||
dma_init_struct.buffer_size = BITCOUNT(adc->channelBits);
|
||||
dma_init_struct.buffer_size = nChannelsUsed[dev];
|
||||
dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
|
||||
dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_WORD;
|
||||
dma_init_struct.memory_inc_enable = TRUE;
|
||||
dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_WORD;
|
||||
dma_init_struct.peripheral_inc_enable = FALSE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
|
||||
dma_init_struct.loop_mode_enable = TRUE;
|
||||
dma_init_struct.priority = DMA_PRIORITY_LOW;
|
||||
dma_init_struct.loop_mode_enable = TRUE; // operate as a circular buffer, no interrupt handling required
|
||||
|
||||
dma_init_struct.memory_base_addr = (uint32_t)&(adcConversionBuffer[dmaBufferIndex]);
|
||||
dma_init_struct.peripheral_base_addr = (uint32_t)&(adc->ADCx->odt);
|
||||
|
|
@ -248,55 +385,42 @@ void adcInit(const adcConfig_t *config)
|
|||
xDMA_Init(dmaSpec->ref, &dma_init_struct);
|
||||
dmaMuxEnable(dmaIdentifier, dmaSpec->dmaMuxId);
|
||||
|
||||
/* enable dma transfer complete interrupt */
|
||||
xDMA_ITConfig(dmaSpec->ref,DMA_IT_TCIF,ENABLE);
|
||||
xDMA_Cmd(dmaSpec->ref,ENABLE);
|
||||
xDMA_Cmd(dmaSpec->ref,TRUE); // means dma_channel_enable
|
||||
|
||||
adc_dma_mode_enable(adc->ADCx, TRUE);
|
||||
adc_dma_request_repeat_enable(adc->ADCx, TRUE);
|
||||
#endif //end of USE_DMA_SPEC
|
||||
|
||||
for (int adcChan = 0; adcChan < ADC_CHANNEL_COUNT; adcChan++) {
|
||||
#endif //end of USE_DMA_SPEC
|
||||
|
||||
if (!adcOperatingConfig[adcChan].enabled) {
|
||||
continue;
|
||||
// set each channel into the auto sequence for this ADC device
|
||||
for (int adcChan = 0; adcChan < ADC_CHANNEL_COUNT; adcChan++)
|
||||
{
|
||||
// only add enabled channels for the current dev (can be simplified if we drop the pretense at handling adc2 and 3)
|
||||
if (adcOperatingConfig[adcChan].enabled && adcOperatingConfig[adcChan].adcDevice == dev)
|
||||
{
|
||||
adcOperatingConfig[adcChan].dmaIndex = dmaBufferIndex++;
|
||||
adc_ordinary_channel_set(adc->ADCx,
|
||||
adcOperatingConfig[adcChan].adcChannel,
|
||||
adcOperatingConfig[adcChan].dmaIndex+1, // This is the sequence number for the adc conversion
|
||||
adcOperatingConfig[adcChan].sampleTime );
|
||||
}
|
||||
|
||||
if (adcOperatingConfig[adcChan].adcDevice != dev) {
|
||||
continue;
|
||||
}
|
||||
|
||||
adcOperatingConfig[adcChan].dmaIndex = dmaBufferIndex++;
|
||||
adc_ordinary_channel_set(adcDevice[dev].ADCx,
|
||||
adcOperatingConfig[adcChan].adcChannel,
|
||||
adcOperatingConfig[adcChan].dmaIndex+1,
|
||||
ADC_SAMPLETIME_92_5);
|
||||
}
|
||||
|
||||
|
||||
if (adc->ADCx==ADC1) {
|
||||
adc_voltage_monitor_threshold_value_set(ADC1, 0x100, 0x000);
|
||||
adc_voltage_monitor_single_channel_select(ADC1, adcOperatingConfig[ADC_BATTERY].adcChannel);
|
||||
adc_voltage_monitor_enable(ADC1, ADC_VMONITOR_SINGLE_ORDINARY);
|
||||
}
|
||||
|
||||
adc_interrupt_enable(adc->ADCx, ADC_OCCO_INT, TRUE);
|
||||
|
||||
adc_enable(adc->ADCx, TRUE);
|
||||
while (adc_flag_get(adc->ADCx, ADC_RDY_FLAG) == RESET);
|
||||
|
||||
dmaBufferIndex += BITCOUNT(adc->channelBits);
|
||||
while (adc_flag_get(adc->ADCx, ADC_RDY_FLAG) == RESET); // wait for ready
|
||||
|
||||
adc_calibration_init(adc->ADCx);
|
||||
while (adc_calibration_init_status_get(adc->ADCx));
|
||||
adc_calibration_start(adc->ADCx);
|
||||
while (adc_calibration_status_get(adc->ADCx));
|
||||
|
||||
adc_enable(adc->ADCx, TRUE);
|
||||
adc_ordinary_software_trigger_enable(adc->ADCx, TRUE);
|
||||
adc_ordinary_software_trigger_enable(adc->ADCx, TRUE); // start sampling
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Copies the latest ADC external channel data into adcValues defined in adc.c
|
||||
*/
|
||||
void adcGetChannelValues(void)
|
||||
{
|
||||
for (int i = 0; i < ADC_CHANNEL_INTERNAL_FIRST_ID; i++) {
|
||||
|
|
@ -308,51 +432,59 @@ void adcGetChannelValues(void)
|
|||
|
||||
#ifdef USE_ADC_INTERNAL
|
||||
|
||||
/**
|
||||
* This impl is never busy in the sense of being unable to supply data
|
||||
*/
|
||||
bool adcInternalIsBusy(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
* Nop, since the ADC is free running
|
||||
*/
|
||||
void adcInternalStartConversion(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* Reads a given channel from the DMA buffer
|
||||
*/
|
||||
uint16_t adcInternalRead(int channel)
|
||||
{
|
||||
int dmaIndex = adcOperatingConfig[channel].dmaIndex;
|
||||
const int dmaIndex = adcOperatingConfig[channel].dmaIndex;
|
||||
return adcConversionBuffer[dmaIndex];
|
||||
}
|
||||
|
||||
int adcPrivateVref = -1;
|
||||
int adcPrivateTemp = -1;
|
||||
|
||||
/**
|
||||
* Read the internal Vref and return raw value
|
||||
*
|
||||
* The internal Vref is 1.2V and can be used to calculate the external Vref+
|
||||
* External Vref+ determines the scale for the raw ADC readings but since it
|
||||
* is often directly connected to Vdd (approx 3.3V) it isn't accurately controlled.
|
||||
* Calculating the actual value of Vref+ by using measurements of the known 1.2V
|
||||
* internal reference can improve overall accuracy.
|
||||
*
|
||||
* @return the raw ADC reading for the internal voltage reference
|
||||
* @see adcInternalCompensateVref in src/main/drivers/adc.c
|
||||
*/
|
||||
uint16_t adcInternalReadVrefint(void)
|
||||
{
|
||||
uint16_t value = adcInternalRead(ADC_VREFINT);
|
||||
adcPrivateVref =((double)1.2 * 4095) / value * 1000;
|
||||
return adcPrivateVref;
|
||||
const uint16_t value = adcInternalRead(ADC_VREFINT);
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
/**
|
||||
* Read the internal temperature sensor
|
||||
*
|
||||
* @return the raw ADC reading
|
||||
*/
|
||||
uint16_t adcInternalReadTempsensor(void)
|
||||
{
|
||||
uint16_t value = adcInternalRead(ADC_TEMPSENSOR);
|
||||
adcPrivateTemp = (((ADC_TEMP_BASE- value * ADC_VREF / 4096) / ADC_TEMP_SLOPE) + 25);
|
||||
return adcPrivateTemp;
|
||||
}
|
||||
|
||||
void ADC1_2_3_IRQHandler(void)
|
||||
{
|
||||
for (int dev = 0; dev < ADCDEV_COUNT; dev++) {
|
||||
adcDevice_t *adc = &adcDevice[dev];
|
||||
|
||||
if (!(adc->ADCx && adc->channelBits)) {
|
||||
continue;
|
||||
}
|
||||
if(adc_flag_get(adc->ADCx, ADC_OCCO_FLAG) != RESET) {
|
||||
adc_flag_clear(adc->ADCx, ADC_OCCO_FLAG);
|
||||
}
|
||||
}
|
||||
const uint16_t value = adcInternalRead(ADC_TEMPSENSOR);
|
||||
return value;
|
||||
}
|
||||
|
||||
#endif // USE_ADC_INTERNAL
|
||||
|
|
|
|||
|
|
@ -48,6 +48,8 @@ typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
|
|||
#define USE_DMA_SPEC
|
||||
#define USE_PERSISTENT_OBJECTS
|
||||
#define USE_CUSTOM_DEFAULTS_ADDRESS
|
||||
#define USE_ADC_INTERNAL
|
||||
|
||||
#define USE_LATE_TASK_STATISTICS
|
||||
|
||||
#define TASK_GYROPID_DESIRED_PERIOD 1000 // 1000us = 1kHz
|
||||
|
|
@ -66,3 +68,4 @@ typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
|
|||
#define DMA_RAM_W
|
||||
#define DMA_RAM_RW
|
||||
|
||||
#define USE_LATE_TASK_STATISTICS
|
||||
|
|
|
|||
|
|
@ -74,7 +74,9 @@ typedef struct {
|
|||
channelType_t type;
|
||||
} timerChannelInfo_t;
|
||||
|
||||
#ifdef TIMER_CHANNEL_COUNT
|
||||
timerChannelInfo_t timerChannelInfo[TIMER_CHANNEL_COUNT];
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
uint8_t priority;
|
||||
|
|
@ -353,6 +355,16 @@ void timerConfigure(const timerHardware_t *timerHardwarePtr, uint16_t period, ui
|
|||
// allocate and configure timer channel. Timer priority is set to highest priority of its channels
|
||||
void timerChInit(const timerHardware_t *timHw, channelType_t type, int irqPriority, uint8_t irq)
|
||||
{
|
||||
#ifndef USE_TIMER_MGMT
|
||||
|
||||
UNUSED(timHw);
|
||||
UNUSED(type);
|
||||
UNUSED(irqPriority);
|
||||
UNUSED(irq);
|
||||
return;
|
||||
|
||||
#else
|
||||
|
||||
unsigned channel = timHw - TIMER_HARDWARE;
|
||||
if (channel >= TIMER_CHANNEL_COUNT) {
|
||||
return;
|
||||
|
|
@ -371,6 +383,7 @@ void timerChInit(const timerHardware_t *timHw, channelType_t type, int irqPriori
|
|||
|
||||
timerInfo[timer].priority = irqPriority;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void timerChCCHandlerInit(timerCCHandlerRec_t *self, timerCCHandlerCallback *fn)
|
||||
|
|
@ -666,6 +679,7 @@ void timerInit(void)
|
|||
GPIO_PinRemapConfig(GPIO_PartialRemap_TIM3, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef USE_TIMER_MGMT
|
||||
/* enable the timer peripherals */
|
||||
for (unsigned i = 0; i < TIMER_CHANNEL_COUNT; i++) {
|
||||
RCC_ClockCmd(timerRCC(TIMER_HARDWARE[i].tim), ENABLE);
|
||||
|
|
@ -675,6 +689,7 @@ void timerInit(void)
|
|||
for (unsigned i = 0; i < TIMER_CHANNEL_COUNT; i++) {
|
||||
timerChannelInfo[i].type = TYPE_FREE;
|
||||
}
|
||||
#endif
|
||||
|
||||
for (unsigned i = 0; i < USED_TIMER_COUNT; i++) {
|
||||
timerInfo[i].priority = ~0;
|
||||
|
|
|
|||
|
|
@ -181,8 +181,10 @@ extern const timerHardware_t fullTimerHardware[];
|
|||
|
||||
#else
|
||||
|
||||
#ifdef USABLE_TIMER_CHANNEL_COUNT
|
||||
#define TIMER_CHANNEL_COUNT USABLE_TIMER_CHANNEL_COUNT
|
||||
#define TIMER_HARDWARE timerHardware
|
||||
#endif
|
||||
|
||||
#endif // USE_TIMER_MGMT
|
||||
|
||||
|
|
|
|||
|
|
@ -75,7 +75,7 @@
|
|||
|
||||
#define USE_ACCGYRO_BMI160
|
||||
|
||||
//#define USE_USB_DETECT
|
||||
#define USE_USB_DETECT
|
||||
#define USE_VCP
|
||||
//#define USE_SOFTSERIAL1
|
||||
//#define USE_SOFTSERIAL2
|
||||
|
|
@ -83,7 +83,7 @@
|
|||
|
||||
#define UNIFIED_SERIAL_PORT_COUNT 1
|
||||
|
||||
//#define USE_ADC
|
||||
#define USE_ADC
|
||||
|
||||
#define USE_CUSTOM_DEFAULTS
|
||||
#define USE_PWM_OUTPUT
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue