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Merge remote-tracking branch 'upstream/master'

This commit is contained in:
Marcin Baliniak 2016-09-25 11:57:43 +02:00
commit 419547a2bf
5 changed files with 41 additions and 37 deletions

View file

@ -36,7 +36,7 @@ env:
# - TARGET=REVO_OPBL # - TARGET=REVO_OPBL
# - TARGET=RMDO # - TARGET=RMDO
# - TARGET=SINGULARITY # - TARGET=SINGULARITY
# - TARGET=SIRINFPV - TARGET=SIRINFPV
- TARGET=SPARKY - TARGET=SPARKY
# - TARGET=SPARKY2 # - TARGET=SPARKY2
# - TARGET=SPARKY_OPBL # - TARGET=SPARKY_OPBL

View file

@ -73,14 +73,15 @@ static bool fontIsLoading = false;
static IO_t max7456CsPin = IO_NONE; static IO_t max7456CsPin = IO_NONE;
static uint8_t max7456_send(uint8_t add, uint8_t data) static uint8_t max7456Send(uint8_t add, uint8_t data)
{ {
spiTransferByte(MAX7456_SPI_INSTANCE, add); spiTransferByte(MAX7456_SPI_INSTANCE, add);
return spiTransferByte(MAX7456_SPI_INSTANCE, data); return spiTransferByte(MAX7456_SPI_INSTANCE, data);
} }
#ifdef MAX7456_DMA_CHANNEL_TX #ifdef MAX7456_DMA_CHANNEL_TX
static void max7456_send_dma(void* tx_buffer, void* rx_buffer, uint16_t buffer_size) { static void max7456SendDma(void* tx_buffer, void* rx_buffer, uint16_t buffer_size)
{
DMA_InitTypeDef DMA_InitStructure; DMA_InitTypeDef DMA_InitStructure;
#ifdef MAX7456_DMA_CHANNEL_RX #ifdef MAX7456_DMA_CHANNEL_RX
static uint16_t dummy[] = {0xffff}; static uint16_t dummy[] = {0xffff};
@ -149,8 +150,8 @@ static void max7456_send_dma(void* tx_buffer, void* rx_buffer, uint16_t buffer_s
SPI_I2S_DMAReq_Tx, ENABLE); SPI_I2S_DMAReq_Tx, ENABLE);
} }
void max7456_dma_irq_handler(dmaChannelDescriptor_t* descriptor) { void max7456_dma_irq_handler(dmaChannelDescriptor_t* descriptor)
{
if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF)) { if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF)) {
#ifdef MAX7456_DMA_CHANNEL_RX #ifdef MAX7456_DMA_CHANNEL_RX
DMA_Cmd(MAX7456_DMA_CHANNEL_RX, DISABLE); DMA_Cmd(MAX7456_DMA_CHANNEL_RX, DISABLE);
@ -220,7 +221,7 @@ void max7456ReInit(void)
videoSignalReg = VIDEO_MODE_NTSC | OSD_ENABLE; videoSignalReg = VIDEO_MODE_NTSC | OSD_ENABLE;
break; break;
default: default:
srdata = max7456_send(MAX7456ADD_STAT, 0x00); srdata = max7456Send(MAX7456ADD_STAT, 0x00);
if ((0x02 & srdata) == 0x02) if ((0x02 & srdata) == 0x02)
videoSignalReg = VIDEO_MODE_NTSC | OSD_ENABLE; videoSignalReg = VIDEO_MODE_NTSC | OSD_ENABLE;
} }
@ -235,12 +236,12 @@ void max7456ReInit(void)
// set all rows to same charactor black/white level // set all rows to same charactor black/white level
for(x = 0; x < maxScreenRows; x++) { for(x = 0; x < maxScreenRows; x++) {
max7456_send(MAX7456ADD_RB0 + x, BWBRIGHTNESS); max7456Send(MAX7456ADD_RB0 + x, BWBRIGHTNESS);
} }
// make sure the Max7456 is enabled // make sure the Max7456 is enabled
max7456_send(VM0_REG, videoSignalReg); max7456Send(VM0_REG, videoSignalReg);
max7456_send(DMM_REG, CLEAR_DISPLAY); max7456Send(DMM_REG, CLEAR_DISPLAY);
DISABLE_MAX7456; DISABLE_MAX7456;
//clear shadow to force redraw all screen in non-dma mode //clear shadow to force redraw all screen in non-dma mode
@ -265,7 +266,7 @@ void max7456Init(uint8_t video_system)
spiSetDivisor(MAX7456_SPI_INSTANCE, SPI_CLOCK_STANDARD); spiSetDivisor(MAX7456_SPI_INSTANCE, SPI_CLOCK_STANDARD);
// force soft reset on Max7456 // force soft reset on Max7456
ENABLE_MAX7456; ENABLE_MAX7456;
max7456_send(VM0_REG, MAX7456_RESET); max7456Send(VM0_REG, MAX7456_RESET);
DISABLE_MAX7456; DISABLE_MAX7456;
videoSignalCfg = video_system; videoSignalCfg = video_system;
@ -308,7 +309,8 @@ bool max7456DmaInProgres(void)
} }
#endif #endif
void max7456DrawScreen(void) { void max7456DrawScreen(void)
{
uint8_t check; uint8_t check;
static uint16_t pos = 0; static uint16_t pos = 0;
int k = 0, buff_len=0; int k = 0, buff_len=0;
@ -317,7 +319,7 @@ void max7456DrawScreen(void) {
//-----------------detect MAX7456 fail, or initialize it at startup when it is ready-------- //-----------------detect MAX7456 fail, or initialize it at startup when it is ready--------
max7456Lock = true; max7456Lock = true;
ENABLE_MAX7456; ENABLE_MAX7456;
check = max7456_send(VM0_REG | 0x80, 0x00); check = max7456Send(VM0_REG | 0x80, 0x00);
DISABLE_MAX7456; DISABLE_MAX7456;
if ( check != videoSignalReg) if ( check != videoSignalReg)
@ -348,7 +350,7 @@ void max7456DrawScreen(void) {
if (buff_len) { if (buff_len) {
#ifdef MAX7456_DMA_CHANNEL_TX #ifdef MAX7456_DMA_CHANNEL_TX
if (buff_len > 0) if (buff_len > 0)
max7456_send_dma(spiBuff, NULL, buff_len); max7456SendDma(spiBuff, NULL, buff_len);
#else #else
ENABLE_MAX7456; ENABLE_MAX7456;
for (k=0; k < buff_len; k++) for (k=0; k < buff_len; k++)
@ -370,24 +372,25 @@ void max7456RefreshAll(void)
uint16_t xx; uint16_t xx;
max7456Lock = true; max7456Lock = true;
ENABLE_MAX7456; ENABLE_MAX7456;
max7456_send(MAX7456ADD_DMAH, 0); max7456Send(MAX7456ADD_DMAH, 0);
max7456_send(MAX7456ADD_DMAL, 0); max7456Send(MAX7456ADD_DMAL, 0);
max7456_send(MAX7456ADD_DMM, 1); max7456Send(MAX7456ADD_DMM, 1);
for (xx = 0; xx < maxScreenSize; ++xx) for (xx = 0; xx < maxScreenSize; ++xx)
{ {
max7456_send(MAX7456ADD_DMDI, screenBuffer[xx]); max7456Send(MAX7456ADD_DMDI, screenBuffer[xx]);
shadowBuffer[xx] = screenBuffer[xx]; shadowBuffer[xx] = screenBuffer[xx];
} }
max7456_send(MAX7456ADD_DMDI, 0xFF); max7456Send(MAX7456ADD_DMDI, 0xFF);
max7456_send(MAX7456ADD_DMM, 0); max7456Send(MAX7456ADD_DMM, 0);
DISABLE_MAX7456; DISABLE_MAX7456;
max7456Lock = false; max7456Lock = false;
} }
} }
void max7456WriteNvm(uint8_t char_address, uint8_t *font_data) { void max7456WriteNvm(uint8_t char_address, uint8_t *font_data)
{
uint8_t x; uint8_t x;
#ifdef MAX7456_DMA_CHANNEL_TX #ifdef MAX7456_DMA_CHANNEL_TX
@ -399,13 +402,13 @@ void max7456WriteNvm(uint8_t char_address, uint8_t *font_data) {
ENABLE_MAX7456; ENABLE_MAX7456;
// disable display // disable display
fontIsLoading = true; fontIsLoading = true;
max7456_send(VM0_REG, 0); max7456Send(VM0_REG, 0);
max7456_send(MAX7456ADD_CMAH, char_address); // set start address high max7456Send(MAX7456ADD_CMAH, char_address); // set start address high
for(x = 0; x < 54; x++) { for(x = 0; x < 54; x++) {
max7456_send(MAX7456ADD_CMAL, x); //set start address low max7456Send(MAX7456ADD_CMAL, x); //set start address low
max7456_send(MAX7456ADD_CMDI, font_data[x]); max7456Send(MAX7456ADD_CMDI, font_data[x]);
#ifdef LED0_TOGGLE #ifdef LED0_TOGGLE
LED0_TOGGLE; LED0_TOGGLE;
#else #else
@ -414,10 +417,10 @@ void max7456WriteNvm(uint8_t char_address, uint8_t *font_data) {
} }
// transfer 54 bytes from shadow ram to NVM // transfer 54 bytes from shadow ram to NVM
max7456_send(MAX7456ADD_CMM, WRITE_NVR); max7456Send(MAX7456ADD_CMM, WRITE_NVR);
// wait until bit 5 in the status register returns to 0 (12ms) // wait until bit 5 in the status register returns to 0 (12ms)
while ((max7456_send(MAX7456ADD_STAT, 0x00) & STATUS_REG_NVR_BUSY) != 0x00); while ((max7456Send(MAX7456ADD_STAT, 0x00) & STATUS_REG_NVR_BUSY) != 0x00);
DISABLE_MAX7456; DISABLE_MAX7456;

View file

@ -1369,11 +1369,11 @@ void osdExitMenu(void *ptr)
#ifdef VTX #ifdef VTX
masterConfig.vtxBand = vtxBand; masterConfig.vtxBand = vtxBand;
masterConfig.vtxChannel = vtxChannel - 1; masterConfig.vtx_channel = vtxChannel - 1;
#endif // VTX #endif // VTX
#ifdef USE_RTC6705 #ifdef USE_RTC6705
masterConfig.vtxChannel = vtxBand * 8 + vtxChannel - 1; masterConfig.vtx_channel = vtxBand * 8 + vtxChannel - 1;
#endif // USE_RTC6705 #endif // USE_RTC6705
saveConfigAndNotify(); saveConfigAndNotify();
@ -1400,12 +1400,12 @@ void osdOpenMenu(void)
#ifdef VTX #ifdef VTX
vtxBand = masterConfig.vtxBand; vtxBand = masterConfig.vtxBand;
vtxChannel = masterConfig.vtxChannel + 1; vtxChannel = masterConfig.vtx_channel + 1;
#endif // VTX #endif // VTX
#ifdef USE_RTC6705 #ifdef USE_RTC6705
vtxBand = masterConfig.vtxChannel / 8; vtxBand = masterConfig.vtx_channel / 8;
vtxChannel = masterConfig.vtxChannel % 8 + 1; vtxChannel = masterConfig.vtx_channel % 8 + 1;
#endif // USE_RTC6705 #endif // USE_RTC6705
osdRows = max7456GetRowsCount(); osdRows = max7456GetRowsCount();

View file

@ -89,5 +89,5 @@ const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
{ TIM9, IO_TAG(PA3), TIM_Channel_2, TIM1_BRK_TIM9_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM9 }, // S4_OUT { TIM9, IO_TAG(PA3), TIM_Channel_2, TIM1_BRK_TIM9_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM9 }, // S4_OUT
{ TIM2, IO_TAG(PA2), TIM_Channel_3, TIM2_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM2 }, // S4_OUT { TIM2, IO_TAG(PA2), TIM_Channel_3, TIM2_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM2 }, // S4_OUT
{ TIM5, IO_TAG(PA1), TIM_Channel_2, TIM5_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM5 }, // S5_OUT - GPIO_PartialRemap_TIM3 { TIM5, IO_TAG(PA1), TIM_Channel_2, TIM5_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM5 }, // S5_OUT - GPIO_PartialRemap_TIM3
{ TIM5, IO_TAG(PA0), TIM_Channel_1, TIM5_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM5 }, // S6_OUT { TIM1, IO_TAG(PA8), TIM_Channel_1, TIM1_CC_IRQn, 1, IOCFG_AF_PP_PD, GPIO_AF_TIM1 }, // S6_OUT
}; };

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@ -27,9 +27,10 @@
#endif #endif
#define LED0 PB5 #define LED0 PB5
#define LED1 PB4 //#define LED1 PB4
#define BEEPER PB4 #define BEEPER PB4
#define BEEPER_INVERTED
#define INVERTER PC0 // PC0 used as inverter select GPIO #define INVERTER PC0 // PC0 used as inverter select GPIO
#define INVERTER_USART USART1 #define INVERTER_USART USART1
@ -39,11 +40,11 @@
#define ACC #define ACC
#define USE_ACC_SPI_MPU6000 #define USE_ACC_SPI_MPU6000
#define GYRO_MPU6000_ALIGN CW270_DEG #define GYRO_MPU6000_ALIGN CW180_DEG
#define GYRO #define GYRO
#define USE_GYRO_SPI_MPU6000 #define USE_GYRO_SPI_MPU6000
#define ACC_MPU6000_ALIGN CW270_DEG #define ACC_MPU6000_ALIGN CW180_DEG
// MPU6000 interrupts // MPU6000 interrupts
#define USE_EXTI #define USE_EXTI
@ -131,4 +132,4 @@
#define TARGET_IO_PORTD 0xffff #define TARGET_IO_PORTD 0xffff
#define USABLE_TIMER_CHANNEL_COUNT 12 #define USABLE_TIMER_CHANNEL_COUNT 12
#define USED_TIMERS ( TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(12) | TIM_N(8) | TIM_N(9)) #define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(12) | TIM_N(8) | TIM_N(9))