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Merge pull request #11461 from hydra/bf-elrs-cleanup-1

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ELRS / NVIC cleanup
This commit is contained in:
haslinghuis 2022-04-13 21:07:11 +02:00 • committed by GitHub
commit 42208ae46e
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GPG key ID: 4AEE18F83AFDEB23
2 changed files with 8 additions and 24 deletions
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7
src/main/drivers/nvic.h
View file

@ -30,13 +30,12 @@
#define NVIC_PRIO_TRANSPONDER_DMA NVIC_BUILD_PRIORITY(3, 0)
// RX_SPI must be lower priority than SPI DMA so EXTI ISRs don't interfere with SPI transfers and transfer complete callbacks
#define NVIC_PRIO_RX_SPI_INT_EXTI NVIC_BUILD_PRIORITY(3, 0x0f)
#define NVIC_PRIO_RX_INT_EXTI NVIC_BUILD_PRIORITY(3, 0x0f)
#define NVIC_PRIO_RX_BUSY_EXTI NVIC_BUILD_PRIORITY(3, 0x0f)
#define NVIC_PRIO_MPU_INT_EXTI NVIC_BUILD_PRIORITY(0x0f, 0x0f)
#define NVIC_PRIO_MAG_INT_EXTI NVIC_BUILD_PRIORITY(0x0f, 0x0f)
#define NVIC_PRIO_WS2811_DMA NVIC_BUILD_PRIORITY(1, 2) // TODO - is there some reason to use high priority? (or to use DMA IRQ at all?)
#define NVIC_PRIO_WS2811_DMA NVIC_BUILD_PRIORITY(1, 2) // TODO - is there some reason to use high priority?
#define NVIC_PRIO_SERIALUART_TXDMA NVIC_BUILD_PRIORITY(1, 1) // Highest of all SERIALUARTx_TXDMA
#define NVIC_PRIO_SERIALUART1_TXDMA NVIC_BUILD_PRIORITY(1, 1)
#define NVIC_PRIO_SERIALUART1_RXDMA NVIC_BUILD_PRIORITY(1, 1)
@ -75,10 +74,6 @@
#define NVIC_PRIO_I2C_EV NVIC_BUILD_PRIORITY(0, 0)
#define NVIC_PRIO_USB NVIC_BUILD_PRIORITY(2, 0)
#define NVIC_PRIO_USB_WUP NVIC_BUILD_PRIORITY(1, 0)
#define NVIC_PRIO_SONAR_ECHO NVIC_BUILD_PRIORITY(0x0f, 0x0f)
#define NVIC_PRIO_MPU_DATA_READY NVIC_BUILD_PRIORITY(0, 1)
#define NVIC_PRIO_MAG_DATA_READY NVIC_BUILD_PRIORITY(0x0f, 0x0f)
#define NVIC_PRIO_CALLBACK NVIC_BUILD_PRIORITY(0x0f, 0x0f)
#define NVIC_PRIO_SPI_DMA NVIC_BUILD_PRIORITY(0, 0)
#define NVIC_PRIO_SDIO_DMA NVIC_BUILD_PRIORITY(0, 0)

25
src/main/drivers/rx/rx_sx127x.c
View file

@ -76,27 +76,16 @@ static bool sx127xDetectChip(void)
uint8_t sx127xISR(timeUs_t *timeStamp)
{
bool extiTriggered = false;
timeUs_t extiTimestamp;
timeUs_t extiTimestamp = rxSpiGetLastExtiTimeUs();
ATOMIC_BLOCK(NVIC_PRIO_RX_SPI_INT_EXTI) {
// prevent a data-race that can occur if a new EXTI ISR occurs during this block.
extiTriggered = rxSpiPollExti();
extiTimestamp = rxSpiGetLastExtiTimeUs();
if (extiTriggered) {
rxSpiResetExti();
}
rxSpiResetExti();
uint8_t irqReason = sx127xGetIrqReason();
if (extiTimestamp) {
*timeStamp = extiTimestamp;
}
if (extiTriggered) {
uint8_t irqReason = sx127xGetIrqReason();
if (extiTimestamp) {
*timeStamp = extiTimestamp;
}
return irqReason;
}
return 0;
return irqReason;
}
bool sx127xInit(IO_t resetPin, IO_t busyPin)