diff --git a/src/main/drivers/bus_spi_impl.h b/src/main/drivers/bus_spi_impl.h
index cccca9a73d..556303da52 100644
--- a/src/main/drivers/bus_spi_impl.h
+++ b/src/main/drivers/bus_spi_impl.h
@@ -26,7 +26,7 @@
 
 typedef struct spiPinDef_s {
     ioTag_t pin;
-#if defined(STM32F7) || defined(STM32H7) || defined(STM32G4) || defined(AT32F4) || defined(APM32F4)
+#if SPI_TRAIT_AF_PIN //TODO: move to GPIO
     uint8_t af;
 #endif
 } spiPinDef_t;
@@ -37,33 +37,37 @@ typedef struct spiHardware_s {
     spiPinDef_t sckPins[MAX_SPI_PIN_SEL];
     spiPinDef_t misoPins[MAX_SPI_PIN_SEL];
     spiPinDef_t mosiPins[MAX_SPI_PIN_SEL];
-#ifndef STM32F7
+#if SPI_TRAIT_AF_PORT
     uint8_t af;
 #endif
+#if PLATFORM_TRAIT_RCC
     rccPeriphTag_t rcc;
+#endif
 #ifdef USE_DMA
     uint8_t dmaIrqHandler;
 #endif
 } spiHardware_t;
 
-extern const spiHardware_t spiHardware[];
+extern const spiHardware_t spiHardware[SPIDEV_COUNT];
 
 typedef struct SPIDevice_s {
     SPI_TypeDef *dev;
     ioTag_t sck;
     ioTag_t miso;
     ioTag_t mosi;
-#if defined(STM32F7) || defined(STM32H7) || defined(STM32G4) || defined(AT32F4) || defined(APM32F4)
+#if SPI_TRAIT_AF_PIN
     uint8_t sckAF;
     uint8_t misoAF;
     uint8_t mosiAF;
 #else
     uint8_t af;
 #endif
-#if defined(HAL_SPI_MODULE_ENABLED)
+#if SPI_TRAIT_HANDLE
     SPI_HandleTypeDef hspi;
 #endif
+#if PLATFORM_TRAIT_RCC
     rccPeriphTag_t rcc;
+#endif
     volatile uint16_t errorCount;
     bool leadingEdge;
 #ifdef USE_DMA
diff --git a/src/platform/APM32/include/platform/platform.h b/src/platform/APM32/include/platform/platform.h
index a2798016e9..368440773c 100644
--- a/src/platform/APM32/include/platform/platform.h
+++ b/src/platform/APM32/include/platform/platform.h
@@ -104,8 +104,6 @@
 #define U_ID_1 (*(uint32_t*)0x1fff7a14)
 #define U_ID_2 (*(uint32_t*)0x1fff7a18)
 
-#define USE_PIN_AF
-
 #ifndef APM32F4
 #define APM32F4
 #endif
@@ -197,6 +195,8 @@
 #define I2CDEV_COUNT 3
 #define I2C_TRAIT_HANDLE 1
 
+#define SPI_TRAIT_AF_PIN 1
+
 #define UARTHARDWARE_MAX_PINS 4
 
 #define UART_REG_RXD(base) ((base)->DATA)
diff --git a/src/platform/AT32/include/platform/platform.h b/src/platform/AT32/include/platform/platform.h
index 9da68a042c..7e0a352450 100644
--- a/src/platform/AT32/include/platform/platform.h
+++ b/src/platform/AT32/include/platform/platform.h
@@ -57,8 +57,6 @@ typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
 #define U_ID_1 (*(uint32_t*)0x1ffff7ec)
 #define U_ID_2 (*(uint32_t*)0x1ffff7f0)
 
-#define USE_PIN_AF
-
 #ifndef AT32F4
 #define AT32F4
 #endif
@@ -151,7 +149,7 @@ typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
 #define I2C_TRAIT_AF_PIN        1
 #define I2CDEV_COUNT            4
 #define I2C_TRAIT_HANDLE        1
-
+#define SPI_TRAIT_AF_PIN        1
 #define UARTHARDWARE_MAX_PINS   5
 
 #define UART_REG_RXD(base) ((base)->dt)
diff --git a/src/platform/STM32/include/platform/platform.h b/src/platform/STM32/include/platform/platform.h
index 52f5ef8e56..53ea0cf11b 100644
--- a/src/platform/STM32/include/platform/platform.h
+++ b/src/platform/STM32/include/platform/platform.h
@@ -39,7 +39,8 @@
 #define U_ID_1 (*(uint32_t*)(UID_BASE + 4))
 #define U_ID_2 (*(uint32_t*)(UID_BASE + 8))
 
-#define USE_PIN_AF
+#define SPI_TRAIT_AF_PIN 1
+#define I2C_TRAIT_AF_PIN 1
 
 #ifndef STM32G4
 #define STM32G4
@@ -64,7 +65,8 @@
 #define U_ID_1 (*(uint32_t*)(UID_BASE + 4))
 #define U_ID_2 (*(uint32_t*)(UID_BASE + 8))
 
-#define USE_PIN_AF
+#define SPI_TRAIT_AF_PIN 1
+#define I2C_TRAIT_AF_PIN 1
 
 #ifndef STM32H7
 #define STM32H7
@@ -89,7 +91,7 @@
 #define U_ID_1 (*(uint32_t*)(UID_BASE + 4))
 #define U_ID_2 (*(uint32_t*)(UID_BASE + 8))
 
-#define USE_PIN_AF
+#define SPI_TRAIT_AF_PIN 1
 
 #ifndef STM32F7
 #define STM32F7
@@ -104,6 +106,11 @@
 #define U_ID_1 (*(uint32_t*)0x1fff7a14)
 #define U_ID_2 (*(uint32_t*)0x1fff7a18)
 
+#define SPI_TRAIT_AF_PORT 1
+
+#define I2C_TRAIT_STATE 1
+#define I2C_TRAIT_AF_PIN 1
+
 #ifndef STM32F4
 #define STM32F4
 #endif
@@ -420,16 +427,13 @@ extern uint8_t _dmaram_end__;
 #define SERIAL_TRAIT_PIN_CONFIG 1
 #define USB_DP_PIN PA12
 
-#if defined(STM32F4)
-#define I2C_TRAIT_STATE 1
-#endif
-
-#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4)
-#define I2C_TRAIT_AF_PIN 1
-#endif
-
 #if defined(USE_HAL_DRIVER)
 #define I2C_TRAIT_HANDLE 1
+
+#if defined(HAL_SPI_MODULE_ENABLED)
+#define SPI_TRAIT_HANDLE 1
+#endif
+
 #endif
 
 #if defined(STM32F4)
diff --git a/src/platform/common/stm32/bus_spi_pinconfig.c b/src/platform/common/stm32/bus_spi_pinconfig.c
index 59c68b214a..02cc24ac9a 100644
--- a/src/platform/common/stm32/bus_spi_pinconfig.c
+++ b/src/platform/common/stm32/bus_spi_pinconfig.c
@@ -348,21 +348,20 @@ const spiHardware_t spiHardware[] = {
         .device = SPIDEV_1,
         .reg = SPI1,
         .sckPins = {
-            { DEFIO_TAG_E(PA5) ,GPIO_MUX_5},
-            { DEFIO_TAG_E(PB3) ,GPIO_MUX_5},
-            { DEFIO_TAG_E(PE13),GPIO_MUX_4},
+            { DEFIO_TAG_E(PA5),   GPIO_MUX_5},
+            { DEFIO_TAG_E(PB3),   GPIO_MUX_5},
+            { DEFIO_TAG_E(PE13),  GPIO_MUX_4},
         },
         .misoPins = {
-            { DEFIO_TAG_E(PA6) ,GPIO_MUX_5},
-            { DEFIO_TAG_E(PB4) ,GPIO_MUX_5},
-            { DEFIO_TAG_E(PE14),GPIO_MUX_4}
+            { DEFIO_TAG_E(PA6),   GPIO_MUX_5},
+            { DEFIO_TAG_E(PB4),   GPIO_MUX_5},
+            { DEFIO_TAG_E(PE14),  GPIO_MUX_4}
         },
         .mosiPins = {
-            { DEFIO_TAG_E(PA7) ,GPIO_MUX_5},
-            { DEFIO_TAG_E(PB5) ,GPIO_MUX_5},
-            { DEFIO_TAG_E(PE15),GPIO_MUX_4},
+            { DEFIO_TAG_E(PA7),   GPIO_MUX_5},
+            { DEFIO_TAG_E(PB5),   GPIO_MUX_5},
+            { DEFIO_TAG_E(PE15),  GPIO_MUX_4},
         },
-        .af= 0x00,
         .rcc = RCC_APB2(SPI1),
     },
     {
@@ -370,7 +369,7 @@ const spiHardware_t spiHardware[] = {
         .reg = SPI2,
         .sckPins = {
              { DEFIO_TAG_E(PB10), GPIO_MUX_5},
-             { DEFIO_TAG_E(PB13) ,GPIO_MUX_5},
+             { DEFIO_TAG_E(PB13), GPIO_MUX_5},
              { DEFIO_TAG_E(PC7),  GPIO_MUX_5},
              { DEFIO_TAG_E(PD1),  GPIO_MUX_6},
 
@@ -387,7 +386,6 @@ const spiHardware_t spiHardware[] = {
             { DEFIO_TAG_E(PC3),   GPIO_MUX_5},
             { DEFIO_TAG_E(PD4),   GPIO_MUX_6},
         },
-        .af= 0x00,
         .rcc = RCC_APB1(SPI2),
     },
     {
@@ -409,7 +407,6 @@ const spiHardware_t spiHardware[] = {
             { DEFIO_TAG_E(PC12),  GPIO_MUX_6},
             { DEFIO_TAG_E(PD0),  GPIO_MUX_6},
         },
-        .af= 0x00,
         .rcc = RCC_APB1(SPI3),
     },
     {
@@ -428,7 +425,6 @@ const spiHardware_t spiHardware[] = {
             { DEFIO_TAG_E(PA1),   GPIO_MUX_5},
             { DEFIO_TAG_E(PB9),   GPIO_MUX_6},
         },
-        .af= 0x00,
         .rcc = RCC_APB2(SPI4),
     },
 #endif
@@ -505,19 +501,19 @@ void spiPinConfigure(const spiPinConfig_t *pConfig)
         for (int pindex = 0 ; pindex < MAX_SPI_PIN_SEL ; pindex++) {
             if (pConfig[device].ioTagSck == hw->sckPins[pindex].pin) {
                 pDev->sck = hw->sckPins[pindex].pin;
-#if defined(USE_PIN_AF)
+#if SPI_TRAIT_AF_PIN
                 pDev->sckAF = hw->sckPins[pindex].af;
 #endif
             }
             if (pConfig[device].ioTagMiso == hw->misoPins[pindex].pin) {
                 pDev->miso = hw->misoPins[pindex].pin;
-#if defined(USE_PIN_AF)
+#if SPI_TRAIT_AF_PIN
                 pDev->misoAF = hw->misoPins[pindex].af;
 #endif
             }
             if (pConfig[device].ioTagMosi == hw->mosiPins[pindex].pin) {
                 pDev->mosi = hw->mosiPins[pindex].pin;
-#if defined(USE_PIN_AF)
+#if SPI_TRAIT_AF_PIN
                 pDev->mosiAF = hw->mosiPins[pindex].af;
 #endif
             }
@@ -525,7 +521,7 @@ void spiPinConfigure(const spiPinConfig_t *pConfig)
 
         if (pDev->sck && pDev->miso && pDev->mosi) {
             pDev->dev = hw->reg;
-#if !defined(USE_PIN_AF)
+#if SPI_TRAIT_AF_PORT
             pDev->af = hw->af;
 #endif
             pDev->rcc = hw->rcc;