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Implement queuing of SPI request segments

Use union in busSegment_t as per ledvinap feedback
This commit is contained in:
Steve Evans 2022-01-01 02:31:18 +00:00
parent ea53e32db4
commit 4aab87539f
11 changed files with 190 additions and 185 deletions

View file

@ -171,8 +171,8 @@ void spiReadWriteBuf(const extDevice_t *dev, uint8_t *txData, uint8_t *rxData, i
{
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{txData, rxData, len, true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {txData, rxData}, len, true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -200,8 +200,8 @@ uint8_t spiReadWrite(const extDevice_t *dev, uint8_t data)
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{&data, &retval, sizeof(data), true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {&data, &retval}, sizeof(data), true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -218,9 +218,9 @@ uint8_t spiReadWriteReg(const extDevice_t *dev, uint8_t reg, uint8_t data)
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{&reg, NULL, sizeof(reg), false, NULL},
{&data, &retval, sizeof(data), true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {&reg, NULL}, sizeof(reg), false, NULL},
{.u.buffers = {&data, &retval}, sizeof(data), true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -235,8 +235,8 @@ void spiWrite(const extDevice_t *dev, uint8_t data)
{
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{&data, NULL, sizeof(data), true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {&data, NULL}, sizeof(data), true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -249,9 +249,9 @@ void spiWriteReg(const extDevice_t *dev, uint8_t reg, uint8_t data)
{
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{&reg, NULL, sizeof(reg), false, NULL},
{&data, NULL, sizeof(data), true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {&reg, NULL}, sizeof(reg), false, NULL},
{.u.buffers = {&data, NULL}, sizeof(data), true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -277,9 +277,9 @@ void spiReadRegBuf(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t l
{
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{&reg, NULL, sizeof(reg), false, NULL},
{NULL, data, length, true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {&reg, NULL}, sizeof(reg), false, NULL},
{.u.buffers = {NULL, data}, length, true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -311,9 +311,9 @@ void spiWriteRegBuf(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint32_t
{
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{&reg, NULL, sizeof(reg), false, NULL},
{data, NULL, length, true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {&reg, NULL}, sizeof(reg), false, NULL},
{.u.buffers = {data, NULL}, length, true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -327,9 +327,9 @@ uint8_t spiReadReg(const extDevice_t *dev, uint8_t reg)
uint8_t data;
// This routine blocks so no need to use static data
busSegment_t segments[] = {
{&reg, NULL, sizeof(reg), false, NULL},
{NULL, &data, sizeof(data), true, NULL},
{NULL, NULL, 0, true, NULL},
{.u.buffers = {&reg, NULL}, sizeof(reg), false, NULL},
{.u.buffers = {NULL, &data}, sizeof(data), true, NULL},
{.u.buffers = {NULL, NULL}, 0, true, NULL},
};
spiSequence(dev, &segments[0]);
@ -408,12 +408,12 @@ static void spiIrqHandler(const extDevice_t *dev)
if (nextSegment->len == 0) {
// If a following transaction has been linked, start it
if (nextSegment->txData) {
const extDevice_t *nextDev = (const extDevice_t *)nextSegment->txData;
busSegment_t *nextSegments = (busSegment_t *)nextSegment->rxData;
if (nextSegment->u.link.dev) {
const extDevice_t *nextDev = nextSegment->u.link.dev;
busSegment_t *nextSegments = nextSegment->u.link.segments;
// The end of the segment list has been reached
bus->curSegment = nextSegments;
nextSegment->txData = NULL;
nextSegment->u.link.dev = NULL;
spiSequenceStart(nextDev);
} else {
// The end of the segment list has been reached, so mark transactions as complete
@ -456,15 +456,15 @@ static void spiRxIrqHandler(dmaChannelDescriptor_t* descriptor)
#ifdef __DCACHE_PRESENT
#ifdef STM32H7
if (bus->curSegment->rxData &&
((bus->curSegment->rxData < &_dmaram_start__) || (bus->curSegment->rxData >= &_dmaram_end__))) {
if (bus->curSegment->u.buffers.rxData &&
((bus->curSegment->u.buffers.rxData < &_dmaram_start__) || (bus->curSegment->u.buffers.rxData >= &_dmaram_end__))) {
#else
if (bus->curSegment->rxData) {
if (bus->curSegment->u.buffers.rxData) {
#endif
// Invalidate the D cache covering the area into which data has been read
SCB_InvalidateDCache_by_Addr(
(uint32_t *)((uint32_t)bus->curSegment->rxData & ~CACHE_LINE_MASK),
(((uint32_t)bus->curSegment->rxData & CACHE_LINE_MASK) +
(uint32_t *)((uint32_t)bus->curSegment->u.buffers.rxData & ~CACHE_LINE_MASK),
(((uint32_t)bus->curSegment->u.buffers.rxData & CACHE_LINE_MASK) +
bus->curSegment->len - 1 + CACHE_LINE_SIZE) & ~CACHE_LINE_MASK);
}
#endif // __DCACHE_PRESENT
@ -731,18 +731,18 @@ void spiSequence(const extDevice_t *dev, busSegment_t *segments)
return;
}
if (endCmpSegment->txData == NULL) {
if (endCmpSegment->u.link.dev == NULL) {
// End of the segment list queue reached
break;
} else {
// Follow the link to the next queued segment list
endCmpSegment = (busSegment_t *)endCmpSegment->rxData;
endCmpSegment = endCmpSegment->u.link.segments;
}
}
// Record the dev and segments parameters in the terminating segment entry
endCmpSegment->txData = (uint8_t *)dev;
endCmpSegment->rxData = (uint8_t *)segments;
endCmpSegment->u.link.dev = dev;
endCmpSegment->u.link.segments = segments;
return;
}