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Merge pull request #1502 from martinbudden/bf_anyfc_warnings
Fix ANYFCF7 'unused' build warnings
This commit is contained in:
commit
4c1acdd1ed
7 changed files with 20 additions and 1 deletions
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@ -475,6 +475,7 @@ __ALIGN_BEGIN uint8_t USBD_CDC_OtherSpeedCfgDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIG
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static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev,
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static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev,
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uint8_t cfgidx)
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uint8_t cfgidx)
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{
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{
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(void)cfgidx;
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uint8_t ret = 0;
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uint8_t ret = 0;
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USBD_CDC_HandleTypeDef *hcdc;
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USBD_CDC_HandleTypeDef *hcdc;
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@ -563,6 +564,7 @@ static uint8_t USBD_CDC_Init (USBD_HandleTypeDef *pdev,
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static uint8_t USBD_CDC_DeInit (USBD_HandleTypeDef *pdev,
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static uint8_t USBD_CDC_DeInit (USBD_HandleTypeDef *pdev,
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uint8_t cfgidx)
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uint8_t cfgidx)
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{
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{
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(void)cfgidx;
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uint8_t ret = 0;
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uint8_t ret = 0;
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/* Open EP IN */
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/* Open EP IN */
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@ -663,6 +665,7 @@ static uint8_t USBD_CDC_Setup (USBD_HandleTypeDef *pdev,
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*/
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*/
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static uint8_t USBD_CDC_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum)
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static uint8_t USBD_CDC_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum)
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{
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{
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(void)epnum;
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USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData;
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USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*) pdev->pClassData;
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if(pdev->pClassData != NULL)
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if(pdev->pClassData != NULL)
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@ -212,6 +212,7 @@ USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev)
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*/
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*/
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USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev)
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USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev)
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{
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{
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(void)pdev;
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return USBD_OK;
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return USBD_OK;
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}
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}
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@ -508,6 +509,8 @@ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
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*/
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*/
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USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
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USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
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{
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{
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(void)pdev;
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(void)epnum;
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return USBD_OK;
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return USBD_OK;
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}
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}
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@ -519,6 +522,8 @@ USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t ep
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*/
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*/
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USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
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USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum)
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{
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{
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(void)pdev;
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(void)epnum;
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return USBD_OK;
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return USBD_OK;
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}
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}
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@ -530,6 +535,7 @@ USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t e
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*/
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*/
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USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev)
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USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev)
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{
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{
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(void)pdev;
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return USBD_OK;
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return USBD_OK;
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}
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}
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@ -716,6 +716,7 @@ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
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void USBD_CtlError( USBD_HandleTypeDef *pdev ,
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void USBD_CtlError( USBD_HandleTypeDef *pdev ,
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USBD_SetupReqTypedef *req)
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USBD_SetupReqTypedef *req)
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{
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{
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(void)req;
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USBD_LL_StallEP(pdev , 0x80);
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USBD_LL_StallEP(pdev , 0x80);
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USBD_LL_StallEP(pdev , 0);
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USBD_LL_StallEP(pdev , 0);
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}
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}
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@ -756,6 +756,7 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
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*/
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*/
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uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
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uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
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{
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{
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(void)hadc;
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/* Return the multi mode conversion value */
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/* Return the multi mode conversion value */
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return ADC->CDR;
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return ADC->CDR;
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}
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}
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@ -2845,6 +2845,7 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
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*/
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*/
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HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
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HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
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{
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{
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(void)DevAddress;
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if(hi2c->Mode == HAL_I2C_MODE_MASTER)
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if(hi2c->Mode == HAL_I2C_MODE_MASTER)
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{
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{
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/* Process Locked */
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/* Process Locked */
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@ -3684,6 +3685,7 @@ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t
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*/
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*/
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static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
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static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
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{
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{
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(void)ITFlags;
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uint8_t transferdirection = 0;
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uint8_t transferdirection = 0;
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uint16_t slaveaddrcode = 0;
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uint16_t slaveaddrcode = 0;
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uint16_t ownadd1code = 0;
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uint16_t ownadd1code = 0;
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@ -4254,6 +4256,7 @@ static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
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/* No specific action, Master fully manage the generation of STOP condition */
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/* No specific action, Master fully manage the generation of STOP condition */
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/* Mean that this generation can arrive at any time, at the end or during DMA process */
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/* Mean that this generation can arrive at any time, at the end or during DMA process */
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/* So STOP condition should be manage through Interrupt treatment */
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/* So STOP condition should be manage through Interrupt treatment */
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(void)hdma;
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}
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}
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/**
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/**
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@ -4308,6 +4311,7 @@ static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
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/* No specific action, Master fully manage the generation of STOP condition */
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/* No specific action, Master fully manage the generation of STOP condition */
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/* Mean that this generation can arrive at any time, at the end or during DMA process */
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/* Mean that this generation can arrive at any time, at the end or during DMA process */
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/* So STOP condition should be manage through Interrupt treatment */
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/* So STOP condition should be manage through Interrupt treatment */
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(void)hdma;
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}
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}
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/**
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/**
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@ -404,6 +404,7 @@ void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
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*/
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*/
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void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
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void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
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{
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{
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(void)Regulator;
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/* Check the parameters */
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/* Check the parameters */
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assert_param(IS_PWR_REGULATOR(Regulator));
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assert_param(IS_PWR_REGULATOR(Regulator));
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assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
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assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
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@ -2118,7 +2118,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t Outpu
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No need to enable the counter, it's enabled automatically by hardware
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No need to enable the counter, it's enabled automatically by hardware
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(the counter starts in response to a stimulus and generate a pulse */
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(the counter starts in response to a stimulus and generate a pulse */
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(void)OutputChannel;
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
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@ -2150,6 +2150,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t Output
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if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
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if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
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in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
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in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
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(void)OutputChannel;
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
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TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
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@ -2187,6 +2188,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t Ou
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No need to enable the counter, it's enabled automatically by hardware
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No need to enable the counter, it's enabled automatically by hardware
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(the counter starts in response to a stimulus and generate a pulse */
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(the counter starts in response to a stimulus and generate a pulse */
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(void)OutputChannel;
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/* Enable the TIM Capture/Compare 1 interrupt */
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/* Enable the TIM Capture/Compare 1 interrupt */
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__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
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__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
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@ -2218,6 +2220,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t Ou
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*/
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*/
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HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
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HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
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{
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{
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(void)OutputChannel;
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/* Disable the TIM Capture/Compare 1 interrupt */
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/* Disable the TIM Capture/Compare 1 interrupt */
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__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
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__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
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