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https://github.com/betaflight/betaflight.git
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Removed redundant preprocessor defs for UART AF
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parent
d6861b0842
commit
501f4a1345
6 changed files with 15 additions and 25 deletions
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@ -162,12 +162,8 @@ extern const uartHardware_t uartHardware[];
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typedef struct uartDevice_s {
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uartPort_t port;
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const uartHardware_t *hardware;
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ioTag_t rx;
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ioTag_t tx;
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#if defined(STM32F7)
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uint8_t rxAF;
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uint8_t txAF;
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#endif
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uartPinDef_t rx;
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uartPinDef_t tx;
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volatile uint8_t rxBuffer[UART_RX_BUFFER_SIZE];
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volatile uint8_t txBuffer[UART_TX_BUFFER_SIZE];
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} uartDevice_t;
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@ -53,21 +53,15 @@ void uartPinConfigure(const serialPinConfig_t *pSerialPinConfig)
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for (int pindex = 0 ; pindex < UARTHARDWARE_MAX_PINS ; pindex++) {
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if (hardware->rxPins[pindex].pin == pSerialPinConfig->ioTagRx[device]) {
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uartdev->rx = pSerialPinConfig->ioTagRx[device];
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#if defined(STM32F7)
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uartdev->rxAF = hardware->rxPins[pindex].af;
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#endif
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uartdev->rx = hardware->rxPins[pindex];
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}
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if (hardware->txPins[pindex].pin == pSerialPinConfig->ioTagTx[device]) {
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uartdev->tx = pSerialPinConfig->ioTagTx[device];
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#if defined(STM32F7)
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uartdev->txAF = hardware->txPins[pindex].af;
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#endif
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uartdev->tx = hardware->txPins[pindex];
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}
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}
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if (uartdev->rx || uartdev->tx) {
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if (uartdev->rx.pin || uartdev->tx.pin) {
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uartdev->hardware = hardware;
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uartDevmap[device] = uartdev++;
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}
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@ -157,8 +157,8 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
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s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->DR;
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}
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IO_t rxIO = IOGetByTag(uartdev->rx);
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IO_t txIO = IOGetByTag(uartdev->tx);
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IO_t rxIO = IOGetByTag(uartdev->rx.pin);
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IO_t txIO = IOGetByTag(uartdev->tx.pin);
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if (options & SERIAL_BIDIR) {
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IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
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@ -242,7 +242,7 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
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s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR;
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}
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serialUARTInitIO(IOGetByTag(uartDev->tx), IOGetByTag(uartDev->rx), mode, options, hardware->af, device);
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serialUARTInitIO(IOGetByTag(uartDev->tx.pin), IOGetByTag(uartDev->rx.pin), mode, options, hardware->af, device);
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if (!s->rxDMAChannel || !s->txDMAChannel) {
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NVIC_InitTypeDef NVIC_InitStructure;
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@ -234,8 +234,8 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
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s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->DR;
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}
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IO_t txIO = IOGetByTag(uart->tx);
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IO_t rxIO = IOGetByTag(uart->rx);
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IO_t txIO = IOGetByTag(uart->tx.pin);
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IO_t rxIO = IOGetByTag(uart->rx.pin);
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if (hardware->rcc) {
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RCC_ClockCmd(hardware->rcc, ENABLE);
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@ -441,8 +441,8 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
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s->Handle.Instance = hardware->reg;
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IO_t txIO = IOGetByTag(uartdev->tx);
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IO_t rxIO = IOGetByTag(uartdev->rx);
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IO_t txIO = IOGetByTag(uartdev->tx.pin);
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IO_t rxIO = IOGetByTag(uartdev->rx.pin);
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if ((options & SERIAL_BIDIR) && txIO) {
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ioConfig_t ioCfg = IO_CONFIG(
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@ -452,17 +452,17 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
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);
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IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(txIO, ioCfg, uartdev->txAF);
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IOConfigGPIOAF(txIO, ioCfg, uartdev->tx.af);
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}
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else {
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if ((mode & MODE_TX) && txIO) {
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IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(txIO, IOCFG_AF_PP, uartdev->txAF);
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IOConfigGPIOAF(txIO, IOCFG_AF_PP, uartdev->tx.af);
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}
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if ((mode & MODE_RX) && rxIO) {
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IOInit(rxIO, OWNER_SERIAL_RX, RESOURCE_INDEX(device));
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IOConfigGPIOAF(rxIO, IOCFG_AF_PP, uartdev->rxAF);
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IOConfigGPIOAF(rxIO, IOCFG_AF_PP, uartdev->rx.af);
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}
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}
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