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F1 and F3 same MAX_RC_CHANNELS in high performance mode

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borisbstyle 2016-01-07 01:36:24 +01:00
parent d2122e0674
commit 56f737ff8b
1 changed files with 0 additions and 4 deletions
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src/main/rx/rx.c
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@ -92,11 +92,7 @@ uint32_t rcInvalidPulsPeriod[MAX_SUPPORTED_RC_CHANNEL_COUNT];
#define DELAY_5_HZ (1000000 / 5)
#define SKIP_RC_ON_SUSPEND_PERIOD 1500000 // 1.5 second period in usec (call frequency independent)
#define SKIP_RC_SAMPLES_ON_RESUME 2 // flush 2 samples to drop wrong measurements (timing independent)
#ifdef STM32F303xC
#define MAX_RC_CHANNELS_HIGH_PERFORMANCE 10 // Maximum channels allowed during fast refresh rates for more performance
#else
#define MAX_RC_CHANNELS_HIGH_PERFORMANCE 8 // Maximum channels allowed during fast refresh rates for more performance
#endif
rxRuntimeConfig_t rxRuntimeConfig;
static rxConfig_t *rxConfig;