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F1 and F3 same MAX_RC_CHANNELS in high performance mode
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@ -92,11 +92,7 @@ uint32_t rcInvalidPulsPeriod[MAX_SUPPORTED_RC_CHANNEL_COUNT];
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#define DELAY_5_HZ (1000000 / 5)
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#define SKIP_RC_ON_SUSPEND_PERIOD 1500000 // 1.5 second period in usec (call frequency independent)
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#define SKIP_RC_SAMPLES_ON_RESUME 2 // flush 2 samples to drop wrong measurements (timing independent)
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#ifdef STM32F303xC
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#define MAX_RC_CHANNELS_HIGH_PERFORMANCE 10 // Maximum channels allowed during fast refresh rates for more performance
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#else
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#define MAX_RC_CHANNELS_HIGH_PERFORMANCE 8 // Maximum channels allowed during fast refresh rates for more performance
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#endif
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rxRuntimeConfig_t rxRuntimeConfig;
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static rxConfig_t *rxConfig;
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