mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-13 19:40:31 +03:00
Merge pull request #10612 from hydra/bf-h7adc2-fix
This commit is contained in:
parent
6b8fc3ac93
commit
5a4dba22d9
4 changed files with 34 additions and 11 deletions
|
@ -61,21 +61,26 @@ ADCDevice adcDeviceByInstance(ADC_TypeDef *instance)
|
|||
return ADCDEV_1;
|
||||
}
|
||||
|
||||
#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
|
||||
#if defined(ADC2)
|
||||
if (instance == ADC2) {
|
||||
return ADCDEV_2;
|
||||
}
|
||||
|
||||
#endif
|
||||
#if defined(ADC3)
|
||||
if (instance == ADC3) {
|
||||
return ADCDEV_3;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef STM32F3
|
||||
#if defined(ADC4)
|
||||
if (instance == ADC4) {
|
||||
return ADCDEV_4;
|
||||
}
|
||||
#endif
|
||||
#if defined(ADC5)
|
||||
if (instance == ADC5) {
|
||||
return ADCDEV_5;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ADCINVALID;
|
||||
}
|
||||
|
|
|
@ -46,14 +46,16 @@
|
|||
typedef enum ADCDevice {
|
||||
ADCINVALID = -1,
|
||||
ADCDEV_1 = 0,
|
||||
#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
|
||||
#if defined(ADC2)
|
||||
ADCDEV_2,
|
||||
#endif
|
||||
#if defined(ADC3)
|
||||
ADCDEV_3,
|
||||
#endif
|
||||
#if defined(STM32F3) || defined(STM32G4)
|
||||
#if defined(ADC4)
|
||||
ADCDEV_4,
|
||||
#endif
|
||||
#if defined(STM32G4)
|
||||
#if defined(ADC5)
|
||||
ADCDEV_5,
|
||||
#endif
|
||||
ADCDEV_COUNT
|
||||
|
|
|
@ -79,7 +79,9 @@ const adcDevice_t adcHardware[ADCDEV_COUNT] = {
|
|||
.channel = DMA_REQUEST_ADC2,
|
||||
#endif
|
||||
},
|
||||
// ADC3 can be serviced by BDMA also, but we settle for DMA1 or 2 (for now).
|
||||
#if defined(ADC3)
|
||||
// ADC3 is not available on all H7 MCUs, e.g. H7A3
|
||||
// On H743 and H750, ADC3 can be serviced by BDMA also, but we settle for DMA1 or 2 (for now).
|
||||
{
|
||||
.ADCx = ADC3_INSTANCE,
|
||||
.rccADC = RCC_AHB4(ADC3),
|
||||
|
@ -88,6 +90,7 @@ const adcDevice_t adcHardware[ADCDEV_COUNT] = {
|
|||
.channel = DMA_REQUEST_ADC3,
|
||||
#endif
|
||||
}
|
||||
#endif // ADC3
|
||||
};
|
||||
|
||||
adcDevice_t adcDevice[ADCDEV_COUNT];
|
||||
|
@ -102,11 +105,18 @@ const adcTagMap_t adcTagMap[] = {
|
|||
{ DEFIO_TAG_E__NONE, ADC_DEVICES_3, ADC_CHANNEL_VREFINT, 18 },
|
||||
{ DEFIO_TAG_E__NONE, ADC_DEVICES_3, ADC_CHANNEL_TEMPSENSOR, 19 },
|
||||
#endif
|
||||
// Inputs available for all packages
|
||||
#if defined(STM32H7A3xx) || defined(STM32H7A3xxQ)
|
||||
// See DS13195 Rev 6 Page 51/52
|
||||
{ DEFIO_TAG_E__PC0, ADC_DEVICES_12, ADC_CHANNEL_10, 10 },
|
||||
{ DEFIO_TAG_E__PC1, ADC_DEVICES_12, ADC_CHANNEL_11, 11 },
|
||||
{ DEFIO_TAG_E__PC2, ADC_DEVICES_12, ADC_CHANNEL_12, 0 },
|
||||
{ DEFIO_TAG_E__PC3, ADC_DEVICES_12, ADC_CHANNEL_13, 1 },
|
||||
#else
|
||||
{ DEFIO_TAG_E__PC0, ADC_DEVICES_123, ADC_CHANNEL_10, 10 },
|
||||
{ DEFIO_TAG_E__PC1, ADC_DEVICES_123, ADC_CHANNEL_11, 11 },
|
||||
{ DEFIO_TAG_E__PC2, ADC_DEVICES_3, ADC_CHANNEL_0, 0 },
|
||||
{ DEFIO_TAG_E__PC3, ADC_DEVICES_3, ADC_CHANNEL_1, 1 },
|
||||
#endif
|
||||
{ DEFIO_TAG_E__PC4, ADC_DEVICES_12, ADC_CHANNEL_4, 4 },
|
||||
{ DEFIO_TAG_E__PC5, ADC_DEVICES_12, ADC_CHANNEL_8, 8 },
|
||||
{ DEFIO_TAG_E__PB0, ADC_DEVICES_12, ADC_CHANNEL_9, 9 },
|
||||
|
|
|
@ -43,13 +43,19 @@ void pgResetFn_adcConfig(adcConfig_t *adcConfig)
|
|||
|
||||
adcConfig->device = ADC_DEV_TO_CFG(adcDeviceByInstance(ADC_INSTANCE));
|
||||
adcConfig->dmaopt[ADCDEV_1] = ADC1_DMA_OPT;
|
||||
#ifndef STM32F1
|
||||
// These conditionals need to match the ones used in 'src/main/drivers/adc.h'.
|
||||
#if defined(ADC2)
|
||||
adcConfig->dmaopt[ADCDEV_2] = ADC2_DMA_OPT;
|
||||
#endif
|
||||
#if defined(ADC3)
|
||||
adcConfig->dmaopt[ADCDEV_3] = ADC3_DMA_OPT;
|
||||
#endif
|
||||
#ifdef STM32F3
|
||||
#if defined(ADC4)
|
||||
adcConfig->dmaopt[ADCDEV_4] = ADC4_DMA_OPT;
|
||||
#endif
|
||||
#if defined(ADC5)
|
||||
adcConfig->dmaopt[ADCDEV_5] = ADC5_DMA_OPT;
|
||||
#endif
|
||||
|
||||
#ifdef VBAT_ADC_PIN
|
||||
adcConfig->vbat.enabled = true;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue