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Fix missing ADC4 dma mapping for F3.
Fix incorrect count of dma options for F3. Value was hardcoded to 3, but the F3 has 4 ADCs. Fix dmaPeripheralMapping for F3. The dmaPeripheralMapping table was using index numbers and not device numbers. This meant all the dma mappings were out by one, eg. ``` ``` ADC 1 is on DMA1, channel 1, but the output from dma ADC 2 list shows the possibilities for ADC 1, not ADC 2 and shows no possibilities for dma ADC 1 list Ensure there are defaults for ADC4 on F3. Always use 4 ADC instances for the ADC PG. * PG should not be target dependant. * Add a static assert which will fail if anything is changed. Fix dmaopt in ADC PG, it should be a int8_t, not uint8_t Fix occurrences of -1 that should be `DMA_OPT_UNUSED`. Fixing this meant that dma_reqmap.h needed to be included in a few places. When this was done there were errors because dma_reqmap.h was included more than once and it's `#pragma once` was commented out. Including dma_reqmap.h from every PG that uses `dmaopt` also caused other compilation issues, fixed by this commit.
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11 changed files with 79 additions and 53 deletions
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@ -284,7 +284,9 @@ uint8_t timerInputIrq(TIM_TypeDef *tim);
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#if defined(USE_TIMER_MGMT)
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extern const resourceOwner_t freeOwner;
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timerIOConfig_t *timerIoConfigByTag(ioTag_t ioTag);
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struct timerIOConfig_s;
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struct timerIOConfig_s *timerIoConfigByTag(ioTag_t ioTag);
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const resourceOwner_t *timerGetOwner(int8_t timerNumber, uint16_t timerChannel);
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#endif
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const timerHardware_t *timerGetByTag(ioTag_t ioTag);
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