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Removed unavailable timers from STM32F411.

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mikeller 2019-09-10 00:16:35 +12:00 • committed by Michael Keller
parent 02794671fb
commit 672a1f737f
2 changed files with 23 additions and 1 deletions
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8
src/main/drivers/timer.h
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@ -177,7 +177,11 @@ extern const timerHardware_t timerHardware[];
#elif defined(STM32F4)
#if defined(STM32F411xE)
#define FULL_TIMER_CHANNEL_COUNT 59
#else
#define FULL_TIMER_CHANNEL_COUNT 78
#endif
#elif defined(STM32F7)
@ -196,7 +200,11 @@ extern const timerHardware_t fullTimerHardware[];
#if defined(STM32F7) || defined(STM32F4)
#if defined(STM32F411xE)
#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(6) | TIM_N(7) | TIM_N(9) | TIM_N(10) | TIM_N(11) )
#else
#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(6) | TIM_N(7) | TIM_N(8) | TIM_N(9) | TIM_N(10) | TIM_N(11) | TIM_N(12) | TIM_N(13) | TIM_N(14) )
#endif
#elif defined(STM32F3)

16
src/main/drivers/timer_stm32f4xx.c
View file

@ -41,7 +41,9 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
{ .TIMx = TIM5, .rcc = RCC_APB1(TIM5), .inputIrq = TIM5_IRQn},
{ .TIMx = TIM6, .rcc = RCC_APB1(TIM6), .inputIrq = 0},
{ .TIMx = TIM7, .rcc = RCC_APB1(TIM7), .inputIrq = 0},
#if !defined(STM32F411xE) && !defined(STM32F446xx)
#if defined(STM32F446xx)
{ .TIMx = TIM8, .rcc = RCC_APB2(TIM8), .inputIrq = 0},
#elif !defined(STM32F411xE)
{ .TIMx = TIM8, .rcc = RCC_APB2(TIM8), .inputIrq = TIM8_CC_IRQn},
#endif
{ .TIMx = TIM9, .rcc = RCC_APB2(TIM9), .inputIrq = TIM1_BRK_TIM9_IRQn},
@ -79,11 +81,13 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM9, CH1, PA2, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM9, CH2, PA3, TIM_USE_ANY, 0, 0),
#if !defined(STM32F411xE)
DEF_TIM(TIM8, CH1N, PA5, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH1N, PA7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM13, CH1, PA6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM14, CH1, PA7, TIM_USE_ANY, 0, 0),
#endif
//PORTB
DEF_TIM(TIM1, CH2N, PB0, TIM_USE_ANY, 0, 0),
@ -104,15 +108,19 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM4, CH3, PB8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM4, CH4, PB9, TIM_USE_ANY, 0, 0),
#if !defined(STM32F411xE)
DEF_TIM(TIM8, CH2N, PB0, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH3N, PB1, TIM_USE_ANY, 0, 0),
#endif
DEF_TIM(TIM10, CH1, PB8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM11, CH1, PB9, TIM_USE_ANY, 0, 0),
#if !defined(STM32F411xE)
DEF_TIM(TIM8, CH2N, PB14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH3N, PB15, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM12, CH1, PB14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM12, CH2, PB15, TIM_USE_ANY, 0, 0),
#endif
//PORTC
DEF_TIM(TIM3, CH1, PC6, TIM_USE_ANY, 0, 0),
@ -120,10 +128,12 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM3, CH3, PC8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM3, CH4, PC9, TIM_USE_ANY, 0, 0),
#if !defined(STM32F411xE)
DEF_TIM(TIM8, CH1, PC6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH2, PC7, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH3, PC8, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH4, PC9, TIM_USE_ANY, 0, 0),
#endif
//PORTD
DEF_TIM(TIM4, CH1, PD12, TIM_USE_ANY, 0, 0),
@ -152,21 +162,25 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM5, CH2, PH11, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM5, CH3, PH12, TIM_USE_ANY, 0, 0),
#if !defined(STM32F411xE)
DEF_TIM(TIM8, CH1N, PH13, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH2N, PH14, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM8, CH3N, PH15, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM12, CH1, PH6, TIM_USE_ANY, 0, 0),
DEF_TIM(TIM12, CH2, PH9, TIM_USE_ANY, 0, 0),
#endif
//PORTI
// Not yet used
// DEF_TIM(TIM5, CH4, PI0, TIM_USE_ANY, 0, 0),
//
//#if !defined(STM32F411xE)
// DEF_TIM(TIM8, CH4, PI2, TIM_USE_ANY, 0, 0),
// DEF_TIM(TIM8, CH1, PI5, TIM_USE_ANY, 0, 0),
// DEF_TIM(TIM8, CH2, PI6, TIM_USE_ANY, 0, 0),
// DEF_TIM(TIM8, CH3, PI7, TIM_USE_ANY, 0, 0),
//#endif
};
#endif