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Add apm32f405/f407 support (#13796)
* Add APM32F4 driver libraries and USB middleware * Add the APM32F405 and APM32F407 target files * Add APM32 startup files * Add APM32F4 linker files * Add APM32F4.mk * Add APM32 driver files * Add APM32F40X MCU type * Sync with the Betaflight master branch and modify the driver directory structure * Implement CLI on the APM32 * Implement ADC on the APM32 * Implement config streamer on the APM32 * Implement I2C on the APM32 * Implement SPI on the APM32 * Implement DSHOT on the APM32 * Implement transponder ir on the APM32 * Implement serial uart on the APM32 * Implement MCO on the APM32 * Implement DWT on the APM32 * Update the init.c file, adding APM32 MCO configuration * Remove all duplicated APM32 driver files and retaining only the APM32 LIB directory * Create APM32F4.mk * Add linker files for APM32F405 and APM32F407 * Add startup and library config files for APM32F405 and APM32F407 * Add target files for APM32F405 and APM32F407 * Add apm32 MCU driver files * Add build configuration for APM32 MCU * Implement config streamer on APM32 * Implement CLI on the APM32 * Implement ADC on the APM32 * Implement RCC on the APM32 * Implement MCO on the APM32 * Implement I2C on the APM32 * Implement SPI on the APM32 * Implement serial uart on the APM32 * Implement IO on the APM32 * Implement DMA on the APM32 * Implement DSHOT on the APM32 * Implement transponder ir on the APM32 * Update init.c * Add the inclusion of the 'platform.h' file to the APM USB driver source file * Merge bus SPI duplicate code from APM32 to STM32 * Update timer_apm32.c * Merge motor duplicate code from APM32 to STM32 * Merge serial uart duplicate code from APM32 to STM32 * Update APM32F4.mk * Update cli.c * Update APM32F4.mk * Remove the apm32_flash_f4_split.ld * Associate the apm32 linker file with stm32_flash_f4_split.ld
This commit is contained in:
luckk
GitHub
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6dcc268918
84 changed files with 13936 additions and 49 deletions
207
src/main/drivers/mcu/apm32/dma_reqmap_mcu.c
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207
src/main/drivers/mcu/apm32/dma_reqmap_mcu.c
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "platform.h"
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#ifdef USE_DMA_SPEC
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#include "timer_def.h"
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#include "drivers/adc.h"
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#include "drivers/bus_spi.h"
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#include "drivers/dma_reqmap.h"
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#include "drivers/serial.h"
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#include "drivers/serial_uart.h"
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#include "pg/timerio.h"
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typedef struct dmaPeripheralMapping_s {
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dmaPeripheral_e device;
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uint8_t index;
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dmaChannelSpec_t channelSpec[MAX_PERIPHERAL_DMA_OPTIONS];
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} dmaPeripheralMapping_t;
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typedef struct dmaTimerMapping_s {
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TIM_TypeDef *tim;
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uint8_t channel;
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dmaChannelSpec_t channelSpec[MAX_TIMER_DMA_OPTIONS];
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} dmaTimerMapping_t;
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#if defined(APM32F4)
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#define DMA(d, s, c) { DMA_CODE(d, s, c), (dmaResource_t *)DMA ## d ## _Stream ## s, DMA_CHANNEL_ ## c }
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static const dmaPeripheralMapping_t dmaPeripheralMapping[] = {
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#ifdef USE_SPI
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{ DMA_PERIPH_SPI_SDO, SPIDEV_1, { DMA(2, 3, 3), DMA(2, 5, 3) } },
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{ DMA_PERIPH_SPI_SDI, SPIDEV_1, { DMA(2, 0, 3), DMA(2, 2, 3) } },
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{ DMA_PERIPH_SPI_SDO, SPIDEV_2, { DMA(1, 4, 0) } },
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{ DMA_PERIPH_SPI_SDI, SPIDEV_2, { DMA(1, 3, 0) } },
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{ DMA_PERIPH_SPI_SDO, SPIDEV_3, { DMA(1, 5, 0), DMA(1, 7, 0) } },
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{ DMA_PERIPH_SPI_SDI, SPIDEV_3, { DMA(1, 0, 0), DMA(1, 2, 0) } },
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#endif // USE_SPI
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#ifdef USE_ADC
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{ DMA_PERIPH_ADC, ADCDEV_1, { DMA(2, 0, 0), DMA(2, 4, 0) } },
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{ DMA_PERIPH_ADC, ADCDEV_2, { DMA(2, 2, 1), DMA(2, 3, 1) } },
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{ DMA_PERIPH_ADC, ADCDEV_3, { DMA(2, 0, 2), DMA(2, 1, 2) } },
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#endif // USE_ADC
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#ifdef USE_SDCARD_SDIO
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{ DMA_PERIPH_SDIO, 0, { DMA(2, 3, 4), DMA(2, 6, 4) } },
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#endif // USE_SDCARD_SDIO
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#ifdef USE_UART
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{ DMA_PERIPH_UART_TX, UARTDEV_1, { DMA(2, 7, 4) } },
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{ DMA_PERIPH_UART_RX, UARTDEV_1, { DMA(2, 5, 4), DMA(2, 2, 4) } },
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{ DMA_PERIPH_UART_TX, UARTDEV_2, { DMA(1, 6, 4) } },
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{ DMA_PERIPH_UART_RX, UARTDEV_2, { DMA(1, 5, 4) } },
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{ DMA_PERIPH_UART_TX, UARTDEV_3, { DMA(1, 3, 4) } },
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{ DMA_PERIPH_UART_RX, UARTDEV_3, { DMA(1, 1, 4) } },
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{ DMA_PERIPH_UART_TX, UARTDEV_4, { DMA(1, 4, 4) } },
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{ DMA_PERIPH_UART_RX, UARTDEV_4, { DMA(1, 2, 4) } },
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{ DMA_PERIPH_UART_TX, UARTDEV_5, { DMA(1, 7, 4) } },
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{ DMA_PERIPH_UART_RX, UARTDEV_5, { DMA(1, 0, 4) } },
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{ DMA_PERIPH_UART_TX, UARTDEV_6, { DMA(2, 6, 5), DMA(2, 7, 5) } },
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{ DMA_PERIPH_UART_RX, UARTDEV_6, { DMA(2, 1, 5), DMA(2, 2, 5) } },
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#endif // USE_UART
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};
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#define TC(chan) DEF_TIM_CHANNEL(CH_ ## chan)
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static const dmaTimerMapping_t dmaTimerMapping[] = {
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// Generated from 'timer_def.h'
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{ TMR1, TC(CH1), { DMA(2, 6, 0), DMA(2, 1, 6), DMA(2, 3, 6) } },
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{ TMR1, TC(CH2), { DMA(2, 6, 0), DMA(2, 2, 6) } },
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{ TMR1, TC(CH3), { DMA(2, 6, 0), DMA(2, 6, 6) } },
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{ TMR1, TC(CH4), { DMA(2, 4, 6) } },
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{ TMR2, TC(CH1), { DMA(1, 5, 3) } },
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{ TMR2, TC(CH2), { DMA(1, 6, 3) } },
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{ TMR2, TC(CH3), { DMA(1, 1, 3) } },
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{ TMR2, TC(CH4), { DMA(1, 7, 3), DMA(1, 6, 3) } },
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{ TMR3, TC(CH1), { DMA(1, 4, 5) } },
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{ TMR3, TC(CH2), { DMA(1, 5, 5) } },
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{ TMR3, TC(CH3), { DMA(1, 7, 5) } },
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{ TMR3, TC(CH4), { DMA(1, 2, 5) } },
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{ TMR4, TC(CH1), { DMA(1, 0, 2) } },
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{ TMR4, TC(CH2), { DMA(1, 3, 2) } },
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{ TMR4, TC(CH3), { DMA(1, 7, 2) } },
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{ TMR5, TC(CH1), { DMA(1, 2, 6) } },
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{ TMR5, TC(CH2), { DMA(1, 4, 6) } },
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{ TMR5, TC(CH3), { DMA(1, 0, 6) } },
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{ TMR5, TC(CH4), { DMA(1, 1, 6), DMA(1, 3, 6) } },
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{ TMR8, TC(CH1), { DMA(2, 2, 0), DMA(2, 2, 7) } },
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{ TMR8, TC(CH2), { DMA(2, 2, 0), DMA(2, 3, 7) } },
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{ TMR8, TC(CH3), { DMA(2, 2, 0), DMA(2, 4, 7) } },
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{ TMR8, TC(CH4), { DMA(2, 7, 7) } },
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};
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#undef TC
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#undef DMA
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#endif // APM32F4
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const dmaChannelSpec_t *dmaGetChannelSpecByPeripheral(dmaPeripheral_e device, uint8_t index, int8_t opt)
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{
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if (opt < 0 || opt >= MAX_PERIPHERAL_DMA_OPTIONS) {
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return NULL;
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}
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for (unsigned i = 0 ; i < ARRAYLEN(dmaPeripheralMapping) ; i++) {
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const dmaPeripheralMapping_t *periph = &dmaPeripheralMapping[i];
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if (periph->device == device && periph->index == index && periph->channelSpec[opt].ref) {
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return &periph->channelSpec[opt];
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}
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}
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return NULL;
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}
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dmaoptValue_t dmaoptByTag(ioTag_t ioTag)
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{
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#ifdef USE_TIMER_MGMT
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for (unsigned i = 0; i < MAX_TIMER_PINMAP_COUNT; i++) {
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if (timerIOConfig(i)->ioTag == ioTag) {
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return timerIOConfig(i)->dmaopt;
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}
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}
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#else
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UNUSED(ioTag);
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#endif
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return DMA_OPT_UNUSED;
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}
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const dmaChannelSpec_t *dmaGetChannelSpecByTimerValue(TIM_TypeDef *tim, uint8_t channel, dmaoptValue_t dmaopt)
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{
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if (dmaopt < 0 || dmaopt >= MAX_TIMER_DMA_OPTIONS) {
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return NULL;
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}
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for (unsigned i = 0 ; i < ARRAYLEN(dmaTimerMapping) ; i++) {
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const dmaTimerMapping_t *timerMapping = &dmaTimerMapping[i];
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if (timerMapping->tim == tim && timerMapping->channel == channel && timerMapping->channelSpec[dmaopt].ref) {
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return &timerMapping->channelSpec[dmaopt];
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}
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}
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return NULL;
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}
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const dmaChannelSpec_t *dmaGetChannelSpecByTimer(const timerHardware_t *timer)
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{
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if (!timer) {
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return NULL;
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}
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dmaoptValue_t dmaopt = dmaoptByTag(timer->tag);
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return dmaGetChannelSpecByTimerValue(timer->tim, timer->channel, dmaopt);
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}
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// dmaGetOptionByTimer is called by pgResetFn_timerIOConfig to find out dmaopt for pre-configured timer.
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dmaoptValue_t dmaGetOptionByTimer(const timerHardware_t *timer)
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{
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for (unsigned i = 0 ; i < ARRAYLEN(dmaTimerMapping); i++) {
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const dmaTimerMapping_t *timerMapping = &dmaTimerMapping[i];
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if (timerMapping->tim == timer->tim && timerMapping->channel == timer->channel) {
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for (unsigned j = 0; j < MAX_TIMER_DMA_OPTIONS; j++) {
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const dmaChannelSpec_t *dma = &timerMapping->channelSpec[j];
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if (dma->ref == timer->dmaRefConfigured
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#if defined(APM32F4)
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&& dma->channel == timer->dmaChannelConfigured
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#endif
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) {
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return j;
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}
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}
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}
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}
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return DMA_OPT_UNUSED;
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}
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#endif // USE_DMA_SPEC
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