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Add apm32f405/f407 support (#13796)
* Add APM32F4 driver libraries and USB middleware * Add the APM32F405 and APM32F407 target files * Add APM32 startup files * Add APM32F4 linker files * Add APM32F4.mk * Add APM32 driver files * Add APM32F40X MCU type * Sync with the Betaflight master branch and modify the driver directory structure * Implement CLI on the APM32 * Implement ADC on the APM32 * Implement config streamer on the APM32 * Implement I2C on the APM32 * Implement SPI on the APM32 * Implement DSHOT on the APM32 * Implement transponder ir on the APM32 * Implement serial uart on the APM32 * Implement MCO on the APM32 * Implement DWT on the APM32 * Update the init.c file, adding APM32 MCO configuration * Remove all duplicated APM32 driver files and retaining only the APM32 LIB directory * Create APM32F4.mk * Add linker files for APM32F405 and APM32F407 * Add startup and library config files for APM32F405 and APM32F407 * Add target files for APM32F405 and APM32F407 * Add apm32 MCU driver files * Add build configuration for APM32 MCU * Implement config streamer on APM32 * Implement CLI on the APM32 * Implement ADC on the APM32 * Implement RCC on the APM32 * Implement MCO on the APM32 * Implement I2C on the APM32 * Implement SPI on the APM32 * Implement serial uart on the APM32 * Implement IO on the APM32 * Implement DMA on the APM32 * Implement DSHOT on the APM32 * Implement transponder ir on the APM32 * Update init.c * Add the inclusion of the 'platform.h' file to the APM USB driver source file * Merge bus SPI duplicate code from APM32 to STM32 * Update timer_apm32.c * Merge motor duplicate code from APM32 to STM32 * Merge serial uart duplicate code from APM32 to STM32 * Update APM32F4.mk * Update cli.c * Update APM32F4.mk * Remove the apm32_flash_f4_split.ld * Associate the apm32 linker file with stm32_flash_f4_split.ld
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parent
27ec01ddda
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6dcc268918
84 changed files with 13936 additions and 49 deletions
202
src/main/drivers/mcu/apm32/eint_apm32.c
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202
src/main/drivers/mcu/apm32/eint_apm32.c
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#include "platform.h"
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#ifdef USE_EXTI
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#include "drivers/nvic.h"
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#include "drivers/io_impl.h"
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#include "drivers/exti.h"
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typedef struct {
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extiCallbackRec_t* handler;
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} extiChannelRec_t;
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extiChannelRec_t extiChannelRecs[16];
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// IRQ grouping
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#define EXTI_IRQ_GROUPS 7
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// 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
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static const uint8_t extiGroups[16] = { 0, 1, 2, 3, 4, 5, 5, 5, 5, 5, 6, 6, 6, 6, 6, 6 };
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static uint8_t extiGroupPriority[EXTI_IRQ_GROUPS];
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#if defined(APM32F4)
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static const uint8_t extiGroupIRQn[EXTI_IRQ_GROUPS] = {
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EINT0_IRQn,
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EINT1_IRQn,
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EINT2_IRQn,
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EINT3_IRQn,
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EINT4_IRQn,
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EINT9_5_IRQn,
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EINT15_10_IRQn
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};
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#else
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# warning "Unknown CPU"
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#endif
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static uint32_t triggerLookupTable[] = {
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#if defined(APM32F4)
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[BETAFLIGHT_EXTI_TRIGGER_RISING] = GPIO_MODE_IT_RISING,
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[BETAFLIGHT_EXTI_TRIGGER_FALLING] = GPIO_MODE_IT_FALLING,
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[BETAFLIGHT_EXTI_TRIGGER_BOTH] = GPIO_MODE_IT_RISING_FALLING
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#else
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# warning "Unknown CPU"
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#endif
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};
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// Absorb the difference in IMR and PR assignments to registers
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#define EXTI_REG_IMR (EINT->IMASK)
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#define EXTI_REG_PR (EINT->IPEND)
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void EXTIInit(void)
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{
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#if defined(APM32F4)
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/* Enable SYSCFG clock otherwise the EXTI irq handlers are not called */
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__DAL_RCM_SYSCFG_CLK_ENABLE();
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#endif
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memset(extiChannelRecs, 0, sizeof(extiChannelRecs));
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memset(extiGroupPriority, 0xff, sizeof(extiGroupPriority));
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}
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void EXTIHandlerInit(extiCallbackRec_t *self, extiHandlerCallback *fn)
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{
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self->fn = fn;
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}
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void EXTIConfig(IO_t io, extiCallbackRec_t *cb, int irqPriority, ioConfig_t config, extiTrigger_t trigger)
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{
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int chIdx = IO_GPIOPinIdx(io);
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if (chIdx < 0) {
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return;
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}
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int group = extiGroups[chIdx];
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extiChannelRec_t *rec = &extiChannelRecs[chIdx];
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rec->handler = cb;
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EXTIDisable(io);
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GPIO_InitTypeDef init = {
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.Pin = IO_Pin(io),
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.Mode = GPIO_MODE_INPUT | IO_CONFIG_GET_MODE(config) | triggerLookupTable[trigger],
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.Speed = IO_CONFIG_GET_SPEED(config),
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.Pull = IO_CONFIG_GET_PULL(config),
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};
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DAL_GPIO_Init(IO_GPIO(io), &init);
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if (extiGroupPriority[group] > irqPriority) {
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extiGroupPriority[group] = irqPriority;
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DAL_NVIC_SetPriority(extiGroupIRQn[group], NVIC_PRIORITY_BASE(irqPriority), NVIC_PRIORITY_SUB(irqPriority));
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DAL_NVIC_EnableIRQ(extiGroupIRQn[group]);
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}
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}
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void EXTIRelease(IO_t io)
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{
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// don't forget to match cleanup with config
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EXTIDisable(io);
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const int chIdx = IO_GPIOPinIdx(io);
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if (chIdx < 0) {
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return;
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}
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extiChannelRec_t *rec = &extiChannelRecs[chIdx];
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rec->handler = NULL;
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}
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void EXTIEnable(IO_t io)
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{
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#if defined(APM32F4)
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uint32_t extiLine = IO_EXTI_Line(io);
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if (!extiLine) {
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return;
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}
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EXTI_REG_IMR |= extiLine;
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#else
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# error "Unknown CPU"
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#endif
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}
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void EXTIDisable(IO_t io)
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{
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#if defined(APM32F4)
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uint32_t extiLine = IO_EXTI_Line(io);
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if (!extiLine) {
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return;
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}
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EXTI_REG_IMR &= ~extiLine;
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EXTI_REG_PR = extiLine;
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#else
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# error "Unknown CPU"
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#endif
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}
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#define EXTI_EVENT_MASK 0xFFFF // first 16 bits only, see also definition of extiChannelRecs.
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void EXTI_IRQHandler(uint32_t mask)
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{
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uint32_t exti_active = (EXTI_REG_IMR & EXTI_REG_PR) & mask;
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EXTI_REG_PR = exti_active; // clear pending mask (by writing 1)
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while (exti_active) {
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unsigned idx = 31 - __builtin_clz(exti_active);
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uint32_t mask = 1 << idx;
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extiChannelRecs[idx].handler->fn(extiChannelRecs[idx].handler);
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exti_active &= ~mask;
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}
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}
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#define _EXTI_IRQ_HANDLER(name, mask) \
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void name(void) { \
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EXTI_IRQHandler(mask & EXTI_EVENT_MASK); \
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} \
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struct dummy \
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/**/
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_EXTI_IRQ_HANDLER(EINT0_IRQHandler, 0x0001);
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_EXTI_IRQ_HANDLER(EINT1_IRQHandler, 0x0002);
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#if defined(APM32F4)
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_EXTI_IRQ_HANDLER(EINT2_IRQHandler, 0x0004);
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#else
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# warning "Unknown CPU"
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#endif
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_EXTI_IRQ_HANDLER(EINT3_IRQHandler, 0x0008);
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_EXTI_IRQ_HANDLER(EINT4_IRQHandler, 0x0010);
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_EXTI_IRQ_HANDLER(EINT9_5_IRQHandler, 0x03e0);
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_EXTI_IRQ_HANDLER(EINT15_10_IRQHandler, 0xfc00);
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#endif
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