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https://github.com/betaflight/betaflight.git
synced 2025-07-24 08:45:36 +03:00
Cleaned up filenames to better reflect purpose
Fixed build issue following rebase
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parent
4e529642d1
commit
712985a7aa
6 changed files with 7 additions and 7 deletions
216
src/main/drivers/pwm_output_stm32f4xx.c
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216
src/main/drivers/pwm_output_stm32f4xx.c
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/*
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* This file is part of Betaflight.
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*
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* Betaflight is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Betaflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Betaflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <math.h>
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#include "platform.h"
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#include "io.h"
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#include "timer.h"
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#include "pwm_output.h"
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#include "nvic.h"
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#include "dma.h"
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#include "system.h"
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#include "rcc.h"
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#define MAX_DMA_TIMERS 8
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#define MOTOR_DSHOT600_MHZ 12
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#define MOTOR_DSHOT150_MHZ 3
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#define MOTOR_BIT_0 7
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#define MOTOR_BIT_1 14
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#define MOTOR_BITLENGTH 19
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static uint8_t dmaMotorTimerCount = 0;
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static motorDmaTimer_t dmaMotorTimers[MAX_DMA_TIMERS];
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static motorDmaOutput_t dmaMotors[MAX_SUPPORTED_MOTORS];
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uint8_t getTimerIndex(TIM_TypeDef *timer)
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{
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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if (dmaMotorTimers[i].timer == timer) {
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return i;
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}
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}
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dmaMotorTimers[dmaMotorTimerCount++].timer = timer;
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return dmaMotorTimerCount-1;
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}
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void pwmWriteDigital(uint8_t index, uint16_t value)
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{
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motorDmaOutput_t * const motor = &dmaMotors[index];
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value = (value - 1000) * 2;
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motor->value = value;
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motor->dmaBuffer[0] = (value & 0x400) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[1] = (value & 0x200) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[2] = (value & 0x100) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[3] = (value & 0x80) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[4] = (value & 0x40) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[5] = (value & 0x20) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[6] = (value & 0x10) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[7] = (value & 0x8) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[8] = (value & 0x4) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[9] = (value & 0x2) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[10] = (value & 0x1) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[11] = MOTOR_BIT_0; /* telemetry is always false for the moment */
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/* check sum */
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motor->dmaBuffer[12] = (value & 0x400) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[13] = (value & 0x200) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[14] = (value & 0x100) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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motor->dmaBuffer[15] = (value & 0x80) ? MOTOR_BIT_1 : MOTOR_BIT_0;
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DMA_SetCurrDataCounter(motor->timerHardware->dmaStream, MOTOR_DMA_BUFFER_SIZE);
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DMA_Cmd(motor->timerHardware->dmaStream, ENABLE);
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}
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void pwmCompleteDigitalMotorUpdate(uint8_t motorCount)
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{
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UNUSED(motorCount);
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for (uint8_t i = 0; i < dmaMotorTimerCount; i++) {
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TIM_SetCounter(dmaMotorTimers[i].timer, 0);
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TIM_DMACmd(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources, ENABLE);
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}
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}
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static void motor_DMA_IRQHandler(dmaChannelDescriptor_t *descriptor)
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{
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF)) {
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motorDmaOutput_t * const motor = &dmaMotors[descriptor->userParam];
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DMA_Cmd(descriptor->stream, DISABLE);
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TIM_DMACmd(motor->timerHardware->tim, motor->timerDmaSource, DISABLE);
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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}
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}
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void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t motorIndex, motorPwmProtocolTypes_e pwmProtocolType)
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{
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TIM_OCInitTypeDef TIM_OCInitStructure;
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DMA_InitTypeDef DMA_InitStructure;
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motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
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motor->timerHardware = timerHardware;
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TIM_TypeDef *timer = timerHardware->tim;
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const IO_t motorIO = IOGetByTag(timerHardware->tag);
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const uint8_t timerIndex = getTimerIndex(timer);
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const bool configureTimer = (timerIndex == dmaMotorTimerCount-1);
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IOInit(motorIO, OWNER_MOTOR, RESOURCE_OUTPUT, 0);
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IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP), timerGPIOAF(timer));
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if (configureTimer) {
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TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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RCC_ClockCmd(timerRCC(timer), ENABLE);
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TIM_Cmd(timer, DISABLE);
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uint32_t hz = (pwmProtocolType == PWM_TYPE_DSHOT600 ? MOTOR_DSHOT600_MHZ : MOTOR_DSHOT150_MHZ) * 1000000;
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TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / timerClockDivisor(timer) / hz) - 1;
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TIM_TimeBaseStructure.TIM_Period = MOTOR_BITLENGTH;
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TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseInit(timer, &TIM_TimeBaseStructure);
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}
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TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
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TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set;
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TIM_OCInitStructure.TIM_OCPolarity = TIM_OCNPolarity_High;
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TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
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TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
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TIM_OCInitStructure.TIM_Pulse = 0;
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uint32_t timerChannelAddress = 0;
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uint32_t dmaItFlag = 0;
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switch (timerHardware->channel) {
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case TIM_Channel_1:
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TIM_OC1Init(timer, &TIM_OCInitStructure);
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motor->timerDmaSource = TIM_DMA_CC1;
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timerChannelAddress = (uint32_t)(&timer->CCR1);
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TIM_OC1PreloadConfig(timer, TIM_OCPreload_Enable);
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dmaItFlag = DMA_IT_TCIF1;
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break;
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case TIM_Channel_2:
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TIM_OC2Init(timer, &TIM_OCInitStructure);
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motor->timerDmaSource = TIM_DMA_CC2;
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timerChannelAddress = (uint32_t)(&timer->CCR2);
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TIM_OC2PreloadConfig(timer, TIM_OCPreload_Enable);
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dmaItFlag = DMA_IT_TCIF2;
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break;
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case TIM_Channel_3:
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TIM_OC3Init(timer, &TIM_OCInitStructure);
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motor->timerDmaSource = TIM_DMA_CC3;
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timerChannelAddress = (uint32_t)(&timer->CCR3);
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TIM_OC3PreloadConfig(timer, TIM_OCPreload_Enable);
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dmaItFlag = DMA_IT_TCIF3;
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break;
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case TIM_Channel_4:
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TIM_OC4Init(timer, &TIM_OCInitStructure);
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motor->timerDmaSource = TIM_DMA_CC4;
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timerChannelAddress = (uint32_t)(&timer->CCR4);
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TIM_OC4PreloadConfig(timer, TIM_OCPreload_Enable);
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dmaItFlag = DMA_IT_TCIF4;
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break;
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}
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dmaMotorTimers[timerIndex].timerDmaSources |= motor->timerDmaSource;
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TIM_CCxCmd(timer, motor->timerHardware->channel, TIM_CCx_Enable);
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if (configureTimer) {
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TIM_CtrlPWMOutputs(timer, ENABLE);
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TIM_ARRPreloadConfig(timer, ENABLE);
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TIM_Cmd(timer, ENABLE);
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}
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DMA_Stream_TypeDef *stream = timerHardware->dmaStream;
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DMA_Cmd(stream, DISABLE);
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DMA_DeInit(stream);
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DMA_StructInit(&DMA_InitStructure);
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DMA_InitStructure.DMA_Channel = timerHardware->dmaChannel;
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DMA_InitStructure.DMA_PeripheralBaseAddr = timerChannelAddress;
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)motor->dmaBuffer;
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_BufferSize = MOTOR_DMA_BUFFER_SIZE;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(stream, &DMA_InitStructure);
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DMA_ITConfig(stream, DMA_IT_TC, ENABLE);
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DMA_ClearITPendingBit(stream, dmaItFlag);
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dmaSetHandler(timerHardware->dmaIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
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}
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