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AT32 development, introduction of AT32F435 target (#12247)
* AT32F435: new target (#12159) * AT32F435: New target (WIP) * IO and Timer Updates * Adding pseudonyms for the STM TypeDef items. - implementation to follow * Adding config_streamer support for AT32 * Implementation for IO * Adding in Peripheral mapping from emsr. * Warnings cleanup for AT drivers * Getting things to the linking stage * Add AT-START-F435 LEDs as default in AT32F435 as a temporary measure to aid bringup * Remove tabs * Enable selection of serial port to use for MSP * Setup defaults for AT-START-F435 to use MSP on UART1 * Fix for most recent 4.5.0 Makefile changes * Solve for sanity check. * Add AT32F435 MCU type * Fix compilation issue with SITL * Merge conflict resolution * Minor cleanup * Adding line feed. --------- Co-authored-by: Steve Evans <Steve@SCEvans.com>
This commit is contained in:
J Blackman
GitHub
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58 changed files with 6256 additions and 84 deletions
48
src/link/at32_flash_f43xM.ld
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48
src/link/at32_flash_f43xM.ld
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/*
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*****************************************************************************
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**
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** File : at32_flash_f43xM.ld
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**
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** Abstract : Linker script for AT32F435/7xM Device with
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** 4032KByte FLASH, 384KByte RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : Artery Tek AT32
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**
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** Environment : Arm gcc toolchain
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**
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*****************************************************************************
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*/
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/*
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FLASH : 0x0800 0000 -- 0x083E FFFF
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MEM : 0x2000 0000 -- 0x2007 FFFF
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*/
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 10K
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FLASH_CDEF (r) : ORIGIN = 0x08002800, LENGTH = 6K
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FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
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FLASH1 (rx) : ORIGIN = 0x08008000, LENGTH = DEFINED(USE_CUSTOM_DEFAULTS_EXTENDED) ? 3984K: 4000K
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FLASH_CDEF_EXT (r) : ORIGIN = DEFINED(USE_CUSTOM_DEFAULTS_EXTENDED) ? 0x083EC000 : 0x083F0000, LENGTH = DEFINED(USE_CUSTOM_DEFAULTS_EXTENDED) ? 16K : 0K
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SYSTEM_MEMORY (rx) : ORIGIN = 0x1FFF0000, LENGTH = 16K
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RAM1 (xrw) : ORIGIN = 0x10000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 128K
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MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K /* external ram */
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}
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REGION_ALIAS("STACKRAM", RAM)
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REGION_ALIAS("FASTRAM", RAM1)
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REGION_ALIAS("VECTAB", RAM1)
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REGION_ALIAS("MOVABLE_FLASH", FLASH1)
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INCLUDE "at32_flash_f4_split.ld"
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249
src/link/at32_flash_f4_split.ld
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249
src/link/at32_flash_f4_split.ld
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@ -0,0 +1,249 @@
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/*
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*****************************************************************************
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**
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** File : at32_flash_f4_split.ld
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**
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** Abstract : Common linker script for STM32 devices.
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**
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*****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_Hot_Reboot_Flags_Size = 16;
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_estack = ORIGIN(STACKRAM) + LENGTH(STACKRAM) - _Hot_Reboot_Flags_Size; /* end of RAM */
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/* Base address where the config is stored. */
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__config_start = ORIGIN(FLASH_CONFIG);
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__config_end = ORIGIN(FLASH_CONFIG) + LENGTH(FLASH_CONFIG);
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x800; /* required amount of stack */
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/* Define output sections */
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SECTIONS
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{
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/*
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* The ISR vector table is loaded at the beginning of the FLASH,
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* But it is linked (space reserved) at the beginning of the VECTAB region,
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* which is aliased either to FLASH or RAM.
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* When linked to RAM, the table can optionally be copied from FLASH to RAM
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* for table relocation.
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*/
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_isr_vector_table_flash_base = LOADADDR(.isr_vector);
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PROVIDE (isr_vector_table_flash_base = _isr_vector_table_flash_base);
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.isr_vector :
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{
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. = ALIGN(4);
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PROVIDE (isr_vector_table_base = .);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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PROVIDE (isr_vector_table_end = .);
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} >FLASH
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/* System memory (read-only bootloader) interrupt vector */
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.system_isr_vector (NOLOAD) :
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{
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. = ALIGN(4);
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PROVIDE (system_isr_vector_table_base = .);
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KEEP(*(.system_isr_vector)) /* Bootloader code */
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. = ALIGN(4);
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} >SYSTEM_MEMORY
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH1
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/*
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Critical program code goes into RAM1
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*/
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tcm_code = LOADADDR(.tcm_code);
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.tcm_code :
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{
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. = ALIGN(4);
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tcm_code_start = .;
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*(.tcm_code)
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*(.tcm_code*)
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. = ALIGN(4);
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tcm_code_end = .;
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} >RAM1 AT >FLASH1
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >MOVABLE_FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >MOVABLE_FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >MOVABLE_FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(.fini_array*))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >MOVABLE_FLASH
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.pg_registry :
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{
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PROVIDE_HIDDEN (__pg_registry_start = .);
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KEEP (*(.pg_registry))
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KEEP (*(SORT(.pg_registry.*)))
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PROVIDE_HIDDEN (__pg_registry_end = .);
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} >MOVABLE_FLASH
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.pg_resetdata :
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{
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PROVIDE_HIDDEN (__pg_resetdata_start = .);
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KEEP (*(.pg_resetdata))
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PROVIDE_HIDDEN (__pg_resetdata_end = .);
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} >FLASH1
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/* Storage for the address for the configuration section so we can grab it out of the hex file */
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.custom_defaults :
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{
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. = ALIGN(4);
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KEEP (*(.custom_defaults_start_address))
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. = ALIGN(4);
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KEEP (*(.custom_defaults_end_address))
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. = ALIGN(4);
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__custom_defaults_internal_start = .;
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KEEP (*(.custom_defaults))
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. = ALIGN(4);
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} >FLASH_CDEF
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PROVIDE_HIDDEN (__custom_defaults_start = DEFINED(USE_CUSTOM_DEFAULTS_EXTENDED) ? ORIGIN(FLASH_CDEF_EXT) : __custom_defaults_internal_start);
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PROVIDE_HIDDEN (__custom_defaults_end = DEFINED(USE_CUSTOM_DEFAULTS_EXTENDED) ? ORIGIN(FLASH_CDEF_EXT) + LENGTH(FLASH_CDEF_EXT) : ORIGIN(FLASH_CDEF) + LENGTH(FLASH_CDEF));
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> MOVABLE_FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss (NOLOAD) :
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{
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(SORT_BY_ALIGNMENT(.bss*))
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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/* used during startup to initialized fastram_data */
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_sfastram_idata = LOADADDR(.fastram_data);
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/* Initialized FAST_DATA section for unsuspecting developers */
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.fastram_data :
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{
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. = ALIGN(4);
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_sfastram_data = .; /* create a global symbol at data start */
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*(.fastram_data) /* .data sections */
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*(.fastram_data*) /* .data* sections */
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. = ALIGN(4);
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_efastram_data = .; /* define a global symbol at data end */
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} >FASTRAM AT> FLASH1
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. = ALIGN(4);
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.fastram_bss (NOLOAD) :
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{
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_sfastram_bss = .;
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__fastram_bss_start__ = _sfastram_bss;
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*(.fastram_bss)
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*(SORT_BY_ALIGNMENT(.fastram_bss*))
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. = ALIGN(4);
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_efastram_bss = .;
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__fastram_bss_end__ = _efastram_bss;
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} >FASTRAM
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.persistent_data (NOLOAD) :
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{
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__persistent_data_start__ = .;
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*(.persistent_data)
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. = ALIGN(4);
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__persistent_data_end__ = .;
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} >FASTRAM
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/* User_heap_stack section, used to check that there is enough RAM left */
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_heap_stack_end = ORIGIN(STACKRAM) + LENGTH(STACKRAM) - _Hot_Reboot_Flags_Size;
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_heap_stack_begin = _heap_stack_end - _Min_Stack_Size - _Min_Heap_Size;
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. = _heap_stack_begin;
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._user_heap_stack :
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{
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. = ALIGN(4);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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} >STACKRAM = 0xa5
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/* MEMORY_bank1 section, code must be located here explicitly */
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/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
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.memory_b1_text :
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{
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*(.mb1text) /* .mb1text sections (code) */
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*(.mb1text*) /* .mb1text* sections (code) */
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*(.mb1rodata) /* read-only data (constants) */
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*(.mb1rodata*)
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} >MEMORY_B1
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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