diff --git a/make/targets.mk b/make/targets.mk index d4004471f5..807bd9f125 100644 --- a/make/targets.mk +++ b/make/targets.mk @@ -23,8 +23,7 @@ UNSUPPORTED_TARGETS := \ CC3D_OPBL \ CJMCU \ MICROSCISKY \ - NAZE \ - KISSFCV2F7 + NAZE SUPPORTED_TARGETS := $(filter-out $(UNSUPPORTED_TARGETS), $(VALID_TARGETS)) diff --git a/src/main/target/KISSFCV2F7/stm32_flash_f722_no_split.ld b/src/main/target/KISSFCV2F7/stm32_flash_f722_no_split.ld index 14fefb0fd5..ac09a4c48a 100644 --- a/src/main/target/KISSFCV2F7/stm32_flash_f722_no_split.ld +++ b/src/main/target/KISSFCV2F7/stm32_flash_f722_no_split.ld @@ -12,236 +12,40 @@ /* Entry Point */ ENTRY(Reset_Handler) +/* +0x08000000 to 0x0807FFFF 512K full flash +0x08000000 to 0x08003FFF 16K KISS bootloader +0x08004000 to 0x08007FFF 16K config +0x08008000 to 0x0807FFFF 480K ISR vector, firmware +*/ /* Specify the memory areas */ MEMORY { - ITCM_ISR (rx) : ORIGIN = 0x00000000, LENGTH = 1K - ITCM_RAM (rx) : ORIGIN = 0x00000400, LENGTH = 15K + ITCM_RAM (rx) : ORIGIN = 0x00000000, LENGTH = 16K - /* Bootloader stays in the first sector (16K) */ - FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K /*second (16K) sector for eeprom emulation*/ - FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 480K /*main fw*/ + /* config occupies the entire flash sector 1 for the ease of erasure, 16K on F72x */ + ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00204000, LENGTH = 16K + ITCM_FLASH (rx) : ORIGIN = 0x00208000, LENGTH = 480K - TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K - SRAM1 (rwx) : ORIGIN = 0x20010000, LENGTH = 176K - SRAM2 (rwx) : ORIGIN = 0x2003C000, LENGTH = 16K - MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K + AXIM_FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K + AXIM_FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 480K + + DTCM_RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K + SRAM1 (rwx) : ORIGIN = 0x20010000, LENGTH = 176K + SRAM2 (rwx) : ORIGIN = 0x2003C000, LENGTH = 16K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K } -/* note TCM could be used for stack */ -REGION_ALIAS("STACKRAM", TCM) -REGION_ALIAS("FASTRAM", TCM) +REGION_ALIAS("ITCM_FLASH1", ITCM_FLASH) +REGION_ALIAS("AXIM_FLASH1", AXIM_FLASH) + +REGION_ALIAS("FLASH", AXIM_FLASH) +REGION_ALIAS("FLASH_CONFIG", AXIM_FLASH_CONFIG) +REGION_ALIAS("FLASH1", AXIM_FLASH1) + +REGION_ALIAS("STACKRAM", DTCM_RAM) +REGION_ALIAS("FASTRAM", DTCM_RAM) REGION_ALIAS("RAM", SRAM1) - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = ORIGIN(STACKRAM) + LENGTH(STACKRAM); /* end of RAM */ - -/* Base address where the config is stored. */ -__config_start = ORIGIN(FLASH_CONFIG); -__config_end = ORIGIN(FLASH_CONFIG) + LENGTH(FLASH_CONFIG); - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0; /* required amount of heap */ -_Min_Stack_Size = 0x800; /* required amount of stack */ - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - PROVIDE (isr_vector_table_base = .); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* Critical program code goes into ITCM RAM */ - /* Copy specific fast-executing code to ITCM RAM */ - tcm_code = LOADADDR(.tcm_code); - .tcm_code : - { - . = ALIGN(4); - tcm_code_start = .; - *(.tcm_code) - *(.tcm_code*) - . = ALIGN(4); - tcm_code_end = .; - } >ITCM_RAM AT >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array*)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - .pg_registry : - { - PROVIDE_HIDDEN (__pg_registry_start = .); - KEEP (*(.pg_registry)) - KEEP (*(SORT(.pg_registry.*))) - PROVIDE_HIDDEN (__pg_registry_end = .); - } >FLASH - .pg_resetdata : - { - PROVIDE_HIDDEN (__pg_resetdata_start = .); - KEEP (*(.pg_resetdata)) - PROVIDE_HIDDEN (__pg_resetdata_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM AT> FLASH - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(SORT_BY_ALIGNMENT(.bss*)) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* Uninitialized data section */ - . = ALIGN(4); - .sram2 (NOLOAD) : - { - /* This is used by the startup in order to initialize the .sram2 secion */ - _ssram2 = .; /* define a global symbol at sram2 start */ - __sram2_start__ = _ssram2; - *(.sram2) - *(SORT_BY_ALIGNMENT(.sram2*)) - *(COMMON) - - . = ALIGN(4); - _esram2 = .; /* define a global symbol at sram2 end */ - __sram2_end__ = _esram2; - } >SRAM2 - - /* used during startup to initialized fastram_data */ - _sfastram_idata = LOADADDR(.fastram_data); - - /* Initialized FAST_RAM section for unsuspecting developers */ - .fastram_data : - { - . = ALIGN(4); - _sfastram_data = .; /* create a global symbol at data start */ - *(.fastram_data) /* .data sections */ - *(.fastram_data*) /* .data* sections */ - - . = ALIGN(4); - _efastram_data = .; /* define a global symbol at data end */ - } >FASTRAM AT> FLASH - - . = ALIGN(4); - .fastram_bss (NOLOAD) : - { - _sfastram_bss = .; - __fastram_bss_start__ = _sfastram_bss; - *(.fastram_bss) - *(SORT_BY_ALIGNMENT(.fastram_bss*)) - - . = ALIGN(4); - _efastram_bss = .; - __fastram_bss_end__ = _efastram_bss; - } >FASTRAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - _heap_stack_end = ORIGIN(STACKRAM)+LENGTH(STACKRAM) - 8; /* 8 bytes to allow for alignment */ - _heap_stack_begin = _heap_stack_end - _Min_Stack_Size - _Min_Heap_Size; - . = _heap_stack_begin; - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >STACKRAM = 0xa5 - - /* MEMORY_bank1 section, code must be located here explicitly */ - /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ - .memory_b1_text : - { - *(.mb1text) /* .mb1text sections (code) */ - *(.mb1text*) /* .mb1text* sections (code) */ - *(.mb1rodata) /* read-only data (constants) */ - *(.mb1rodata*) - } >MEMORY_B1 - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - +INCLUDE "stm32_flash_f7_split.ld" diff --git a/src/main/target/KISSFCV2F7/target.mk b/src/main/target/KISSFCV2F7/target.mk index 25e86b723b..7101dd1221 100644 --- a/src/main/target/KISSFCV2F7/target.mk +++ b/src/main/target/KISSFCV2F7/target.mk @@ -1,7 +1,6 @@ F7X2RE_TARGETS += $(TARGET) LD_SCRIPT = $(ROOT)/src/main/target/$(TARGET)/stm32_flash_f722_no_split.ld -CFLAGS += -D'CUSTOM_VECT_TAB_OFFSET=0x8000' \ - -DCLOCK_SOURCE_USE_HSI +CFLAGS += -DCLOCK_SOURCE_USE_HSI TARGET_SRC = \ drivers/accgyro/accgyro_spi_mpu6000.c diff --git a/src/main/target/link/stm32_flash_f722.ld b/src/main/target/link/stm32_flash_f722.ld index 47f235de21..b9e3041b99 100644 --- a/src/main/target/link/stm32_flash_f722.ld +++ b/src/main/target/link/stm32_flash_f722.ld @@ -13,10 +13,10 @@ ENTRY(Reset_Handler) /* -0x08000000 to 0x0807FFFF 512K full flash, -0x08000000 to 0x08003FFF 16K isr vector, startup code, -0x08004000 to 0x08007FFF 16K config, // FLASH_Sector_1 -0x08008000 to 0x0807FFFF 480K firmware, +0x08000000 to 0x0807FFFF 512K full flash +0x08000000 to 0x08003FFF 16K ISR vector +0x08004000 to 0x08007FFF 16K config +0x08008000 to 0x0807FFFF 480K firmware */ /* Specify the memory areas */ diff --git a/src/main/target/link/stm32_flash_f7_split.ld b/src/main/target/link/stm32_flash_f7_split.ld index e0bd39f5d0..f6312646d6 100644 --- a/src/main/target/link/stm32_flash_f7_split.ld +++ b/src/main/target/link/stm32_flash_f7_split.ld @@ -28,7 +28,7 @@ SECTIONS /* The startup code goes first into FLASH */ .isr_vector : { - . = ALIGN(4); + . = ALIGN(512); PROVIDE (isr_vector_table_base = .); KEEP(*(.isr_vector)) /* Startup code */ . = ALIGN(4); @@ -132,7 +132,6 @@ SECTIONS __sram2_start__ = _ssram2; *(.sram2) *(SORT_BY_ALIGNMENT(.sram2*)) - *(COMMON) . = ALIGN(4); _esram2 = .; /* define a global symbol at sram2 end */ diff --git a/src/main/target/system_stm32f7xx.c b/src/main/target/system_stm32f7xx.c index bd22beadef..1354bec2e6 100644 --- a/src/main/target/system_stm32f7xx.c +++ b/src/main/target/system_stm32f7xx.c @@ -100,19 +100,6 @@ * @{ */ -/************************* Miscellaneous Configuration ************************/ - -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#ifdef CUSTOM_VECT_TAB_OFFSET -#define VECT_TAB_OFFSET CUSTOM_VECT_TAB_OFFSET -#else -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.*/ -#endif - /*This value must be a multiple of 0x200. */ -/******************************************************************************/ - /** * @} */ @@ -346,12 +333,15 @@ void SystemInit(void) /* Disable all interrupts */ RCC->CIR = 0x00000000; - /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ -#endif + /* Configure the Vector Table location add offset address ------------------*/ + extern uint8_t isr_vector_table_base; + const uint32_t vtorOffset = (uint32_t) &isr_vector_table_base; +#define VTOR_OFFSET_ALIGNMENT 0x200 +#define VTOR_OFFSET_MASK (VTOR_OFFSET_ALIGNMENT - 1) + STATIC_ASSERT((vtorOffset % VTOR_OFFSET_MASK) == 0, isr_vector_table_base_is_not_512_byte_aligned); + SCB->VTOR = vtorOffset; +#undef VTOR_OFFSET_MASK +#undef VTOR_OFFSET_ALIGNMENT /* Enable I-Cache */ if (INSTRUCTION_CACHE_ENABLE) {