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Merge pull request #6435 from DieHertz/bfdev-unify-kissfcv2f7-linker-script
Unified KISSFC V2 F7 linker script
This commit is contained in:
Michael Keller
GitHub
commit
7ee45d1a73
6 changed files with 43 additions and 252 deletions
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@ -23,8 +23,7 @@ UNSUPPORTED_TARGETS := \
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CC3D_OPBL \
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CJMCU \
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MICROSCISKY \
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NAZE \
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KISSFCV2F7
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NAZE
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SUPPORTED_TARGETS := $(filter-out $(UNSUPPORTED_TARGETS), $(VALID_TARGETS))
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@ -12,236 +12,40 @@
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/* Entry Point */
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ENTRY(Reset_Handler)
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/*
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0x08000000 to 0x0807FFFF 512K full flash
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0x08000000 to 0x08003FFF 16K KISS bootloader
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0x08004000 to 0x08007FFF 16K config
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0x08008000 to 0x0807FFFF 480K ISR vector, firmware
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*/
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/* Specify the memory areas */
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MEMORY
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{
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ITCM_ISR (rx) : ORIGIN = 0x00000000, LENGTH = 1K
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ITCM_RAM (rx) : ORIGIN = 0x00000400, LENGTH = 15K
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ITCM_RAM (rx) : ORIGIN = 0x00000000, LENGTH = 16K
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/* Bootloader stays in the first sector (16K) */
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FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K /*second (16K) sector for eeprom emulation*/
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FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 480K /*main fw*/
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/* config occupies the entire flash sector 1 for the ease of erasure, 16K on F72x */
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ITCM_FLASH_CONFIG (r) : ORIGIN = 0x00204000, LENGTH = 16K
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ITCM_FLASH (rx) : ORIGIN = 0x00208000, LENGTH = 480K
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TCM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
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AXIM_FLASH_CONFIG (r) : ORIGIN = 0x08004000, LENGTH = 16K
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AXIM_FLASH (rx) : ORIGIN = 0x08008000, LENGTH = 480K
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DTCM_RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
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SRAM1 (rwx) : ORIGIN = 0x20010000, LENGTH = 176K
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SRAM2 (rwx) : ORIGIN = 0x2003C000, LENGTH = 16K
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MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
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}
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/* note TCM could be used for stack */
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REGION_ALIAS("STACKRAM", TCM)
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REGION_ALIAS("FASTRAM", TCM)
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REGION_ALIAS("ITCM_FLASH1", ITCM_FLASH)
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REGION_ALIAS("AXIM_FLASH1", AXIM_FLASH)
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REGION_ALIAS("FLASH", AXIM_FLASH)
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REGION_ALIAS("FLASH_CONFIG", AXIM_FLASH_CONFIG)
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REGION_ALIAS("FLASH1", AXIM_FLASH1)
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REGION_ALIAS("STACKRAM", DTCM_RAM)
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REGION_ALIAS("FASTRAM", DTCM_RAM)
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REGION_ALIAS("RAM", SRAM1)
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = ORIGIN(STACKRAM) + LENGTH(STACKRAM); /* end of RAM */
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/* Base address where the config is stored. */
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__config_start = ORIGIN(FLASH_CONFIG);
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__config_end = ORIGIN(FLASH_CONFIG) + LENGTH(FLASH_CONFIG);
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0; /* required amount of heap */
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_Min_Stack_Size = 0x800; /* required amount of stack */
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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PROVIDE (isr_vector_table_base = .);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* Critical program code goes into ITCM RAM */
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/* Copy specific fast-executing code to ITCM RAM */
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tcm_code = LOADADDR(.tcm_code);
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.tcm_code :
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{
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. = ALIGN(4);
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tcm_code_start = .;
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*(.tcm_code)
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*(.tcm_code*)
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. = ALIGN(4);
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tcm_code_end = .;
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} >ITCM_RAM AT >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(.fini_array*))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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.pg_registry :
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{
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PROVIDE_HIDDEN (__pg_registry_start = .);
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KEEP (*(.pg_registry))
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KEEP (*(SORT(.pg_registry.*)))
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PROVIDE_HIDDEN (__pg_registry_end = .);
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} >FLASH
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.pg_resetdata :
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{
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PROVIDE_HIDDEN (__pg_resetdata_start = .);
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KEEP (*(.pg_resetdata))
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PROVIDE_HIDDEN (__pg_resetdata_end = .);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(SORT_BY_ALIGNMENT(.bss*))
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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/* Uninitialized data section */
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. = ALIGN(4);
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.sram2 (NOLOAD) :
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{
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/* This is used by the startup in order to initialize the .sram2 secion */
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_ssram2 = .; /* define a global symbol at sram2 start */
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__sram2_start__ = _ssram2;
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*(.sram2)
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*(SORT_BY_ALIGNMENT(.sram2*))
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*(COMMON)
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. = ALIGN(4);
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_esram2 = .; /* define a global symbol at sram2 end */
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__sram2_end__ = _esram2;
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} >SRAM2
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/* used during startup to initialized fastram_data */
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_sfastram_idata = LOADADDR(.fastram_data);
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/* Initialized FAST_RAM section for unsuspecting developers */
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.fastram_data :
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{
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. = ALIGN(4);
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_sfastram_data = .; /* create a global symbol at data start */
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*(.fastram_data) /* .data sections */
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*(.fastram_data*) /* .data* sections */
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. = ALIGN(4);
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_efastram_data = .; /* define a global symbol at data end */
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} >FASTRAM AT> FLASH
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. = ALIGN(4);
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.fastram_bss (NOLOAD) :
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{
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_sfastram_bss = .;
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__fastram_bss_start__ = _sfastram_bss;
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*(.fastram_bss)
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*(SORT_BY_ALIGNMENT(.fastram_bss*))
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. = ALIGN(4);
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_efastram_bss = .;
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__fastram_bss_end__ = _efastram_bss;
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} >FASTRAM
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/* User_heap_stack section, used to check that there is enough RAM left */
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_heap_stack_end = ORIGIN(STACKRAM)+LENGTH(STACKRAM) - 8; /* 8 bytes to allow for alignment */
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_heap_stack_begin = _heap_stack_end - _Min_Stack_Size - _Min_Heap_Size;
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. = _heap_stack_begin;
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._user_heap_stack :
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{
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. = ALIGN(4);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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} >STACKRAM = 0xa5
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/* MEMORY_bank1 section, code must be located here explicitly */
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/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
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.memory_b1_text :
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{
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*(.mb1text) /* .mb1text sections (code) */
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*(.mb1text*) /* .mb1text* sections (code) */
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*(.mb1rodata) /* read-only data (constants) */
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*(.mb1rodata*)
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} >MEMORY_B1
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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INCLUDE "stm32_flash_f7_split.ld"
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@ -1,7 +1,6 @@
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F7X2RE_TARGETS += $(TARGET)
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LD_SCRIPT = $(ROOT)/src/main/target/$(TARGET)/stm32_flash_f722_no_split.ld
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CFLAGS += -D'CUSTOM_VECT_TAB_OFFSET=0x8000' \
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-DCLOCK_SOURCE_USE_HSI
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CFLAGS += -DCLOCK_SOURCE_USE_HSI
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TARGET_SRC = \
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drivers/accgyro/accgyro_spi_mpu6000.c
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@ -13,10 +13,10 @@
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ENTRY(Reset_Handler)
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/*
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0x08000000 to 0x0807FFFF 512K full flash,
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0x08000000 to 0x08003FFF 16K isr vector, startup code,
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0x08004000 to 0x08007FFF 16K config, // FLASH_Sector_1
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0x08008000 to 0x0807FFFF 480K firmware,
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0x08000000 to 0x0807FFFF 512K full flash
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0x08000000 to 0x08003FFF 16K ISR vector
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0x08004000 to 0x08007FFF 16K config
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0x08008000 to 0x0807FFFF 480K firmware
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*/
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/* Specify the memory areas */
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@ -28,7 +28,7 @@ SECTIONS
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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. = ALIGN(512);
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PROVIDE (isr_vector_table_base = .);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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@ -132,7 +132,6 @@ SECTIONS
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__sram2_start__ = _ssram2;
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*(.sram2)
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*(SORT_BY_ALIGNMENT(.sram2*))
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*(COMMON)
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. = ALIGN(4);
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_esram2 = .; /* define a global symbol at sram2 end */
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@ -100,19 +100,6 @@
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* @{
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*/
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/************************* Miscellaneous Configuration ************************/
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/*!< Uncomment the following line if you need to relocate your vector Table in
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Internal SRAM. */
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/* #define VECT_TAB_SRAM */
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#ifdef CUSTOM_VECT_TAB_OFFSET
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#define VECT_TAB_OFFSET CUSTOM_VECT_TAB_OFFSET
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#else
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#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.*/
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#endif
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/*This value must be a multiple of 0x200. */
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/******************************************************************************/
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/**
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* @}
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*/
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@ -347,11 +334,14 @@ void SystemInit(void)
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RCC->CIR = 0x00000000;
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/* Configure the Vector Table location add offset address ------------------*/
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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#endif
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extern uint8_t isr_vector_table_base;
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const uint32_t vtorOffset = (uint32_t) &isr_vector_table_base;
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#define VTOR_OFFSET_ALIGNMENT 0x200
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#define VTOR_OFFSET_MASK (VTOR_OFFSET_ALIGNMENT - 1)
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STATIC_ASSERT((vtorOffset % VTOR_OFFSET_MASK) == 0, isr_vector_table_base_is_not_512_byte_aligned);
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SCB->VTOR = vtorOffset;
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#undef VTOR_OFFSET_MASK
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#undef VTOR_OFFSET_ALIGNMENT
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/* Enable I-Cache */
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if (INSTRUCTION_CACHE_ENABLE) {
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