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Fix F4 targets
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parent
acdcff176f
commit
801add3ce3
3 changed files with 19 additions and 18 deletions
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@ -20,7 +20,6 @@ struct dmaChannelDescriptor_s;
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typedef void (*dmaCallbackHandlerFuncPtr)(struct dmaChannelDescriptor_s *channelDescriptor);
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#ifdef STM32F4
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typedef void(*dmaCallbackHandlerFuncPtr)(DMA_Stream_TypeDef *stream);
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typedef enum {
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DMA1_ST1_HANDLER = 0,
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@ -55,7 +54,7 @@ typedef struct dmaChannelDescriptor_s {
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dmaDescriptors[i].irqHandlerCallback(&dmaDescriptors[i]);\
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}
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#define DMA_CLEAR_FLAG(d, flag) d->flagsShift > 31 ? d->dma->HIFCR = (flag << (d->flagsShift - 32)) : d->dma->LIFCR = (flag << d->flagsShift)
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#define DMA_CLEAR_FLAG(d, flag) if(d->flagsShift > 31) d->dma->HIFCR = (flag << (d->flagsShift - 32)); else d->dma->LIFCR = (flag << d->flagsShift)
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#define DMA_GET_FLAG_STATUS(d, flag) (d->flagsShift > 31 ? d->dma->HISR & (flag << (d->flagsShift - 32)): d->dma->LISR & (flag << d->flagsShift))
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@ -53,18 +53,18 @@ static dmaChannelDescriptor_t dmaDescriptors[] = {
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/*
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* DMA IRQ Handlers
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*/
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DEFINE_DMA_IRQ_HANDLER(1, 1, DMA1_CH1_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 2, DMA1_CH2_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 3, DMA1_CH3_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 4, DMA1_CH4_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 5, DMA1_CH5_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 6, DMA1_CH6_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 7, DMA1_CH7_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 1, DMA2_CH1_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 2, DMA2_CH2_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 3, DMA2_CH3_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 4, DMA2_CH4_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 5, DMA2_CH5_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 1, DMA1_ST1_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 2, DMA1_ST2_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 3, DMA1_ST3_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 4, DMA1_ST4_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 5, DMA1_ST5_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 6, DMA1_ST6_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(1, 7, DMA1_ST7_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 1, DMA2_ST1_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 2, DMA2_ST2_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 3, DMA2_ST3_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 4, DMA2_ST4_HANDLER)
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DEFINE_DMA_IRQ_HANDLER(2, 5, DMA2_ST5_HANDLER)
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void dmaInit(void)
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@ -72,12 +72,13 @@ void dmaInit(void)
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// TODO: Do we need this?
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}
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void dmaSetHandler(dmaHandlerIdentifier_e identifier, dmaCallbackHandlerFuncPtr callback, uint32_t priority)
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void dmaSetHandler(dmaHandlerIdentifier_e identifier, dmaCallbackHandlerFuncPtr callback, uint32_t priority, uint32_t userParam)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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RCC_AHB1PeriphClockCmd(dmaDescriptors[identifier].periphClk, ENABLE);
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RCC_AHB1PeriphClockCmd(dmaDescriptors[identifier].rrc, ENABLE);
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dmaDescriptors[identifier].irqHandlerCallback = callback;
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dmaDescriptors[identifier].userParam = userParam;
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NVIC_InitStructure.NVIC_IRQChannel = dmaDescriptors[identifier].irqN;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(priority);
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@ -25,6 +25,7 @@
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#include "io.h"
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#include "rcc.h"
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#include "nvic.h"
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#include "dma.h"
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#include "serial.h"
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#include "serial_uart.h"
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@ -278,9 +279,9 @@ static void handleUsartTxDma(uartPort_t *s)
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s->txDMAEmpty = true;
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}
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void dmaIRQHandler(dmaChannelDescriptor_t descriptor)
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void dmaIRQHandler(dmaChannelDescriptor_t* descriptor)
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{
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uartPort_t *s = &((uartDevice_t*)(descriptor->userParam)->port);
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uartPort_t *s = &(((uartDevice_t*)(descriptor->userParam))->port);
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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