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Code Issues Wiki Activity

Added UART alternative functions for F765

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This commit is contained in:
Andrey Mironov 2018-09-07 22:53:19 +03:00
parent 7a331d03f4
commit 8073cb8665
2 changed files with 104 additions and 24 deletions
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6
src/main/drivers/serial_uart_impl.h
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@ -51,7 +51,7 @@
#endif #endif
#elif defined(STM32F7) #elif defined(STM32F7)
#define UARTDEV_COUNT_MAX 8 #define UARTDEV_COUNT_MAX 8
#define UARTHARDWARE_MAX_PINS 3 #define UARTHARDWARE_MAX_PINS 4
#ifndef UART_RX_BUFFER_SIZE #ifndef UART_RX_BUFFER_SIZE
#define UART_RX_BUFFER_SIZE 128 #define UART_RX_BUFFER_SIZE 128
#endif #endif
@ -134,7 +134,11 @@ typedef struct uartHardware_s {
#else #else
rccPeriphTag_t rcc; rccPeriphTag_t rcc;
#endif #endif
#if defined(STM32F7)
uint8_t afs[UARTHARDWARE_MAX_PINS];
#else
uint8_t af; uint8_t af;
#endif
#if defined(STM32F7) #if defined(STM32F7)
uint8_t txIrq; uint8_t txIrq;
uint8_t rxIrq; uint8_t rxIrq;

122
src/main/drivers/serial_uart_stm32f7xx.c
View file

@ -53,9 +53,25 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART1_TX_DMA #ifdef USE_UART1_TX_DMA
.txDMAStream = DMA2_Stream7, .txDMAStream = DMA2_Stream7,
#endif #endif
.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE }, .rxPins = {
.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE }, DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7),
.af = GPIO_AF7_USART1, #ifdef STM32F765xx
DEFIO_TAG_E(PB15),
#else
IO_TAG_NONE,
#endif
IO_TAG_NONE
},
.txPins = {
DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6),
#ifdef STM32F765xx
DEFIO_TAG_E(PB14),
#else
IO_TAG_NONE,
#endif
IO_TAG_NONE
},
.afs = { GPIO_AF7_USART1, GPIO_AF7_USART1, GPIO_AF4_USART1 },
#ifdef UART1_AHB1_PERIPHERALS #ifdef UART1_AHB1_PERIPHERALS
.rcc_ahb1 = UART1_AHB1_PERIPHERALS, .rcc_ahb1 = UART1_AHB1_PERIPHERALS,
#endif #endif
@ -78,9 +94,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART2_TX_DMA #ifdef USE_UART2_TX_DMA
.txDMAStream = DMA1_Stream6, .txDMAStream = DMA1_Stream6,
#endif #endif
.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE, IO_TAG_NONE },
.af = GPIO_AF7_USART2, .afs = { GPIO_AF7_USART2, GPIO_AF7_USART2 },
#ifdef UART2_AHB1_PERIPHERALS #ifdef UART2_AHB1_PERIPHERALS
.rcc_ahb1 = UART2_AHB1_PERIPHERALS, .rcc_ahb1 = UART2_AHB1_PERIPHERALS,
#endif #endif
@ -103,9 +119,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART3_TX_DMA #ifdef USE_UART3_TX_DMA
.txDMAStream = DMA1_Stream3, .txDMAStream = DMA1_Stream3,
#endif #endif
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9) }, .rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8) }, .txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8), IO_TAG_NONE },
.af = GPIO_AF7_USART3, .afs = { GPIO_AF7_USART3, GPIO_AF7_USART3, GPIO_AF7_USART3 },
#ifdef UART3_AHB1_PERIPHERALS #ifdef UART3_AHB1_PERIPHERALS
.rcc_ahb1 = UART3_AHB1_PERIPHERALS, .rcc_ahb1 = UART3_AHB1_PERIPHERALS,
#endif #endif
@ -128,9 +144,27 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART4_TX_DMA #ifdef USE_UART4_TX_DMA
.txDMAStream = DMA1_Stream4, .txDMAStream = DMA1_Stream4,
#endif #endif
.rxPins = { DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11), IO_TAG_NONE }, .rxPins = {
.txPins = { DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10), IO_TAG_NONE }, DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11),
.af = GPIO_AF8_UART4, #ifdef STM32F765xx
DEFIO_TAG_E(PA11),
DEFIO_TAG_E(PD0),
#else
IO_TAG_NONE,
IO_TAG_NONE
#endif
},
.txPins = {
DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10),
#ifdef STM32F765xx
DEFIO_TAG_E(PA12),
DEFIO_TAG_E(PD0),
#else
IO_TAG_NONE,
IO_TAG_NONE
#endif
},
.afs = { GPIO_AF8_UART4, GPIO_AF8_UART4, GPIO_AF6_UART4, GPIO_AF8_UART4 },
#ifdef UART4_AHB1_PERIPHERALS #ifdef UART4_AHB1_PERIPHERALS
.rcc_ahb1 = UART4_AHB1_PERIPHERALS, .rcc_ahb1 = UART4_AHB1_PERIPHERALS,
#endif #endif
@ -153,9 +187,23 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART5_TX_DMA #ifdef USE_UART5_TX_DMA
.txDMAStream = DMA1_Stream7, .txDMAStream = DMA1_Stream7,
#endif #endif
.rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE }, .rxPins = {
.txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE }, DEFIO_TAG_E(PD2),
.af = GPIO_AF8_UART5, #ifdef STM32F765xx
DEFIO_TAG_E(PB5), DEFIO_TAG_E(PB8), DEFIO_TAG_E(PB12),
#else
IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE
#endif
},
.txPins = {
DEFIO_TAG_E(PC12),
#ifdef STM32F765xx
DEFIO_TAG_E(PB6), DEFIO_TAG_E(PB9), DEFIO_TAG_E(PB13),
#else
IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE
#endif
},
.afs = { GPIO_AF8_UART5, GPIO_AF1_UART5, GPIO_AF7_UART5, GPIO_AF8_UART5 },
#ifdef UART5_AHB1_PERIPHERALS #ifdef UART5_AHB1_PERIPHERALS
.rcc_ahb1 = UART5_AHB1_PERIPHERALS, .rcc_ahb1 = UART5_AHB1_PERIPHERALS,
#endif #endif
@ -180,7 +228,7 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#endif #endif
.rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE },
.af = GPIO_AF8_USART6, .afs = { GPIO_AF8_USART6, GPIO_AF8_USART6 },
#ifdef UART6_AHB1_PERIPHERALS #ifdef UART6_AHB1_PERIPHERALS
.rcc_ahb1 = UART6_AHB1_PERIPHERALS, .rcc_ahb1 = UART6_AHB1_PERIPHERALS,
#endif #endif
@ -203,9 +251,23 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART7_TX_DMA #ifdef USE_UART7_TX_DMA
.txDMAStream = DMA1_Stream1, .txDMAStream = DMA1_Stream1,
#endif #endif
.rxPins = { DEFIO_TAG_E(PE7), DEFIO_TAG_E(PF6), IO_TAG_NONE }, .rxPins = {
.txPins = { DEFIO_TAG_E(PE8), DEFIO_TAG_E(PF7), IO_TAG_NONE }, DEFIO_TAG_E(PE7), DEFIO_TAG_E(PF6),
.af = GPIO_AF8_UART7, #ifdef STM32F765xx
DEFIO_TAG_E(PA8), DEFIO_TAG_E(PB3),
#else
IO_TAG_NONE, IO_TAG_NONE
#endif
},
.txPins = {
DEFIO_TAG_E(PE8), DEFIO_TAG_E(PF7),
#ifdef STM32F765xx
DEFIO_TAG_E(PA15), DEFIO_TAG_E(PB4),
#else
IO_TAG_NONE, IO_TAG_NONE
#endif
},
.afs = { GPIO_AF8_UART7, GPIO_AF8_UART7, GPIO_AF12_UART7, GPIO_AF12_UART7 },
#ifdef UART7_AHB1_PERIPHERALS #ifdef UART7_AHB1_PERIPHERALS
.rcc_ahb1 = UART7_AHB1_PERIPHERALS, .rcc_ahb1 = UART7_AHB1_PERIPHERALS,
#endif #endif
@ -230,7 +292,7 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#endif #endif
.rxPins = { DEFIO_TAG_E(PE0), IO_TAG_NONE, IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PE0), IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PE1), IO_TAG_NONE, IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PE1), IO_TAG_NONE, IO_TAG_NONE },
.af = GPIO_AF8_UART8, .afs = { GPIO_AF8_UART8, GPIO_AF8_UART8, 0 },
#ifdef UART8_AHB1_PERIPHERALS #ifdef UART8_AHB1_PERIPHERALS
.rcc_ahb1 = UART8_AHB1_PERIPHERALS, .rcc_ahb1 = UART8_AHB1_PERIPHERALS,
#endif #endif
@ -371,6 +433,20 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
s->Handle.Instance = hardware->reg; s->Handle.Instance = hardware->reg;
size_t txPinIndex;
for (txPinIndex = 0; txPinIndex < UARTHARDWARE_MAX_PINS; ++txPinIndex) {
if (hardware->txPins[txPinIndex] == uartdev->tx) {
break;
}
}
size_t rxPinIndex;
for (rxPinIndex = 0; rxPinIndex < UARTHARDWARE_MAX_PINS; ++rxPinIndex) {
if (hardware->rxPins[rxPinIndex] == uartdev->rx) {
break;
}
}
IO_t txIO = IOGetByTag(uartdev->tx); IO_t txIO = IOGetByTag(uartdev->tx);
IO_t rxIO = IOGetByTag(uartdev->rx); IO_t rxIO = IOGetByTag(uartdev->rx);
@ -382,17 +458,17 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
); );
IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device)); IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
IOConfigGPIOAF(txIO, ioCfg, hardware->af); IOConfigGPIOAF(txIO, ioCfg, hardware->afs[txPinIndex]);
} }
else { else {
if ((mode & MODE_TX) && txIO) { if ((mode & MODE_TX) && txIO) {
IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device)); IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
IOConfigGPIOAF(txIO, IOCFG_AF_PP, hardware->af); IOConfigGPIOAF(txIO, IOCFG_AF_PP, hardware->afs[txPinIndex]);
} }
if ((mode & MODE_RX) && rxIO) { if ((mode & MODE_RX) && rxIO) {
IOInit(rxIO, OWNER_SERIAL_RX, RESOURCE_INDEX(device)); IOInit(rxIO, OWNER_SERIAL_RX, RESOURCE_INDEX(device));
IOConfigGPIOAF(rxIO, IOCFG_AF_PP, hardware->af); IOConfigGPIOAF(rxIO, IOCFG_AF_PP, hardware->afs[rxPinIndex]);
} }
} }