mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-14 20:10:18 +03:00
RTC6705 resource cleanup.
This commit is contained in:
parent
9886391934
commit
8e5c1dd7a3
11 changed files with 215 additions and 39 deletions
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@ -4525,6 +4525,12 @@ const cliResourceValue_t resourceTable[] = {
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#ifdef USE_USB_DETECT
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DEFS( OWNER_USB_DETECT, PG_USB_CONFIG, usbDev_t, detectPin ),
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#endif
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#ifdef USE_VTX_RTC6705
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DEFS( OWNER_VTX_POWER, PG_VTX_IO_CONFIG, vtxIOConfig_t, powerTag ),
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DEFS( OWNER_VTX_CS, PG_VTX_IO_CONFIG, vtxIOConfig_t, csTag ),
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DEFS( OWNER_VTX_DATA, PG_VTX_IO_CONFIG, vtxIOConfig_t, dataTag ),
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DEFS( OWNER_VTX_CLK, PG_VTX_IO_CONFIG, vtxIOConfig_t, clockTag ),
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#endif
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};
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#undef DEFS
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@ -84,6 +84,7 @@
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#include "pg/rx_spi_cc2500.h"
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#include "pg/sdcard.h"
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#include "pg/vcd.h"
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#include "pg/vtx_io.h"
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#include "pg/usb.h"
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#include "pg/sdio.h"
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#include "pg/rcdevice.h"
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@ -1292,6 +1293,11 @@ const clivalue_t valueTable[] = {
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{ "vtx_halfduplex", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_OFF_ON }, PG_VTX_CONFIG, offsetof(vtxConfig_t, halfDuplex) },
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#endif
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// PG_VTX_IO
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#ifdef USE_VTX_RTC6705
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{ "vtx_spi_bus", VAR_UINT8 | HARDWARE_VALUE | MASTER_VALUE, .config.minmaxUnsigned = { 0, SPIDEV_COUNT }, PG_VTX_IO_CONFIG, offsetof(vtxIOConfig_t, spiDevice) },
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#endif
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// PG_VCD_CONFIG
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#ifdef USE_MAX7456
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{ "vcd_video_system", VAR_UINT8 | MASTER_VALUE | MODE_LOOKUP, .config.lookup = { TABLE_VIDEO_SYSTEM }, PG_VCD_CONFIG, offsetof(vcdProfile_t, video_system) },
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@ -66,7 +66,10 @@ const char * const ownerNames[OWNER_TOTAL_COUNT] = {
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"INVERTER",
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"LED_STRIP",
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"TRANSPONDER",
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"VTX",
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"VTX_POWER",
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"VTX_CS",
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"VTX_DATA",
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"VTX_CLK",
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"COMPASS_CS",
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"RX_BIND_PLUG",
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"ESCSERIAL",
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@ -64,7 +64,10 @@ typedef enum {
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OWNER_INVERTER,
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OWNER_LED_STRIP,
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OWNER_TRANSPONDER,
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OWNER_VTX,
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OWNER_VTX_POWER,
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OWNER_VTX_CS,
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OWNER_VTX_DATA,
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OWNER_VTX_CLK,
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OWNER_COMPASS_CS,
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OWNER_RX_BIND_PLUG,
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OWNER_ESCSERIAL,
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@ -39,7 +39,6 @@
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#include "drivers/time.h"
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#include "drivers/vtx_rtc6705.h"
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#define RTC6705_SET_HEAD 0x3210 //fosc=8mhz r=400
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#define RTC6705_SET_R 400 //Reference clock
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#define RTC6705_SET_FDIV 1024 //128*(fosc/1000000)
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@ -50,16 +49,18 @@
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#ifdef RTC6705_POWER_PIN
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static IO_t vtxPowerPin = IO_NONE;
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#endif
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static IO_t vtxCSPin = IO_NONE;
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#define DISABLE_RTC6705() IOHi(vtxCSPin)
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static busDevice_t busInstance;
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static busDevice_t *busdev;
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#define DISABLE_RTC6705() IOHi(busdev->busdev_u.spi.csnPin)
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#ifdef USE_RTC6705_CLK_HACK
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static IO_t vtxCLKPin = IO_NONE;
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// HACK for missing pull up on CLK line - drive the CLK high *before* enabling the CS pin.
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#define ENABLE_RTC6705() {IOHi(vtxCLKPin); delayMicroseconds(5); IOLo(vtxCSPin); }
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#define ENABLE_RTC6705() {IOHi(vtxCLKPin); delayMicroseconds(5); IOLo(busdev->busdev_u.spi.csnPin); }
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#else
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#define ENABLE_RTC6705() IOLo(vtxCSPin)
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#define ENABLE_RTC6705() IOLo(busdev->busdev_u.spi.csnPin)
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#endif
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#define DP_5G_MASK 0x7000 // b111000000000000
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@ -77,7 +78,6 @@ static IO_t vtxCLKPin = IO_NONE;
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#define ENABLE_VTX_POWER() IOLo(vtxPowerPin)
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#define DISABLE_VTX_POWER() IOHi(vtxPowerPin)
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/**
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* Reverse a uint32_t (LSB to MSB)
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* This is easier for when generating the frequency to then
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@ -97,28 +97,51 @@ static uint32_t reverse32(uint32_t in)
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/**
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* Start chip if available
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*/
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void rtc6705IOInit(void)
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bool rtc6705IOInit(const vtxIOConfig_t *vtxIOConfig)
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{
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busdev = &busInstance;
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busdev->busdev_u.spi.csnPin = IOGetByTag(vtxIOConfig->csTag);
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bool rtc6705HaveRequiredResources =
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(busdev->busdev_u.spi.csnPin != IO_NONE);
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#ifdef RTC6705_POWER_PIN
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vtxPowerPin = IOGetByTag(IO_TAG(RTC6705_POWER_PIN));
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IOInit(vtxPowerPin, OWNER_VTX, 0);
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vtxPowerPin = IOGetByTag(vtxIOConfig->powerTag);
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rtc6705HaveRequiredResources = rtc6705HaveRequiredResources && vtxPowerPin;
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#endif
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#ifdef USE_RTC6705_CLK_HACK
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vtxCLKPin = IOGetByTag(vtxIOConfig->clockTag);
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// we assume the CLK pin will have been initialised by the SPI code.
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rtc6705HaveRequiredResources = rtc6705HaveRequiredResources && vtxCLKPin;
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#endif
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if (!rtc6705HaveRequiredResources) {
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return false;
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}
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#ifdef RTC6705_POWER_PIN
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IOInit(vtxPowerPin, OWNER_VTX_POWER, 0);
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DISABLE_VTX_POWER();
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IOConfigGPIO(vtxPowerPin, IOCFG_OUT_PP);
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#endif
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#ifdef USE_RTC6705_CLK_HACK
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vtxCLKPin = IOGetByTag(IO_TAG(RTC6705_CLK_PIN));
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// we assume the CLK pin will have been initialised by the SPI code.
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#endif
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vtxCSPin = IOGetByTag(IO_TAG(RTC6705_CS_PIN));
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IOInit(vtxCSPin, OWNER_VTX, 0);
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IOInit(busdev->busdev_u.spi.csnPin, OWNER_VTX_CS, 0);
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DISABLE_RTC6705();
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// GPIO bit is enabled so here so the output is not pulled low when the GPIO is set in output mode.
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// Note: It's critical to ensure that incorrect signals are not sent to the VTX.
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IOConfigGPIO(vtxCSPin, IOCFG_OUT_PP);
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IOConfigGPIO(busdev->busdev_u.spi.csnPin, IOCFG_OUT_PP);
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busdev->bustype = BUSTYPE_SPI;
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spiBusSetInstance(busdev, spiInstanceByDevice(SPI_CFG_TO_DEV(vtxIOConfig->spiDevice)));
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return true;
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}
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/**
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@ -132,10 +155,10 @@ static void rtc6705Transfer(uint32_t command)
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ENABLE_RTC6705();
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spiTransferByte(RTC6705_SPI_INSTANCE, (command >> 24) & 0xFF);
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spiTransferByte(RTC6705_SPI_INSTANCE, (command >> 16) & 0xFF);
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spiTransferByte(RTC6705_SPI_INSTANCE, (command >> 8) & 0xFF);
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spiTransferByte(RTC6705_SPI_INSTANCE, (command >> 0) & 0xFF);
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spiTransferByte(busdev->busdev_u.spi.instance, (command >> 24) & 0xFF);
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spiTransferByte(busdev->busdev_u.spi.instance, (command >> 16) & 0xFF);
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spiTransferByte(busdev->busdev_u.spi.instance, (command >> 8) & 0xFF);
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spiTransferByte(busdev->busdev_u.spi.instance, (command >> 0) & 0xFF);
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delayMicroseconds(2);
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@ -159,7 +182,7 @@ void rtc6705SetFrequency(uint16_t frequency)
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val_hex |= (val_a << 5);
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val_hex |= (val_n << 12);
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spiSetDivisor(RTC6705_SPI_INSTANCE, SPI_CLOCK_SLOW);
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spiSetDivisor(busdev->busdev_u.spi.instance, SPI_CLOCK_SLOW);
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rtc6705Transfer(RTC6705_SET_HEAD);
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delayMicroseconds(10);
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@ -170,7 +193,7 @@ void rtc6705SetRFPower(uint8_t rf_power)
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{
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rf_power = constrain(rf_power, VTX_RTC6705_MIN_POWER, VTX_RTC6705_POWER_COUNT - 1);
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spiSetDivisor(RTC6705_SPI_INSTANCE, SPI_CLOCK_SLOW);
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spiSetDivisor(busdev->busdev_u.spi.instance, SPI_CLOCK_SLOW);
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uint32_t val_hex = RTC6705_RW_CONTROL_BIT; // write
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val_hex |= RTC6705_ADDRESS; // address
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@ -29,6 +29,8 @@
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#include <stdint.h>
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#include "pg/vtx_io.h"
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#define VTX_RTC6705_BAND_COUNT 5
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#define VTX_RTC6705_CHANNEL_COUNT 8
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#define VTX_RTC6705_POWER_COUNT 3
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@ -45,8 +47,10 @@
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#define VTX_RTC6705_BOOT_DELAY 350 // milliseconds
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void rtc6705IOInit(void);
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bool rtc6705IOInit(const vtxIOConfig_t *vtxIOConfig);
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void rtc6705SetFrequency(uint16_t freq);
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void rtc6705SetRFPower(uint8_t rf_power);
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void rtc6705Disable(void);
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void rtc6705Enable(void);
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@ -31,6 +31,7 @@
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#include "drivers/time.h"
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#include "drivers/vtx_rtc6705.h"
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#define DP_5G_MASK 0x7000
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#define PA5G_BS_MASK 0x0E00
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#define PA5G_PW_MASK 0x0180
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@ -60,31 +61,46 @@ static IO_t rtc6705DataPin = IO_NONE;
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static IO_t rtc6705CsnPin = IO_NONE;
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static IO_t rtc6705ClkPin = IO_NONE;
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void rtc6705IOInit(void)
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bool rtc6705IOInit(const vtxIOConfig_t *vtxIOConfig)
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{
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rtc6705DataPin = IOGetByTag(vtxIOConfig->dataTag);
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rtc6705CsnPin = IOGetByTag(vtxIOConfig->csTag);
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rtc6705ClkPin = IOGetByTag(vtxIOConfig->clockTag);
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bool rtc6705HaveRequiredResources = rtc6705DataPin && rtc6705CsnPin && rtc6705ClkPin;
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#ifdef RTC6705_POWER_PIN
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vtxPowerPin = IOGetByTag(IO_TAG(RTC6705_POWER_PIN));
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IOInit(vtxPowerPin, OWNER_VTX, 0);
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vtxPowerPin = IOGetByTag(vtxIOConfig->powerTag);
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rtc6705HaveRequiredResources &= (vtxPowerPin != IO_NONE);
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#endif
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if (!rtc6705HaveRequiredResources) {
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return false;
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}
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#ifdef RTC6705_POWER_PIN
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IOInit(vtxPowerPin, OWNER_VTX_POWER, 0);
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DISABLE_VTX_POWER();
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IOConfigGPIO(vtxPowerPin, IOCFG_OUT_PP);
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#endif
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rtc6705DataPin = IOGetByTag(IO_TAG(RTC6705_SPI_MOSI_PIN));
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rtc6705CsnPin = IOGetByTag(IO_TAG(RTC6705_CS_PIN));
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rtc6705ClkPin = IOGetByTag(IO_TAG(RTC6705_SPICLK_PIN));
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IOInit(rtc6705DataPin, OWNER_SPI_MOSI, RESOURCE_SOFT_OFFSET);
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IOInit(rtc6705DataPin, OWNER_VTX_DATA, RESOURCE_SOFT_OFFSET);
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IOConfigGPIO(rtc6705DataPin, IOCFG_OUT_PP);
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IOInit(rtc6705ClkPin, OWNER_SPI_SCK, RESOURCE_SOFT_OFFSET);
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IOInit(rtc6705ClkPin, OWNER_VTX_CLK, RESOURCE_SOFT_OFFSET);
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IOConfigGPIO(rtc6705ClkPin, IOCFG_OUT_PP);
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// Important: The order of GPIO configuration calls are critical to ensure that incorrect signals are not briefly sent to the VTX.
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// GPIO bit is enabled so here so the CS/LE pin output is not pulled low when the GPIO is set in output mode.
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DISABLE_RTC6705;
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IOInit(rtc6705CsnPin, OWNER_SPI_CS, RESOURCE_SOFT_OFFSET);
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IOInit(rtc6705CsnPin, OWNER_VTX_CS, RESOURCE_SOFT_OFFSET);
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IOConfigGPIO(rtc6705CsnPin, IOCFG_OUT_PP);
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return true;
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}
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static void rtc6705_write_register(uint8_t addr, uint32_t data)
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@ -113,6 +113,7 @@
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#include "pg/rx_pwm.h"
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#include "pg/sdcard.h"
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#include "pg/vcd.h"
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#include "pg/vtx_io.h"
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#include "rx/rx.h"
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#include "rx/rx_spi.h"
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@ -491,7 +492,7 @@ void init(void)
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#endif
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#ifdef USE_VTX_RTC6705
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rtc6705IOInit();
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bool useRTC6705 = rtc6705IOInit(vtxIOConfig());
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#endif
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#ifdef USE_CAMERA_CONTROL
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@ -734,10 +735,7 @@ void init(void)
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#endif
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#ifdef USE_VTX_RTC6705
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#ifdef VTX_RTC6705_OPTIONAL
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if (!vtxCommonDevice()) // external VTX takes precedence when configured.
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#endif
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{
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if (!vtxCommonDevice() && useRTC6705) { // external VTX takes precedence when configured.
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vtxRTC6705Init();
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}
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#endif
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@ -80,6 +80,7 @@
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//#define PG_VTX_CONFIG 54 // CF 1.x
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#define PG_GPS_RESCUE 55 // struct OK
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#define PG_POSITION 56
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#define PG_VTX_IO_CONFIG 57
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// Driver configuration
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#define PG_DRIVER_PWM_RX_CONFIG 100 // does not exist in betaflight
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74
src/main/pg/vtx_io.c
Normal file
74
src/main/pg/vtx_io.c
Normal file
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@ -0,0 +1,74 @@
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
|
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "platform.h"
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#ifdef USE_VTX_RTC6705
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#include "drivers/bus_spi.h"
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#include "drivers/io.h"
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#include "pg/pg.h"
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#include "pg/pg_ids.h"
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#include "vtx_io.h"
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PG_REGISTER_WITH_RESET_FN(vtxIOConfig_t, vtxIOConfig, PG_VTX_IO_CONFIG, 0);
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void pgResetFn_vtxIOConfig(vtxIOConfig_t *vtxIOConfig)
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{
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// common
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#ifdef RTC6705_CS_PIN
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vtxIOConfig->csTag = IO_TAG(RTC6705_CS_PIN);
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#else
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vtxIOConfig->csTag = IO_TAG_NONE;
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#endif
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#ifdef RTC6705_POWER_PIN
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vtxIOConfig->powerTag = IO_TAG(RTC6705_POWER_PIN);
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#else
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vtxIOConfig->powerTag = IO_TAG_NONE;
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#endif
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// software SPI
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#ifdef RTC6705_SPICLK_PIN
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vtxIOConfig->clockTag = IO_TAG(RTC6705_SPICLK_PIN);
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#else
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vtxIOConfig->clockTag = IO_TAG_NONE;
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#endif
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#ifdef RTC6705_SPI_MOSI_PIN
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vtxIOConfig->dataTag = IO_TAG(RTC6705_SPI_MOSI_PIN);
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#else
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vtxIOConfig->dataTag = IO_TAG_NONE;
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#endif
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// hardware spi
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#ifdef RTC6705_SPI_INSTANCE
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vtxIOConfig->spiDevice = SPI_DEV_TO_CFG(spiDeviceByInstance(RTC6705_SPI_INSTANCE));
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#endif
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}
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#endif
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42
src/main/pg/vtx_io.h
Normal file
42
src/main/pg/vtx_io.h
Normal file
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@ -0,0 +1,42 @@
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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||||
* Cleanflight and Betaflight are free software. You can redistribute
|
||||
* this software and/or modify this software under the terms of the
|
||||
* GNU General Public License as published by the Free Software
|
||||
* Foundation, either version 3 of the License, or (at your option)
|
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* any later version.
|
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*
|
||||
* Cleanflight and Betaflight are distributed in the hope that they
|
||||
* will be useful, but WITHOUT ANY WARRANTY; without even the implied
|
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
* See the GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
|
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <stdint.h>
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|
||||
#include "drivers/io_types.h"
|
||||
|
||||
#include "pg/pg.h"
|
||||
|
||||
typedef struct vtxIOConfig_s {
|
||||
// common settings for both hardware and software SPI
|
||||
ioTag_t csTag;
|
||||
ioTag_t powerTag;
|
||||
|
||||
// settings for software SPI only
|
||||
ioTag_t dataTag;
|
||||
ioTag_t clockTag;
|
||||
|
||||
// settings for hardware SPI only
|
||||
uint8_t spiDevice;
|
||||
} vtxIOConfig_t;
|
||||
|
||||
PG_DECLARE(vtxIOConfig_t, vtxIOConfig);
|
Loading…
Add table
Add a link
Reference in a new issue