From 97487905ee33997187e1b88740c1e1b9c309fd57 Mon Sep 17 00:00:00 2001
From: Steve Evans <SteveCEvans@users.noreply.github.com>
Date: Tue, 28 Feb 2023 01:25:03 +0000
Subject: [PATCH] Add AT32F435 I2C support (#12423)

---
 .../i2c_application_library/i2c_application.c | 460 ++++++++++--------
 src/config/REVO_AT/config.h                   |  10 +
 src/main/drivers/at32/bus_i2c_atbsp_init.c    |  16 +-
 src/main/drivers/at32/platform_mcu.h          |   4 +
 src/main/drivers/bus_i2c_config.c             |   4 +-
 src/main/drivers/bus_i2c_impl.h               |   8 +-
 src/main/target/AT32F435/target.h             |  11 +-
 src/main/target/AT32F435/target.mk            |  10 +-
 8 files changed, 307 insertions(+), 216 deletions(-)

diff --git a/lib/main/AT32F43x/middlewares/i2c_application_library/i2c_application.c b/lib/main/AT32F43x/middlewares/i2c_application_library/i2c_application.c
index 08f8d8f0cb..96ce3f5bf7 100644
--- a/lib/main/AT32F43x/middlewares/i2c_application_library/i2c_application.c
+++ b/lib/main/AT32F43x/middlewares/i2c_application_library/i2c_application.c
@@ -104,7 +104,7 @@
   */
 __WEAK void i2c_lowlevel_init(i2c_handle_type* hi2c)
 {
-
+    UNUSED(hi2c);
 }
 
 /**
@@ -171,16 +171,11 @@ i2c_status_type i2c_wait_end(i2c_handle_type* hi2c, uint32_t timeout)
     /* check timeout */
     if((timeout--) == 0)
     {
-      return I2C_ERR_TIMEOUT;
+      hi2c->error_code = I2C_ERR_TIMEOUT;
     }
   }
 
-  if(hi2c->error_code != I2C_OK)
-  {
-    return hi2c->error_code;
-  }
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -215,6 +210,8 @@ i2c_status_type i2c_wait_end(i2c_handle_type* hi2c, uint32_t timeout)
   */
 i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, uint32_t event_check, uint32_t timeout)
 {
+    hi2c->error_code = I2C_OK;
+
   if(flag == I2C_BUSYF_FLAG)
   {
     while(i2c_flag_get(hi2c->i2cx, flag) != RESET)
@@ -223,8 +220,7 @@ i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, uint32_t eve
       if((timeout--) == 0)
       {
         hi2c->error_code = I2C_ERR_TIMEOUT;
-
-        return I2C_ERR_TIMEOUT;
+        return hi2c->error_code;
       }
     }
   }
@@ -232,6 +228,9 @@ i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, uint32_t eve
   {
     while(i2c_flag_get(hi2c->i2cx, flag) == RESET)
     {
+#if 1
+        UNUSED(event_check);
+#else
       /* check the ack fail flag */
       if(event_check & I2C_EVENT_CHECK_ACKFAIL)
       {
@@ -241,8 +240,7 @@ i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, uint32_t eve
           i2c_flag_clear(hi2c->i2cx, I2C_ACKFAIL_FLAG);
 
           hi2c->error_code = I2C_ERR_ACKFAIL;
-
-          return I2C_ERR_ACKFAIL;
+          return hi2c->error_code;
         }
       }
 
@@ -257,22 +255,21 @@ i2c_status_type i2c_wait_flag(i2c_handle_type* hi2c, uint32_t flag, uint32_t eve
           i2c_reset_ctrl2_register(hi2c);
 
           hi2c->error_code = I2C_ERR_STOP;
-
-          return I2C_ERR_STOP;
+          return hi2c->error_code;
         }
       }
+#endif
 
       /* check timeout */
       if((timeout--) == 0)
       {
         hi2c->error_code = I2C_ERR_TIMEOUT;
-
-        return I2C_ERR_TIMEOUT;
+        return hi2c->error_code;
       }
     }
   }
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -385,7 +382,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* start transfer */
@@ -396,7 +394,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
     /* wait for the tdis flag to be set */
     if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
     {
-      return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
     }
 
     /* send data */
@@ -409,7 +408,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
       /* wait for the tcrld flag to be set  */
       if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
       {
-        return I2C_ERR_STEP_3;
+        hi2c->error_code = I2C_ERR_STEP_3;
+        return hi2c->error_code;
       }
 
       /* continue transfer */
@@ -420,7 +420,8 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
   /* wait for the stop flag to be set  */
   if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+    hi2c->error_code = I2C_ERR_STEP_4;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -429,7 +430,7 @@ i2c_status_type i2c_master_transmit(i2c_handle_type* hi2c, uint16_t address, uin
   /* reset ctrl2 register */
   i2c_reset_ctrl2_register(hi2c);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -451,7 +452,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* enable acknowledge */
@@ -460,7 +462,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
   /* wait for the addr flag to be set */
   if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_2;
+    hi2c->error_code = I2C_ERR_STEP_2;
+    return hi2c->error_code;
   }
 
   /* clear addr flag */
@@ -482,7 +485,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
         hi2c->pcount--;
       }
 
-      return I2C_ERR_STEP_4;
+      hi2c->error_code = I2C_ERR_STEP_4;
+      return hi2c->error_code;
     }
 
     /* read data */
@@ -496,7 +500,8 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_5;
+    hi2c->error_code = I2C_ERR_STEP_5;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -508,10 +513,11 @@ i2c_status_type i2c_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, uint16_
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_6;
+    hi2c->error_code = I2C_ERR_STEP_6;
+    return hi2c->error_code;
   }
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -534,7 +540,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* start transfer */
@@ -545,7 +552,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
     /* wait for the rdbf flag to be set  */
     if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
     {
-      return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
     }
 
     /* read data */
@@ -558,7 +566,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
       /* wait for the tcrld flag to be set  */
       if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
       {
-        return I2C_ERR_STEP_3;
+        hi2c->error_code = I2C_ERR_STEP_3;
+        return hi2c->error_code;
       }
 
       /* continue transfer */
@@ -569,7 +578,8 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
   /* wait for the stop flag to be set  */
   if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+    hi2c->error_code = I2C_ERR_STEP_4;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -578,7 +588,7 @@ i2c_status_type i2c_master_receive(i2c_handle_type* hi2c, uint16_t address, uint
   /* reset ctrl2 register */
   i2c_reset_ctrl2_register(hi2c);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -600,7 +610,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* enable acknowledge */
@@ -611,7 +622,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
   {
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
-    return I2C_ERR_STEP_2;
+    hi2c->error_code = I2C_ERR_STEP_2;
+    return hi2c->error_code;
   }
 
   /* clear addr flag */
@@ -626,7 +638,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
       /* disable acknowledge */
       i2c_ack_enable(hi2c->i2cx, FALSE);
 
-      return I2C_ERR_STEP_3;
+      hi2c->error_code = I2C_ERR_STEP_3;
+      return hi2c->error_code;
     }
 
     /* clear addr flag */
@@ -641,7 +654,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
       /* disable acknowledge */
       i2c_ack_enable(hi2c->i2cx, FALSE);
 
-      return I2C_ERR_STEP_5;
+      hi2c->error_code = I2C_ERR_STEP_5;
+      return hi2c->error_code;
     }
 
     /* send data */
@@ -652,7 +666,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
   /* wait for the ackfail flag to be set */
   if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_6;
+    hi2c->error_code = I2C_ERR_STEP_6;
+    return hi2c->error_code;
   }
 
   /* clear ack fail flag */
@@ -664,7 +679,8 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_7;
+    hi2c->error_code = I2C_ERR_STEP_7;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -676,13 +692,14 @@ i2c_status_type i2c_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata, uint16
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_8;
+    hi2c->error_code = I2C_ERR_STEP_8;
+    return hi2c->error_code;
   }
 
   /* refresh tx dt register */
   i2c_refresh_txdt_register(hi2c);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -708,7 +725,8 @@ i2c_status_type i2c_master_transmit_int(i2c_handle_type* hi2c, uint16_t address,
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* start transfer */
@@ -717,7 +735,7 @@ i2c_status_type i2c_master_transmit_int(i2c_handle_type* hi2c, uint16_t address,
   /* enable interrupt */
   i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_TD_INT, TRUE);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -742,16 +760,16 @@ i2c_status_type i2c_slave_receive_int(i2c_handle_type* hi2c, uint8_t* pdata, uin
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+  } else {
+      /* enable acknowledge */
+      i2c_ack_enable(hi2c->i2cx, TRUE);
+
+      /* enable interrupt */
+      i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ADDR_INT | I2C_RD_INT, TRUE);
   }
 
-  /* enable acknowledge */
-  i2c_ack_enable(hi2c->i2cx, TRUE);
-
-  /* enable interrupt */
-  i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ADDR_INT | I2C_RD_INT, TRUE);
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -777,16 +795,16 @@ i2c_status_type i2c_master_receive_int(i2c_handle_type* hi2c, uint16_t address,
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+  } else {
+      /* start transfer */
+      i2c_start_transfer(hi2c, address, I2C_GEN_START_READ);
+
+      /* enable interrupt */
+      i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_RD_INT, TRUE);
   }
 
-  /* start transfer */
-  i2c_start_transfer(hi2c, address, I2C_GEN_START_READ);
-
-  /* enable interrupt */
-  i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_RD_INT, TRUE);
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -811,18 +829,18 @@ i2c_status_type i2c_slave_transmit_int(i2c_handle_type* hi2c, uint8_t* pdata, ui
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+  } else {
+      /* enable acknowledge */
+      i2c_ack_enable(hi2c->i2cx, TRUE);
+
+      /* enable interrupt */
+      i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ADDR_INT | I2C_TD_INT, TRUE);
+
+      i2c_refresh_txdt_register(hi2c);
   }
 
-  /* enable acknowledge */
-  i2c_ack_enable(hi2c->i2cx, TRUE);
-
-  /* enable interrupt */
-  i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ADDR_INT | I2C_TD_INT, TRUE);
-
-  i2c_refresh_txdt_register(hi2c);
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -848,22 +866,22 @@ i2c_status_type i2c_master_transmit_dma(i2c_handle_type* hi2c, uint16_t address,
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+  } else {
+      /* disable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, FALSE);
+
+      /* start transfer */
+      i2c_start_transfer_dma(hi2c, hi2c->dma_tx_channel, address, I2C_GEN_START_WRITE);
+
+      /* enable i2c interrupt */
+      i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_ACKFIAL_INT, TRUE);
+
+      /* enable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, TRUE);
   }
 
-  /* disable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, FALSE);
-
-  /* start transfer */
-  i2c_start_transfer_dma(hi2c, hi2c->dma_tx_channel, address, I2C_GEN_START_WRITE);
-
-  /* enable i2c interrupt */
-  i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_ACKFIAL_INT, TRUE);
-
-  /* enable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, TRUE);
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -888,25 +906,25 @@ i2c_status_type i2c_slave_receive_dma(i2c_handle_type* hi2c, uint8_t* pdata, uin
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+  } else {
+      /* disable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, FALSE);
+
+      /* config dma */
+      i2c_dma_config(hi2c, hi2c->dma_rx_channel, hi2c->pbuff, size);
+
+      /* enable acknowledge */
+      i2c_ack_enable(hi2c->i2cx, TRUE);
+
+      /* enable i2c interrupt */
+      i2c_interrupt_enable(hi2c->i2cx, I2C_ADDR_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ERR_INT, TRUE);
+
+      /* enable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, TRUE);
   }
 
-  /* disable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, FALSE);
-
-  /* config dma */
-  i2c_dma_config(hi2c, hi2c->dma_rx_channel, hi2c->pbuff, size);
-
-  /* enable acknowledge */
-  i2c_ack_enable(hi2c->i2cx, TRUE);
-
-  /* enable i2c interrupt */
-  i2c_interrupt_enable(hi2c->i2cx, I2C_ADDR_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ERR_INT, TRUE);
-
-  /* enable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, TRUE);
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -932,22 +950,22 @@ i2c_status_type i2c_master_receive_dma(i2c_handle_type* hi2c, uint16_t address,
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+  } else {
+      /* disable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, FALSE);
+
+      /* start transfer */
+      i2c_start_transfer_dma(hi2c, hi2c->dma_rx_channel, address, I2C_GEN_START_READ);
+
+      /* enable i2c interrupt */
+      i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_ACKFIAL_INT, TRUE);
+
+      /* enable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, TRUE);
   }
 
-  /* disable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, FALSE);
-
-  /* start transfer */
-  i2c_start_transfer_dma(hi2c, hi2c->dma_rx_channel, address, I2C_GEN_START_READ);
-
-  /* enable i2c interrupt */
-  i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_ACKFIAL_INT, TRUE);
-
-  /* enable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, TRUE);
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -972,25 +990,25 @@ i2c_status_type i2c_slave_transmit_dma(i2c_handle_type* hi2c, uint8_t* pdata, ui
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+  } else {
+      /* disable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, FALSE);
+
+      /* config dma */
+      i2c_dma_config(hi2c, hi2c->dma_tx_channel, hi2c->pbuff, size);
+
+      /* enable acknowledge */
+      i2c_ack_enable(hi2c->i2cx, TRUE);
+
+      /* enable i2c interrupt */
+      i2c_interrupt_enable(hi2c->i2cx, I2C_ADDR_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ERR_INT, TRUE);
+
+      /* enable dma request */
+      i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, TRUE);
   }
 
-  /* disable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, FALSE);
-
-  /* config dma */
-  i2c_dma_config(hi2c, hi2c->dma_tx_channel, hi2c->pbuff, size);
-
-  /* enable acknowledge */
-  i2c_ack_enable(hi2c->i2cx, TRUE);
-
-  /* enable i2c interrupt */
-  i2c_interrupt_enable(hi2c->i2cx, I2C_ADDR_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_ERR_INT, TRUE);
-
-  /* enable dma request */
-  i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, TRUE);
-
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1031,7 +1049,7 @@ i2c_status_type i2c_memory_address_send(i2c_handle_type* hi2c, i2c_mem_address_w
     i2c_data_send(hi2c->i2cx, mem_address & 0xFF);  
   }
   
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1059,7 +1077,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, i2c_mem_address_width_ty
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* start transfer */
@@ -1068,13 +1087,15 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, i2c_mem_address_width_ty
   /* wait for the tdis flag to be set */
   if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_2;
+    hi2c->error_code = I2C_ERR_STEP_2;
+    return hi2c->error_code;
   }
 
   /* send memory address */
   if(i2c_memory_address_send(hi2c, mem_address_width, mem_address, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_3;
+    hi2c->error_code = I2C_ERR_STEP_3;
+    return hi2c->error_code;
   }
 
   hi2c->psize -= mem_address_width;
@@ -1085,7 +1106,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, i2c_mem_address_width_ty
     /* wait for the tdis flag to be set */
     if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
     {
-      return I2C_ERR_STEP_4;
+      hi2c->error_code = I2C_ERR_STEP_4;
+      return hi2c->error_code;
     }
 
     /* send data */
@@ -1098,7 +1120,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, i2c_mem_address_width_ty
       /* wait for the tcrld flag to be set  */
       if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
       {
-        return I2C_ERR_STEP_5;
+        hi2c->error_code = I2C_ERR_STEP_5;
+        return hi2c->error_code;
       }
 
       /* continue transfer */
@@ -1109,7 +1132,8 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, i2c_mem_address_width_ty
   /* wait for the stop flag to be set  */
   if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_6;
+    hi2c->error_code = I2C_ERR_STEP_6;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -1118,7 +1142,7 @@ i2c_status_type i2c_memory_write(i2c_handle_type* hi2c, i2c_mem_address_width_ty
   /* reset ctrl2 register */
   i2c_reset_ctrl2_register(hi2c);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1146,7 +1170,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, i2c_mem_address_width_typ
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* start transfer */
@@ -1155,19 +1180,22 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, i2c_mem_address_width_typ
   /* wait for the tdis flag to be set */
   if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_2;
+    hi2c->error_code = I2C_ERR_STEP_2;
+    return hi2c->error_code;
   }
 
   /* send memory address */
   if(i2c_memory_address_send(hi2c, mem_address_width, mem_address, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_3;
+    hi2c->error_code = I2C_ERR_STEP_3;
+    return hi2c->error_code;
   }
 
   /* wait for the tdc flag to be set */
   if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+    hi2c->error_code = I2C_ERR_STEP_4;
+    return hi2c->error_code;
   }
 
   /* start transfer */
@@ -1178,7 +1206,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, i2c_mem_address_width_typ
     /* wait for the rdbf flag to be set  */
     if (i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
     {
-      return I2C_ERR_STEP_5;
+      hi2c->error_code = I2C_ERR_STEP_5;
     }
 
     /* read data */
@@ -1191,7 +1219,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, i2c_mem_address_width_typ
       /* wait for the tcrld flag to be set  */
       if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
       {
-        return I2C_ERR_STEP_6;
+        hi2c->error_code = I2C_ERR_STEP_6;
+        return hi2c->error_code;
       }
 
       /* continue transfer */
@@ -1202,7 +1231,8 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, i2c_mem_address_width_typ
   /* wait for the stop flag to be set  */
   if (i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_7;
+    hi2c->error_code = I2C_ERR_STEP_7;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -1211,7 +1241,7 @@ i2c_status_type i2c_memory_read(i2c_handle_type* hi2c, i2c_mem_address_width_typ
   /* reset ctrl2 register */
   i2c_reset_ctrl2_register(hi2c);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1242,7 +1272,8 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, i2c_mem_address_widt
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+      return hi2c->error_code;
   }
 
   /* start transfer */
@@ -1251,13 +1282,15 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, i2c_mem_address_widt
   /* wait for the tdis flag to be set */
   if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
   }
 
   /* send memory address */
   if(i2c_memory_address_send(hi2c, mem_address_width, mem_address, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_3;
+      hi2c->error_code = I2C_ERR_STEP_3;
+      return hi2c->error_code;
   }
   
   hi2c->psize--;
@@ -1266,7 +1299,7 @@ i2c_status_type i2c_memory_write_int(i2c_handle_type* hi2c, i2c_mem_address_widt
   /* enable interrupt */
   i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_TD_INT, TRUE);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1297,7 +1330,8 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, i2c_mem_address_width
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+      return hi2c->error_code;
   }
 
   /* start transfer */
@@ -1306,19 +1340,22 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, i2c_mem_address_width
   /* wait for the tdis flag to be set */
   if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
   }
 
   /* send memory address */
   if(i2c_memory_address_send(hi2c, mem_address_width, mem_address, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_3;
+      hi2c->error_code = I2C_ERR_STEP_3;
+      return hi2c->error_code;
   }
 
   /* wait for the tdc flag to be set */
   if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+      hi2c->error_code = I2C_ERR_STEP_4;
+      return hi2c->error_code;
   }
 
   /* start transfer */
@@ -1327,7 +1364,7 @@ i2c_status_type i2c_memory_read_int(i2c_handle_type* hi2c, i2c_mem_address_width
   /* enable i2c interrupt */
   i2c_interrupt_enable(hi2c->i2cx, I2C_ERR_INT | I2C_TDC_INT | I2C_STOP_INT | I2C_ACKFIAL_INT | I2C_RD_INT, TRUE);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1361,7 +1398,8 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, i2c_mem_address_widt
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      return hi2c->error_code;
+      hi2c->error_code = I2C_ERR_STEP_1;
   }
 
   /* transfer config */
@@ -1370,19 +1408,22 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, i2c_mem_address_widt
   /* wait for the tdis flag to be set */
   if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_2;
+      return hi2c->error_code;
+      hi2c->error_code = I2C_ERR_STEP_2;
   }
 
   /* send memory address */
   if(i2c_memory_address_send(hi2c, mem_address_width, mem_address, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_3;
+      return hi2c->error_code;
+      hi2c->error_code = I2C_ERR_STEP_3;
   }
 
   /* wait for the tcrld flag to be set */
   if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+      return hi2c->error_code;
+      hi2c->error_code = I2C_ERR_STEP_4;
   }
 
   /* start transfer */
@@ -1394,7 +1435,7 @@ i2c_status_type i2c_memory_write_dma(i2c_handle_type* hi2c, i2c_mem_address_widt
   /* enable dma request */
   i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_TX, TRUE);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1425,7 +1466,8 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, i2c_mem_address_width
   /* wait for the busy flag to be reset */
   if(i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+      hi2c->error_code = I2C_ERR_STEP_1;
+      return hi2c->error_code;
   }
 
   /* start transfer */
@@ -1434,19 +1476,22 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, i2c_mem_address_width
   /* wait for the tdis flag to be set */
   if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
   }
 
   /* send memory address */
   if(i2c_memory_address_send(hi2c, mem_address_width, mem_address, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_3;
+      hi2c->error_code = I2C_ERR_STEP_3;
+      return hi2c->error_code;
   }
 
   /* wait for the tdc flag to be set */
   if (i2c_wait_flag(hi2c, I2C_TDC_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+      hi2c->error_code = I2C_ERR_STEP_4;
+      return hi2c->error_code;
   }
 
   /* disable dma request */
@@ -1461,7 +1506,7 @@ i2c_status_type i2c_memory_read_dma(i2c_handle_type* hi2c, i2c_mem_address_width
   /* enable dma request */
   i2c_dma_enable(hi2c->i2cx, I2C_DMA_REQUEST_RX, TRUE);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1484,7 +1529,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* enable pec calculation */
@@ -1503,7 +1549,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres
     /* wait for the tdis flag to be set */
     if(i2c_wait_flag(hi2c, I2C_TDIS_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
     {
-      return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
     }
 
     /* send data */
@@ -1516,7 +1563,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres
       /* wait for the tcrld flag to be set  */
       if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
       {
-        return I2C_ERR_STEP_3;
+        hi2c->error_code = I2C_ERR_STEP_3;
+        return hi2c->error_code;
       }
 
       /* continue transfer */
@@ -1527,7 +1575,8 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres
   /* wait for the stop flag to be set  */
   if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+    hi2c->error_code = I2C_ERR_STEP_4;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -1536,7 +1585,7 @@ i2c_status_type i2c_smbus_master_transmit(i2c_handle_type* hi2c, uint16_t addres
   /* reset ctrl2 register */
   i2c_reset_ctrl2_register(hi2c);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1567,7 +1616,8 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u
   /* wait for the addr flag to be set */
   if (i2c_wait_flag(hi2c, I2C_ADDRF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* enable pec transmit request */
@@ -1595,7 +1645,8 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u
         hi2c->pcount--;
       }
 
-      return I2C_ERR_STEP_3;
+      hi2c->error_code = I2C_ERR_STEP_3;
+      return hi2c->error_code;
     }
 
     /* read data */
@@ -1609,7 +1660,8 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_4;
+    hi2c->error_code = I2C_ERR_STEP_4;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -1621,13 +1673,14 @@ i2c_status_type i2c_smbus_slave_receive(i2c_handle_type* hi2c, uint8_t* pdata, u
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_5;
+    hi2c->error_code = I2C_ERR_STEP_5;
+    return hi2c->error_code;
   }
 
   /* disable slave data control mode */
   i2c_slave_data_ctrl_enable(hi2c->i2cx, FALSE);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1650,7 +1703,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address
   /* wait for the busy flag to be reset */
   if (i2c_wait_flag(hi2c, I2C_BUSYF_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* enable pec calculation */
@@ -1667,7 +1721,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address
     /* wait for the rdbf flag to be set  */
     if(i2c_wait_flag(hi2c, I2C_RDBF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
     {
-      return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
     }
 
     /* read data */
@@ -1680,7 +1735,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address
       /* wait for the tcrld flag to be set  */
       if (i2c_wait_flag(hi2c, I2C_TCRLD_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
       {
-        return I2C_ERR_STEP_3;
+        hi2c->error_code = I2C_ERR_STEP_3;
+        return hi2c->error_code;
       }
 
       /* continue transfer */
@@ -1691,7 +1747,8 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address
   /* wait for the stop flag to be set  */
   if(i2c_wait_flag(hi2c, I2C_STOPF_FLAG, I2C_EVENT_CHECK_ACKFAIL, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_4;
+    hi2c->error_code = I2C_ERR_STEP_4;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -1700,7 +1757,7 @@ i2c_status_type i2c_smbus_master_receive(i2c_handle_type* hi2c, uint16_t address
   /* reset ctrl2 register */
   i2c_reset_ctrl2_register(hi2c);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1733,7 +1790,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata,
   {
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
-    return I2C_ERR_STEP_1;
+    hi2c->error_code = I2C_ERR_STEP_1;
+    return hi2c->error_code;
   }
 
   /* if 7-bit address mode is selected */
@@ -1758,7 +1816,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata,
       /* disable acknowledge */
       i2c_ack_enable(hi2c->i2cx, FALSE);
 
-      return I2C_ERR_STEP_2;
+      hi2c->error_code = I2C_ERR_STEP_2;
+      return hi2c->error_code;
     }
 
     /* enable pec transmit request */
@@ -1781,7 +1840,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata,
       /* disable acknowledge */
       i2c_ack_enable(hi2c->i2cx, FALSE);
 
-      return I2C_ERR_STEP_4;
+      hi2c->error_code = I2C_ERR_STEP_4;
+      return hi2c->error_code;
     }
 
     /* send data */
@@ -1792,7 +1852,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata,
   /* wait for the ackfail flag to be set */
   if(i2c_wait_flag(hi2c, I2C_ACKFAIL_FLAG, I2C_EVENT_CHECK_NONE, timeout) != I2C_OK)
   {
-    return I2C_ERR_STEP_5;
+    hi2c->error_code = I2C_ERR_STEP_5;
+    return hi2c->error_code;
   }
 
   /* clear ack fail flag */
@@ -1804,7 +1865,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata,
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_6;
+    hi2c->error_code = I2C_ERR_STEP_6;
+    return hi2c->error_code;
   }
 
   /* clear stop flag */
@@ -1816,7 +1878,8 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata,
     /* disable acknowledge */
     i2c_ack_enable(hi2c->i2cx, FALSE);
 
-    return I2C_ERR_STEP_7;
+    hi2c->error_code = I2C_ERR_STEP_7;
+    return hi2c->error_code;
   }
 
   /* reset ctrl2 register */
@@ -1828,7 +1891,7 @@ i2c_status_type i2c_smbus_slave_transmit(i2c_handle_type* hi2c, uint8_t* pdata,
   /* disable slave data control mode */
   i2c_slave_data_ctrl_enable(hi2c->i2cx, FALSE);
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1849,6 +1912,7 @@ i2c_status_type i2c_master_irq_handler_int(i2c_handle_type* hi2c)
     if(hi2c->pcount != 0)
     {
       hi2c->error_code = I2C_ERR_ACKFAIL;
+      return hi2c->error_code;
     }
   }
   else if (i2c_flag_get(hi2c->i2cx, I2C_TDIS_FLAG) != RESET)
@@ -1867,7 +1931,8 @@ i2c_status_type i2c_master_irq_handler_int(i2c_handle_type* hi2c)
     }
     else
     {
-      return I2C_ERR_TCRLD;
+        hi2c->error_code =  I2C_ERR_TCRLD;
+        return hi2c->error_code;
     }
   }
   else if (i2c_flag_get(hi2c->i2cx, I2C_RDBF_FLAG) != RESET)
@@ -1889,7 +1954,8 @@ i2c_status_type i2c_master_irq_handler_int(i2c_handle_type* hi2c)
     }
     else
     {
-      return I2C_ERR_TDC;
+        hi2c->error_code =  I2C_ERR_TDC;
+        return hi2c->error_code;
     }
   }
   else if (i2c_flag_get(hi2c->i2cx, I2C_STOPF_FLAG) != RESET)
@@ -1914,9 +1980,11 @@ i2c_status_type i2c_master_irq_handler_int(i2c_handle_type* hi2c)
 
     /* transfer complete */
     hi2c->status = I2C_END;
+    hi2c->error_code =  I2C_OK;
+    return hi2c->error_code;
   }
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -1999,7 +2067,7 @@ i2c_status_type i2c_slave_irq_handler_int(i2c_handle_type* hi2c)
     hi2c->status = I2C_END;
   }
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -2023,6 +2091,7 @@ i2c_status_type i2c_master_irq_handler_dma(i2c_handle_type* hi2c)
     if(hi2c->pcount != 0)
     {
       hi2c->error_code = I2C_ERR_ACKFAIL;
+      return hi2c->error_code;
     }
   }
   else if (i2c_flag_get(hi2c->i2cx, I2C_TCRLD_FLAG) != RESET)
@@ -2047,7 +2116,8 @@ i2c_status_type i2c_master_irq_handler_dma(i2c_handle_type* hi2c)
     }
     else
     {
-      return I2C_ERR_TCRLD;
+      hi2c->error_code = I2C_ERR_TCRLD;
+      return hi2c->error_code;
     }
   }
   else if (i2c_flag_get(hi2c->i2cx, I2C_STOPF_FLAG) != RESET)
@@ -2074,7 +2144,7 @@ i2c_status_type i2c_master_irq_handler_dma(i2c_handle_type* hi2c)
     hi2c->status = I2C_END;
   }
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
@@ -2125,7 +2195,7 @@ i2c_status_type i2c_slave_irq_handler_dma(i2c_handle_type* hi2c)
     hi2c->status = I2C_END;
   }
 
-  return I2C_OK;
+  return hi2c->error_code;
 }
 
 /**
diff --git a/src/config/REVO_AT/config.h b/src/config/REVO_AT/config.h
index a35e864f0b..53ee255e4a 100644
--- a/src/config/REVO_AT/config.h
+++ b/src/config/REVO_AT/config.h
@@ -48,3 +48,13 @@
 #define  SPI3_MOSI_PIN          PC12
 
 #define USE_FLASH_M25P16
+
+#define I2C1_SCL_PIN         PB8
+#define I2C1_SDA_PIN         PB9
+
+#define I2C2_SCL_PIN         PB10
+#define I2C2_SDA_PIN         PB11
+
+#define BARO_I2C_INSTANCE I2C2
+#define USE_BARO
+#define USE_BARO_MS5611
diff --git a/src/main/drivers/at32/bus_i2c_atbsp_init.c b/src/main/drivers/at32/bus_i2c_atbsp_init.c
index 980d0ba2eb..db9faf8817 100644
--- a/src/main/drivers/at32/bus_i2c_atbsp_init.c
+++ b/src/main/drivers/at32/bus_i2c_atbsp_init.c
@@ -36,6 +36,8 @@
 #include "drivers/bus_i2c_impl.h"
 #include "drivers/bus_i2c_timing.h"
 
+#include "pg/pinio.h"
+
 // Number of bits in I2C protocol phase
 #define LEN_ADDR 7
 #define LEN_RW 1
@@ -140,29 +142,29 @@ void i2cInit(I2CDevice device)
 
 
     // Init I2C peripheral
-
     i2c_handle_type  *pHandle = &pDev->handle;
-
     memset(pHandle, 0, sizeof(*pHandle));
 
-    pHandle->i2cx = pDev->hardware->reg;
+    i2c_type *i2cx = (i2c_type *)pDev->hardware->reg;
+    pHandle->i2cx = i2cx;
 
     crm_clocks_freq_type crm_clk_freq;
     crm_clocks_freq_get(&crm_clk_freq);
+
     uint32_t i2cPclk = crm_clk_freq.apb1_freq;
 
     uint32_t I2Cx_CLKCTRL = i2cClockTIMINGR(i2cPclk, pDev->clockSpeed, 0);
 
-    i2c_reset( pHandle->i2cx);
+    i2c_config(pHandle);
 
-    i2c_init( pHandle->i2cx, 0x0f, I2Cx_CLKCTRL);
+    i2c_init(i2cx, 0x0f, I2Cx_CLKCTRL);
 
-    i2c_own_address1_set( pHandle->i2cx, I2C_ADDRESS_MODE_7BIT, 0x0);
+    i2c_own_address1_set(i2cx, I2C_ADDRESS_MODE_7BIT, 0x0);
 
     nvic_irq_enable(hardware->er_irq, NVIC_PRIORITY_BASE(NVIC_PRIO_I2C_ER), NVIC_PRIORITY_SUB(NVIC_PRIO_I2C_ER));
     nvic_irq_enable(hardware->ev_irq, NVIC_PRIORITY_BASE(NVIC_PRIO_I2C_EV), NVIC_PRIORITY_SUB(NVIC_PRIO_I2C_EV));
 
-    i2c_enable(pHandle->i2cx, TRUE);
+    i2c_enable(i2cx, TRUE);
 }
 
 static void i2cUnstick(IO_t scl, IO_t sda)
diff --git a/src/main/drivers/at32/platform_mcu.h b/src/main/drivers/at32/platform_mcu.h
index 63bd9cf7b3..708696b891 100644
--- a/src/main/drivers/at32/platform_mcu.h
+++ b/src/main/drivers/at32/platform_mcu.h
@@ -23,9 +23,13 @@
 #if defined(AT32F435ZMT7)
 
 #include "at32f435_437.h"
+#include "at32f435_437_i2c.h"
+#include "i2c_application.h"
 
 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
 
+#define I2C_TypeDef         i2c_type
+#define I2C_HandleTypeDef   i2c_handle_type
 #define GPIO_TypeDef        gpio_type
 #define GPIO_InitTypeDef    gpio_init_type
 #define TIM_TypeDef         tmr_type
diff --git a/src/main/drivers/bus_i2c_config.c b/src/main/drivers/bus_i2c_config.c
index 8cf3e92937..f4ab7b975d 100644
--- a/src/main/drivers/bus_i2c_config.c
+++ b/src/main/drivers/bus_i2c_config.c
@@ -56,13 +56,13 @@ void i2cHardwareConfigure(const i2cConfig_t *i2cConfig)
         for (int pindex = 0 ; pindex < I2C_PIN_SEL_MAX ; pindex++) {
             if (i2cConfig[device].ioTagScl == hardware->sclPins[pindex].ioTag) {
                 pDev->scl = IOGetByTag(i2cConfig[device].ioTagScl);
-#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4)
+#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4) || defined(AT32F4)
                 pDev->sclAF = hardware->sclPins[pindex].af;
 #endif
             }
             if (i2cConfig[device].ioTagSda == hardware->sdaPins[pindex].ioTag) {
                 pDev->sda = IOGetByTag(i2cConfig[device].ioTagSda);
-#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4)
+#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4) || defined(AT32F4)
                 pDev->sdaAF = hardware->sdaPins[pindex].af;
 #endif
             }
diff --git a/src/main/drivers/bus_i2c_impl.h b/src/main/drivers/bus_i2c_impl.h
index f7a4bb5c1e..b286bc18cf 100644
--- a/src/main/drivers/bus_i2c_impl.h
+++ b/src/main/drivers/bus_i2c_impl.h
@@ -32,12 +32,12 @@
 
 typedef struct i2cPinDef_s {
     ioTag_t ioTag;
-#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4)
+#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4) || defined(AT32F4)
     uint8_t af;
 #endif
 } i2cPinDef_t;
 
-#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4)
+#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4) || defined(AT32F4)
 #define I2CPINDEF(pin, af) { DEFIO_TAG_E(pin), af }
 #else
 #define I2CPINDEF(pin) { DEFIO_TAG_E(pin) }
@@ -74,7 +74,7 @@ typedef struct i2cDevice_s {
     I2C_TypeDef *reg;
     IO_t scl;
     IO_t sda;
-#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4)
+#if defined(STM32F4) || defined(STM32H7) || defined(STM32G4) || defined(AT32F4)
     uint8_t sclAF;
     uint8_t sdaAF;
 #endif
@@ -85,7 +85,7 @@ typedef struct i2cDevice_s {
 #if defined(STM32F4)
     i2cState_t state;
 #endif
-#ifdef USE_HAL_DRIVER
+#if defined(USE_HAL_DRIVER) || defined(AT32F4)
     I2C_HandleTypeDef handle;
 #endif
 } i2cDevice_t;
diff --git a/src/main/target/AT32F435/target.h b/src/main/target/AT32F435/target.h
index b3f9bb4c7b..3d6c71eac0 100644
--- a/src/main/target/AT32F435/target.h
+++ b/src/main/target/AT32F435/target.h
@@ -44,12 +44,13 @@
 #define USE_SPI_DEVICE_3
 #define USE_SPI_DMA_ENABLE_LATE
 
-#define USE_GYRO_SPI_MPU6000
-#define USE_ACC_SPI_MPU6000
-
 #define USE_EXTI
 #define USE_GYRO_EXTI
 
+#define USE_I2C
+#define USE_I2C_DEVICE_1
+#define USE_I2C_DEVICE_2
+#define USE_I2C_DEVICE_3
 
 #define USE_USB_DETECT
 #define USE_VCP
@@ -76,8 +77,8 @@
 #undef USE_OSD
 #undef USE_BLACKBOX
 #undef USE_SDCARD
-#undef USE_BARO
-#undef USE_MAG
+//#undef USE_BARO
+//#undef USE_MAG
 #undef USE_SERIAL_4WAY_BLHELI_BOOTLOADER
 #undef USE_SERIAL_4WAY_SK_BOOTLOADER
 
diff --git a/src/main/target/AT32F435/target.mk b/src/main/target/AT32F435/target.mk
index f207c7a4ac..df3a20f6dc 100644
--- a/src/main/target/AT32F435/target.mk
+++ b/src/main/target/AT32F435/target.mk
@@ -7,7 +7,6 @@ TARGET_MCU_FAMILY := AT32F4
 STDPERIPH_DIR   = $(ROOT)/lib/main/AT32F43x/drivers
 STDPERIPH_SRC   = \
             $(notdir $(wildcard $(STDPERIPH_DIR)/src/*.c)) \
-            $(notdir $(wildcard $(STDPERIPH_DIR)/src/*.c)) \
 
 EXCLUDES        = at32f435_437_dvp.c \
 				  at32f435_437_can.c \
@@ -23,10 +22,13 @@ INCLUDE_DIRS    := $(INCLUDE_DIRS) \
                    $(SRC_DIR)/startup/at32 \
                    $(STDPERIPH_DIR)/inc \
                    $(ROOT)/lib/main/AT32F43x/cmsis/cm4/core_support \
-                   $(ROOT)/lib/main/AT32F43x/cmsis/cm4
+                   $(ROOT)/lib/main/AT32F43x/cmsis/cm4 \
+                   $(ROOT)/lib/main/AT32F43x/middlewares/i2c_application_library
 
 DEVICE_STDPERIPH_SRC = $(STDPERIPH_SRC)
 
+TARGET_SRC		:= $(ROOT)/lib/main/AT32F43x/middlewares/i2c_application_library/i2c_application.c
+
 LD_SCRIPT       = $(LINKER_DIR)/at32_flash_f43xM.ld
 
 ARCH_FLAGS      = -std=c99  -mthumb -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -fsingle-precision-constant -Wdouble-promotion
@@ -34,7 +36,9 @@ DEVICE_FLAGS   += -DUSE_ATBSP_DRIVER -DAT32F43x -DHSE_VALUE=$(HSE_VALUE) -DAT32
 
 MCU_COMMON_SRC = \
     $(addprefix startup/at32/,$(notdir $(wildcard $(SRC_DIR)/startup/at32/*.c))) \
-    $(addprefix drivers/at32/,$(notdir $(wildcard $(SRC_DIR)/drivers/at32/*.c)))
+    $(addprefix drivers/at32/,$(notdir $(wildcard $(SRC_DIR)/drivers/at32/*.c))) \
+    drivers/bus_i2c_timing.c
+    
 
 MCU_EXCLUDES =