mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-24 00:35:39 +03:00
Converted tabs to spaces.
This commit is contained in:
Martin Budden
parent
3b19b01c78
commit
97fe5afd6c
57 changed files with 575 additions and 575 deletions
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@ -365,22 +365,22 @@ void DMA2_Stream7_IRQHandler(void)
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uartPort_t *s = &(uartHardwareMap[UARTDEV_1]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF7))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF7);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF7);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF7);
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}
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handleUsartTxDma(s);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF7);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF7);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF7);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF7);
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}
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}
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// USART1 Rx/Tx IRQ Handler
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@ -402,30 +402,30 @@ uartPort_t *serialUSART2(uint32_t baudRate, portMode_t mode, portOptions_t optio
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void DMA1_Stream6_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_2]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF6))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF6);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF6);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF6);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF6);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF6);
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}
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF6))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF6);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF6);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF6);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF6);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF6);
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}
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}
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void USART2_IRQHandler(void)
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{
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uartPort_t *s = &(uartHardwareMap[UARTDEV_2]->port);
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usartIrqHandler(s);
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usartIrqHandler(s);
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}
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#endif
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@ -442,22 +442,22 @@ void DMA1_Stream3_IRQHandler(void)
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uartPort_t *s = &(uartHardwareMap[UARTDEV_3]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF3))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF3);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF3);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF3);
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}
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handleUsartTxDma(s);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF3);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF3);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF3);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF3);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF3);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF3);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF3)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF3);
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}
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}
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void USART3_IRQHandler(void)
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@ -480,22 +480,22 @@ void DMA1_Stream4_IRQHandler(void)
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uartPort_t *s = &(uartHardwareMap[UARTDEV_4]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF4))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF4);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF4);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF4);
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}
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handleUsartTxDma(s);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF4);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF4);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF4);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF4);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF4);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF4);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF4)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF4);
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}
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}
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void UART4_IRQHandler(void)
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@ -518,22 +518,22 @@ void DMA1_Stream7_IRQHandler(void)
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uartPort_t *s = &(uartHardwareMap[UARTDEV_5]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF7))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF7);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF7);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF7);
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}
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handleUsartTxDma(s);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF7);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF7);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF7);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF7);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF7)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF7);
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}
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}
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void UART5_IRQHandler(void)
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@ -556,22 +556,22 @@ void DMA2_Stream6_IRQHandler(void)
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uartPort_t *s = &(uartHardwareMap[UARTDEV_6]->port);
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if(DMA_GetITStatus(s->txDMAStream,DMA_IT_TCIF6))
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF6);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF6);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF6);
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}
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handleUsartTxDma(s);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TCIF6);
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_HTIF6);
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_FEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_FEIF6);
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}
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handleUsartTxDma(s);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF6);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF6);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_TEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_TEIF6);
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}
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if(DMA_GetFlagStatus(s->txDMAStream,DMA_IT_DMEIF6)==SET)
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{
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DMA_ClearITPendingBit(s->txDMAStream,DMA_IT_DMEIF6);
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}
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}
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void USART6_IRQHandler(void)
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