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3b19b01c78
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57 changed files with 575 additions and 575 deletions
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@ -45,8 +45,8 @@ void systemReset(void)
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if (mpuConfiguration.reset)
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mpuConfiguration.reset();
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__disable_irq();
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NVIC_SystemReset();
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__disable_irq();
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NVIC_SystemReset();
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}
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void systemResetToBootloader(void)
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@ -54,10 +54,10 @@ void systemResetToBootloader(void)
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if (mpuConfiguration.reset)
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mpuConfiguration.reset();
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*((uint32_t *)0x2001FFFC) = 0xDEADBEEF; // 128KB SRAM STM32F4XX
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*((uint32_t *)0x2001FFFC) = 0xDEADBEEF; // 128KB SRAM STM32F4XX
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__disable_irq();
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NVIC_SystemReset();
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__disable_irq();
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NVIC_SystemReset();
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}
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void enableGPIOPowerUsageAndNoiseReductions(void)
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@ -82,7 +82,7 @@ void enableGPIOPowerUsageAndNoiseReductions(void)
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RCC_AHB1Periph_BKPSRAM |
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RCC_AHB1Periph_DMA1 |
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RCC_AHB1Periph_DMA2 |
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0, ENABLE
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0, ENABLE
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);
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RCC_AHB2PeriphClockCmd(0, ENABLE);
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@ -172,25 +172,25 @@ void systemInit(void)
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SetSysClock();
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// Configure NVIC preempt/priority groups
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NVIC_PriorityGroupConfig(NVIC_PRIORITY_GROUPING);
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NVIC_PriorityGroupConfig(NVIC_PRIORITY_GROUPING);
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// cache RCC->CSR value to use it in isMPUSoftreset() and others
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cachedRccCsrValue = RCC->CSR;
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cachedRccCsrValue = RCC->CSR;
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/* Accounts for OP Bootloader, set the Vector Table base address as specified in .ld file */
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extern void *isr_vector_table_base;
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NVIC_SetVectorTable((uint32_t)&isr_vector_table_base, 0x0);
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RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, DISABLE);
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extern void *isr_vector_table_base;
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NVIC_SetVectorTable((uint32_t)&isr_vector_table_base, 0x0);
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RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, DISABLE);
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RCC_ClearFlag();
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RCC_ClearFlag();
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enableGPIOPowerUsageAndNoiseReductions();
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enableGPIOPowerUsageAndNoiseReductions();
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// Init cycle counter
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cycleCounterInit();
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cycleCounterInit();
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memset(extiHandlerConfigs, 0x00, sizeof(extiHandlerConfigs));
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// SysTick
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SysTick_Config(SystemCoreClock / 1000);
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memset(extiHandlerConfigs, 0x00, sizeof(extiHandlerConfigs));
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// SysTick
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SysTick_Config(SystemCoreClock / 1000);
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}
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