mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-12 19:10:32 +03:00
Removing PICO directory, to be reinstated from RP2350 branch (#14413)
This commit is contained in:
Jay Blackman
GitHub
parent
62dd5f6e4c
commit
98582c0c18
8 changed files with 1 additions and 624 deletions
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@ -43,7 +43,7 @@
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// split ioTag bits between pin and port
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// port is encoded as +1 to avoid collision with 0x0 (false as bool)
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#ifndef DEFIO_PORT_PINS
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#ifndef DEFIO_PORT_PINS
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// pins per port
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#define DEFIO_PORT_PINS 16
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#endif
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@ -1,302 +0,0 @@
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/* Based on GCC ARM embedded samples.
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Defines the following symbols for use by code:
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__exidx_start
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__exidx_end
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__etext
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__data_start__
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__preinit_array_start
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__preinit_array_end
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__init_array_start
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__init_array_end
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__fini_array_start
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__fini_array_end
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__data_end__
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__bss_start__
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__bss_end__
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__end__
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end
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__HeapLimit
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__StackLimit
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__StackTop
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__stack (== StackTop)
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*/
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MEMORY
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{
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FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 4m
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RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 512k
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SCRATCH_X(rwx) : ORIGIN = 0x20080000, LENGTH = 4k
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SCRATCH_Y(rwx) : ORIGIN = 0x20081000, LENGTH = 4k
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}
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ENTRY(_entry_point)
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SECTIONS
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{
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.flash_begin : {
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__flash_binary_start = .;
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} > FLASH
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/* The bootrom will enter the image at the point indicated in your
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IMAGE_DEF, which is usually the reset handler of your vector table.
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The debugger will use the ELF entry point, which is the _entry_point
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symbol, and in our case is *different from the bootrom's entry point.*
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This is used to go back through the bootrom on debugger launches only,
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to perform the same initial flash setup that would be performed on a
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cold boot.
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*/
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.text : {
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__logical_binary_start = .;
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KEEP (*(.vectors))
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KEEP (*(.binary_info_header))
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__binary_info_header_end = .;
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KEEP (*(.embedded_block))
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__embedded_block_end = .;
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KEEP (*(.reset))
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/* TODO revisit this now memset/memcpy/float in ROM */
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/* bit of a hack right now to exclude all floating point and time critical (e.g. memset, memcpy) code from
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* FLASH ... we will include any thing excluded here in .data below by default */
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*(.init)
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*libgcc.a:cmse_nonsecure_call.o
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*(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .text*)
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*(.fini)
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/* Pull all c'tors into .text */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* Followed by destructors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(SORT(.preinit_array.*)))
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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*(SORT(.fini_array.*))
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*(.fini_array)
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PROVIDE_HIDDEN (__fini_array_end = .);
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*(.eh_frame*)
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. = ALIGN(4);
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} > FLASH
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/* Note the boot2 section is optional, and should be discarded if there is
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no reference to it *inside* the binary, as it is not called by the
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bootrom. (The bootrom performs a simple best-effort XIP setup and
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leaves it to the binary to do anything more sophisticated.) However
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there is still a size limit of 256 bytes, to ensure the boot2 can be
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stored in boot RAM.
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Really this is a "XIP setup function" -- the name boot2 is historic and
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refers to its dual-purpose on RP2040, where it also handled vectoring
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from the bootrom into the user image.
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*/
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.boot2 : {
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__boot2_start__ = .;
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*(.boot2)
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__boot2_end__ = .;
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} > FLASH
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ASSERT(__boot2_end__ - __boot2_start__ <= 256,
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"ERROR: Pico second stage bootloader must be no more than 256 bytes in size")
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.rodata : {
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*(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .rodata*)
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*(.srodata*)
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. = ALIGN(4);
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.flashdata*)))
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. = ALIGN(4);
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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/* Machine inspectable binary information */
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. = ALIGN(4);
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__binary_info_start = .;
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.binary_info :
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{
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KEEP(*(.binary_info.keep.*))
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*(.binary_info.*)
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} > FLASH
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__binary_info_end = .;
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. = ALIGN(4);
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.ram_vector_table (NOLOAD): {
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*(.ram_vector_table)
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} > RAM
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.uninitialized_data (NOLOAD): {
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. = ALIGN(4);
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*(.uninitialized_data*)
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} > RAM
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.data : {
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__data_start__ = .;
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*(vtable)
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*(.time_critical*)
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/* remaining .text and .rodata; i.e. stuff we exclude above because we want it in RAM */
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*(.text*)
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. = ALIGN(4);
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*(.rodata*)
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. = ALIGN(4);
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*(.data*)
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*(.sdata*)
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. = ALIGN(4);
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*(.after_data.*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__mutex_array_start = .);
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KEEP(*(SORT(.mutex_array.*)))
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KEEP(*(.mutex_array))
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PROVIDE_HIDDEN (__mutex_array_end = .);
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*(.jcr)
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. = ALIGN(4);
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} > RAM AT> FLASH
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.tdata : {
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. = ALIGN(4);
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*(.tdata .tdata.* .gnu.linkonce.td.*)
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/* All data end */
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__tdata_end = .;
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} > RAM AT> FLASH
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PROVIDE(__data_end__ = .);
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/* __etext is (for backwards compatibility) the name of the .data init source pointer (...) */
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__etext = LOADADDR(.data);
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.tbss (NOLOAD) : {
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. = ALIGN(4);
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__bss_start__ = .;
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__tls_base = .;
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*(.tbss .tbss.* .gnu.linkonce.tb.*)
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*(.tcommon)
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__tls_end = .;
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} > RAM
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.bss (NOLOAD) : {
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. = ALIGN(4);
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__tbss_end = .;
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
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*(COMMON)
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PROVIDE(__global_pointer$ = . + 2K);
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*(.sbss*)
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. = ALIGN(4);
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__bss_end__ = .;
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} > RAM
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.heap (NOLOAD):
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{
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__end__ = .;
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end = __end__;
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KEEP(*(.heap*))
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} > RAM
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/* historically on GCC sbrk was growing past __HeapLimit to __StackLimit, however
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to be more compatible, we now set __HeapLimit explicitly to where the end of the heap is */
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__HeapLimit = ORIGIN(RAM) + LENGTH(RAM);
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/* Start and end symbols must be word-aligned */
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.scratch_x : {
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__scratch_x_start__ = .;
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*(.scratch_x.*)
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. = ALIGN(4);
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__scratch_x_end__ = .;
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} > SCRATCH_X AT > FLASH
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__scratch_x_source__ = LOADADDR(.scratch_x);
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.scratch_y : {
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__scratch_y_start__ = .;
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*(.scratch_y.*)
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. = ALIGN(4);
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__scratch_y_end__ = .;
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} > SCRATCH_Y AT > FLASH
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__scratch_y_source__ = LOADADDR(.scratch_y);
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/* .stack*_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later
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*
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* stack1 section may be empty/missing if platform_launch_core1 is not used */
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/* by default we put core 0 stack at the end of scratch Y, so that if core 1
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* stack is not used then all of SCRATCH_X is free.
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*/
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.stack1_dummy (NOLOAD):
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{
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*(.stack1*)
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} > SCRATCH_X
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.stack_dummy (NOLOAD):
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{
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KEEP(*(.stack*))
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} > SCRATCH_Y
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.flash_end : {
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KEEP(*(.embedded_end_block*))
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PROVIDE(__flash_binary_end = .);
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} > FLASH =0xaa
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/* stack limit is poorly named, but historically is maximum heap ptr */
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__StackLimit = ORIGIN(RAM) + LENGTH(RAM);
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__StackOneTop = ORIGIN(SCRATCH_X) + LENGTH(SCRATCH_X);
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__StackTop = ORIGIN(SCRATCH_Y) + LENGTH(SCRATCH_Y);
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__StackOneBottom = __StackOneTop - SIZEOF(.stack1_dummy);
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__StackBottom = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* picolibc and LLVM */
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PROVIDE (__heap_start = __end__);
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PROVIDE (__heap_end = __HeapLimit);
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PROVIDE( __tls_align = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss)) );
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PROVIDE( __tls_size_align = (__tls_size + __tls_align - 1) & ~(__tls_align - 1));
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PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) );
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/* llvm-libc */
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PROVIDE (_end = __end__);
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PROVIDE (__llvm_libc_heap_limit = __HeapLimit);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")
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ASSERT( __binary_info_header_end - __logical_binary_start <= 1024, "Binary info must be in first 1024 bytes of the binary")
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ASSERT( __embedded_block_end - __logical_binary_start <= 4096, "Embedded block must be in first 4096 bytes of the binary")
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/* todo assert on extra code */
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}
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@ -1,158 +0,0 @@
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#
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# Raspberry PICO Make file include
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#
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ifeq ($(DEBUG_HARDFAULTS),PICO)
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CFLAGS += -DDEBUG_HARDFAULTS
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endif
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SDK_DIR = $(LIB_MAIN_DIR)/pico-sdk
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#CMSIS
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CMSIS_DIR := $(SDK_DIR)/rp2_common/cmsis/stub/CMSIS
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|
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#STDPERIPH
|
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STDPERIPH_DIR = $(SDK_SIR)
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STDPERIPH_SRC = \
|
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|
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|
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VPATH := $(VPATH):$(STDPERIPH_DIR)
|
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|
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DEVICE_STDPERIPH_SRC := \
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$(STDPERIPH_SRC) \
|
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$(USBCORE_SRC) \
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$(USBCDC_SRC) \
|
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$(USBHID_SRC) \
|
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$(USBMSC_SRC)
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#CMSIS
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VPATH := $(VPATH):$(CMSIS_DIR)/Core/Include:$(CMSIS_DIR)/Device/$(TARGET_MCU)/Include
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CMSIS_SRC :=
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|
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#SRC
|
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VPATH := $(VPATH):$(STDPERIPH_DIR)
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|
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INCLUDE_DIRS := \
|
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$(INCLUDE_DIRS) \
|
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$(TARGET_PLATFORM_DIR) \
|
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$(TARGET_PLATFORM_DIR)/startup \
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$(SDK_DIR)/$(TARGET_MCU)/pico_platform/include \
|
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$(SDK_DIR)/$(TARGET_MCU)/hardware_regs/include \
|
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$(SDK_DIR)/$(TARGET_MCU)/hardware_structs/include \
|
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$(SDK_DIR)/common/pico_bit_ops_headers/include \
|
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$(SDK_DIR)/common/pico_base_headers/include \
|
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$(SDK_DIR)/common/boot_picoboot_headers/include \
|
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$(SDK_DIR)/common/pico_usb_reset_interface_headers/include \
|
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$(SDK_DIR)/common/pico_time/include \
|
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$(SDK_DIR)/common/boot_uf2_headers/include \
|
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$(SDK_DIR)/common/pico_divider_headers/include \
|
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$(SDK_DIR)/common/boot_picobin_headers/include \
|
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$(SDK_DIR)/common/pico_util/include \
|
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$(SDK_DIR)/common/pico_stdlib_headers/include \
|
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$(SDK_DIR)/common/hardware_claim/include \
|
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$(SDK_DIR)/common/pico_binary_info/include \
|
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$(SDK_DIR)/common/pico_sync/include \
|
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$(SDK_DIR)/rp2_common/pico_stdio_uart/include \
|
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$(SDK_DIR)/rp2_common/pico_stdio_usb/include \
|
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$(SDK_DIR)/rp2_common/pico_stdio_rtt/include \
|
||||
$(SDK_DIR)/rp2_common/tinyusb/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_rtc/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_boot_lock/include \
|
||||
$(SDK_DIR)/rp2_common/pico_mem_ops/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_exception/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_sync_spin_lock/include \
|
||||
$(SDK_DIR)/rp2_common/pico_runtime_init/include \
|
||||
$(SDK_DIR)/rp2_common/pico_standard_link/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_pio/include \
|
||||
$(SDK_DIR)/rp2_common/pico_platform_compiler/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_divider/include \
|
||||
$(SDK_DIR)/rp2_common/pico_bootsel_via_double_reset/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_powman/include \
|
||||
$(SDK_DIR)/rp2_common/pico_btstack/include \
|
||||
$(SDK_DIR)/rp2_common/pico_cyw43_driver/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_flash/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_ticks/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_dma/include \
|
||||
$(SDK_DIR)/rp2_common/pico_bit_ops/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_clocks/include \
|
||||
$(SDK_DIR)/rp2_common/pico_unique_id/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_dcp/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_watchdog/include \
|
||||
$(SDK_DIR)/rp2_common/pico_rand/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_hazard3/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_uart/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_interp/include \
|
||||
$(SDK_DIR)/rp2_common/pico_printf/include \
|
||||
$(SDK_DIR)/rp2_common/pico_aon_timer/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_riscv_platform_timer/include \
|
||||
$(SDK_DIR)/rp2_common/pico_double/include \
|
||||
$(SDK_DIR)/rp2_common/pico_cyw43_arch/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_vreg/include \
|
||||
$(SDK_DIR)/rp2_common/pico_mbedtls/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_spi/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_rcp/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_riscv/include \
|
||||
$(SDK_DIR)/rp2_common/pico_standard_binary_info/include \
|
||||
$(SDK_DIR)/rp2_common/pico_i2c_slave/include \
|
||||
$(SDK_DIR)/rp2_common/pico_int64_ops/include \
|
||||
$(SDK_DIR)/rp2_common/pico_sha256/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_irq/include \
|
||||
$(SDK_DIR)/rp2_common/pico_divider/include \
|
||||
$(SDK_DIR)/rp2_common/pico_flash/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_sync/include \
|
||||
$(SDK_DIR)/rp2_common/pico_bootrom/include \
|
||||
$(SDK_DIR)/rp2_common/pico_crt0/include \
|
||||
$(SDK_DIR)/rp2_common/pico_clib_interface/include \
|
||||
$(SDK_DIR)/rp2_common/pico_stdio/include \
|
||||
$(SDK_DIR)/rp2_common/pico_runtime/include \
|
||||
$(SDK_DIR)/rp2_common/pico_time_adapter/include \
|
||||
$(SDK_DIR)/rp2_common/pico_platform_panic/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_adc/include \
|
||||
$(SDK_DIR)/rp2_common/cmsis/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_pll/include \
|
||||
$(SDK_DIR)/rp2_common/pico_platform_sections/include \
|
||||
$(SDK_DIR)/rp2_common/boot_bootrom_headers/include \
|
||||
$(SDK_DIR)/rp2_common/pico_fix/include \
|
||||
$(SDK_DIR)/rp2_common/pico_lwip/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_base/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_xosc/include \
|
||||
$(SDK_DIR)/rp2_common/pico_async_context/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_pwm/include \
|
||||
$(SDK_DIR)/rp2_common/pico_stdio_semihosting/include \
|
||||
$(SDK_DIR)/rp2_common/pico_float/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_resets/include \
|
||||
$(SDK_DIR)/rp2_common/pico_cxx_options/include \
|
||||
$(SDK_DIR)/rp2_common/pico_stdlib/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_sha256/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_i2c/include \
|
||||
$(SDK_DIR)/rp2_common/pico_atomic/include \
|
||||
$(SDK_DIR)/rp2_common/pico_multicore/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_gpio/include \
|
||||
$(SDK_DIR)/rp2_common/pico_malloc/include \
|
||||
$(SDK_DIR)/rp2_common/hardware_timer/include \
|
||||
$(CMSIS_DIR)/Core/Include \
|
||||
$(CMSIS_DIR)/Device/$(TARGET_MCU)/Include
|
||||
|
||||
#Flags
|
||||
ARCH_FLAGS = -mthumb -mcpu=cortex-m33 -march=armv8-m.main+fp+dsp -mfloat-abi=softfp -mcmse
|
||||
|
||||
DEVICE_FLAGS =
|
||||
|
||||
ifeq ($(TARGET_MCU),RP2350)
|
||||
DEVICE_FLAGS += -DRP2350 -DLIB_BOOT_STAGE2_HEADERS=1 -DLIB_PICO_ATOMIC=1 -DLIB_PICO_BIT_OPS=1 -DLIB_PICO_BIT_OPS_PICO=1 -DLIB_PICO_CLIB_INTERFACE=1 -DLIB_PICO_CRT0=1 -DLIB_PICO_CXX_OPTIONS=1 -DLIB_PICO_DIVIDER=1 -DLIB_PICO_DIVIDER_COMPILER=1 -DLIB_PICO_DOUBLE=1 -DLIB_PICO_DOUBLE_PICO=1 -DLIB_PICO_FLOAT=1 -DLIB_PICO_FLOAT_PICO=1 -DLIB_PICO_FLOAT_PICO_VFP=1 -DLIB_PICO_INT64_OPS=1 -DLIB_PICO_INT64_OPS_COMPILER=1 -DLIB_PICO_MALLOC=1 -DLIB_PICO_MEM_OPS=1 -DLIB_PICO_MEM_OPS_COMPILER=1 -DLIB_PICO_NEWLIB_INTERFACE=1 -DLIB_PICO_PLATFORM=1 -DLIB_PICO_PLATFORM_COMPILER=1 -DLIB_PICO_PLATFORM_PANIC=1 -DLIB_PICO_PLATFORM_SECTIONS=1 -DLIB_PICO_PRINTF=1 -DLIB_PICO_PRINTF_PICO=1 -DLIB_PICO_RUNTIME=1 -DLIB_PICO_RUNTIME_INIT=1 -DLIB_PICO_STANDARD_BINARY_INFO=1 -DLIB_PICO_STANDARD_LINK=1 -DLIB_PICO_STDIO=1 -DLIB_PICO_STDIO_UART=1 -DLIB_PICO_STDLIB=1 -DLIB_PICO_SYNC=1 -DLIB_PICO_SYNC_CRITICAL_SECTION=1 -DLIB_PICO_SYNC_MUTEX=1 -DLIB_PICO_SYNC_SEM=1 -DLIB_PICO_TIME=1 -DLIB_PICO_TIME_ADAPTER=1 -DLIB_PICO_UTIL=1 -DPICO_32BIT=1 -DPICO_BUILD=1 -DPICO_COPY_TO_RAM=0 -DPICO_CXX_ENABLE_EXCEPTIONS=0 -DPICO_NO_FLASH=0 -DPICO_NO_HARDWARE=0 -DPICO_ON_DEVICE=1 -DPICO_RP2350=1 -DPICO_USE_BLOCKED_RAM=0
|
||||
LD_SCRIPT = $(LINKER_DIR)/pico_rp2350.ld
|
||||
STARTUP_SRC = startup/bs2_default_padded_checksummed.S
|
||||
MCU_FLASH_SIZE = 4096
|
||||
# Override the OPTIMISE_SPEED compiler setting to save flash space on these 512KB targets.
|
||||
# Performance is only slightly affected but around 50 kB of flash are saved.
|
||||
OPTIMISE_SPEED = -O2
|
||||
else
|
||||
$(error Unknown MCU for Raspberry PICO target)
|
||||
endif
|
||||
|
||||
DEVICE_FLAGS += -DHSE_VALUE=$(HSE_VALUE) -DPICO
|
||||
|
||||
MCU_COMMON_SRC = \
|
||||
|
||||
|
||||
DEVICE_FLAGS +=
|
||||
|
|
@ -1,67 +0,0 @@
|
|||
/*
|
||||
* This file is part of Betaflight.
|
||||
*
|
||||
* Betaflight is free software. You can redistribute this software
|
||||
* and/or modify this software under the terms of the GNU General
|
||||
* Public License as published by the Free Software Foundation,
|
||||
* either version 3 of the License, or (at your option) any later
|
||||
* version.
|
||||
*
|
||||
* Betaflight is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* See the GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this software.
|
||||
*
|
||||
* If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#if defined(RP2350)
|
||||
|
||||
#include "RP2350.h"
|
||||
|
||||
typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
|
||||
|
||||
#define I2C_TypeDef I2C0_Type
|
||||
//#define I2C_HandleTypeDef
|
||||
#define GPIO_TypeDef IO_BANK0_Type
|
||||
//#define GPIO_InitTypeDef
|
||||
#define TIM_TypeDef TIMER0_Type
|
||||
//#define TIM_OCInitTypeDef
|
||||
#define DMA_TypeDef DMA_Type
|
||||
//#define DMA_InitTypeDef
|
||||
//#define DMA_Channel_TypeDef
|
||||
#define SPI_TypeDef SPI0_Type
|
||||
#define ADC_TypeDef ADC_Type
|
||||
#define USART_TypeDef UART0_Type
|
||||
#define TIM_OCInitTypeDef TIMER0_Type
|
||||
#define TIM_ICInitTypeDef TIMER0_Type
|
||||
//#define TIM_OCStructInit
|
||||
//#define TIM_Cmd
|
||||
//#define TIM_CtrlPWMOutputs
|
||||
//#define TIM_TimeBaseInit
|
||||
//#define TIM_ARRPreloadConfig
|
||||
//#define SystemCoreClock
|
||||
//#define EXTI_TypeDef
|
||||
//#define EXTI_InitTypeDef
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#define DEFAULT_CPU_OVERCLOCK 0
|
||||
#define TASK_GYROPID_DESIRED_PERIOD 125 // 125us = 8kHz
|
||||
#define SCHEDULER_DELAY_LIMIT 10
|
||||
|
||||
#define IOCFG_OUT_PP 0
|
||||
#define IOCFG_OUT_OD 0
|
||||
#define IOCFG_AF_PP 0
|
||||
#define IOCFG_AF_OD 0
|
||||
#define IOCFG_IPD 0
|
||||
#define IOCFG_IPU 0
|
||||
#define IOCFG_IN_FLOATING 0
|
||||
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
// Padded and checksummed version of: /home/black/src/pico/hello/build/pico-sdk/src/rp2350/boot_stage2/bs2_default.bin
|
||||
|
||||
.cpu cortex-m0plus
|
||||
.thumb
|
||||
|
||||
.section .boot2, "ax"
|
||||
|
||||
.global __boot2_entry_point
|
||||
__boot2_entry_point:
|
||||
.byte 0x00, 0xb5, 0x24, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x13, 0xf5, 0x40, 0x53, 0x02, 0x20, 0x98, 0x60
|
||||
.byte 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x13, 0xf5, 0x0d, 0x23, 0x1f, 0x49, 0x19, 0x60, 0x18, 0x68
|
||||
.byte 0x10, 0xf0, 0x02, 0x0f, 0xfb, 0xd1, 0x35, 0x20, 0x00, 0xf0, 0x2c, 0xf8, 0x02, 0x28, 0x14, 0xd0
|
||||
.byte 0x06, 0x20, 0x58, 0x60, 0x00, 0xf0, 0x22, 0xf8, 0x98, 0x68, 0x01, 0x20, 0x58, 0x60, 0x00, 0x20
|
||||
.byte 0x58, 0x60, 0x02, 0x20, 0x58, 0x60, 0x00, 0xf0, 0x19, 0xf8, 0x98, 0x68, 0x98, 0x68, 0x98, 0x68
|
||||
.byte 0x05, 0x20, 0x00, 0xf0, 0x17, 0xf8, 0x40, 0x08, 0xfa, 0xd2, 0x31, 0xf0, 0x01, 0x01, 0x19, 0x60
|
||||
.byte 0x0e, 0x48, 0xd8, 0x60, 0x4a, 0xf2, 0xeb, 0x00, 0x58, 0x61, 0x0d, 0x48, 0x18, 0x61, 0x4f, 0xf0
|
||||
.byte 0xa0, 0x51, 0x09, 0x78, 0x20, 0xf4, 0x80, 0x50, 0x18, 0x61, 0x00, 0xbd, 0x18, 0x68, 0x80, 0x08
|
||||
.byte 0xfc, 0xd2, 0x70, 0x47, 0x00, 0xb5, 0x58, 0x60, 0x58, 0x60, 0xff, 0xf7, 0xf7, 0xff, 0x98, 0x68
|
||||
.byte 0x98, 0x68, 0x00, 0xbd, 0x00, 0x00, 0x04, 0x40, 0x41, 0x00, 0x80, 0x07, 0x02, 0x02, 0x00, 0x40
|
||||
.byte 0xa8, 0x92, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
|
|
@ -1,69 +0,0 @@
|
|||
/*
|
||||
* This file is part of Betaflight.
|
||||
*
|
||||
* Betaflight is free software. You can redistribute this software
|
||||
* and/or modify this software under the terms of the GNU General
|
||||
* Public License as published by the Free Software Foundation,
|
||||
* either version 3 of the License, or (at your option) any later
|
||||
* version.
|
||||
*
|
||||
* Betaflight is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
* See the GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this software.
|
||||
*
|
||||
* If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef TARGET_BOARD_IDENTIFIER
|
||||
#define TARGET_BOARD_IDENTIFIER "R235"
|
||||
#endif
|
||||
|
||||
#ifndef USBD_PRODUCT_STRING
|
||||
#define USBD_PRODUCT_STRING "Betaflight RP2350"
|
||||
#endif
|
||||
|
||||
#undef USE_DMA
|
||||
#undef USE_FLASH
|
||||
#undef USE_FLASH_CHIP
|
||||
|
||||
#undef USE_TIMER
|
||||
#undef USE_SPI
|
||||
#undef USE_I2C
|
||||
#undef USE_UART
|
||||
#undef USE_DSHOT
|
||||
#undef USE_RCC
|
||||
|
||||
#define GPIOA_BASE ((intptr_t)0x0001)
|
||||
|
||||
#define TARGET_IO_PORTA 0xffff
|
||||
#define TARGET_IO_PORTB 0xffff
|
||||
#define TARGET_IO_PORTC 0xffff
|
||||
#define TARGET_IO_PORTD 0xffff
|
||||
#define TARGET_IO_PORTE 0xffff
|
||||
#define TARGET_IO_PORTF 0xffff
|
||||
|
||||
#undef USE_FLASH
|
||||
#undef USE_FLASH_CHIP
|
||||
#undef USE_FLASH_M25P16
|
||||
#undef USE_FLASH_W25N01G
|
||||
#undef USE_FLASH_W25N02K
|
||||
#undef USE_FLASH_W25M
|
||||
#undef USE_FLASH_W25M512
|
||||
#undef USE_FLASH_W25M02G
|
||||
#undef USE_FLASH_W25Q128FV
|
||||
#undef USE_FLASH_PY25Q128HA
|
||||
#undef USE_FLASH_W25Q64FV
|
||||
|
||||
#define FLASH_PAGE_SIZE 0x1000
|
||||
#define CONFIG_IN_RAM
|
||||
|
||||
#define U_ID_0 0
|
||||
#define U_ID_1 1
|
||||
#define U_ID_2 2
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
TARGET_MCU := RP2350
|
||||
TARGET_MCU_FAMILY := PICO
|
||||
Loading…
Add table
Add a link
Reference in a new issue