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Re-submitting, previous history re-write purged original. This will make current ADC work on F3.

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Read Error 2015-11-06 09:38:27 -05:00
parent c8a9ebc15d
commit 9899476dbb
1 changed files with 9 additions and 7 deletions
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16
src/main/drivers/adc_stm32f30x.c
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@ -91,14 +91,16 @@ void adcInit(drv_adc_config_t *init)
#endif #endif
#ifdef EXTERNAL1_ADC_GPIO #ifdef EXTERNAL1_ADC_GPIO
GPIO_InitStructure.GPIO_Pin = EXTERNAL1_ADC_GPIO_PIN; if (init->enableExternal1) {
GPIO_Init(EXTERNAL1_ADC_GPIO, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = EXTERNAL1_ADC_GPIO_PIN;
GPIO_Init(EXTERNAL1_ADC_GPIO, &GPIO_InitStructure);
adcConfig[ADC_EXTERNAL1].adcChannel = EXTERNAL1_ADC_CHANNEL; adcConfig[ADC_EXTERNAL1].adcChannel = EXTERNAL1_ADC_CHANNEL;
adcConfig[ADC_EXTERNAL1].dmaIndex = adcChannelCount; adcConfig[ADC_EXTERNAL1].dmaIndex = adcChannelCount;
adcConfig[ADC_EXTERNAL1].sampleTime = ADC_SampleTime_601Cycles5; adcConfig[ADC_EXTERNAL1].sampleTime = ADC_SampleTime_601Cycles5;
adcConfig[ADC_EXTERNAL1].enabled = true; adcConfig[ADC_EXTERNAL1].enabled = true;
adcChannelCount++; adcChannelCount++;
}
#endif #endif
RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div256); // 72 MHz divided by 256 = 281.25 kHz RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div256); // 72 MHz divided by 256 = 281.25 kHz