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Code Issues Wiki Activity

h7: add timer pins (#14153)

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Jacob Dahl 2025-01-27 06:34:29 -09:00 • committed by GitHub
parent 3d9dcbc9b1
commit 9ab3aa1048
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GPG key ID: B5690EEEBB952194
2 changed files with 26 additions and 16 deletions
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7
src/platform/STM32/timer_def.h
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@ -747,6 +747,11 @@
#define DEF_TIM_AF__PB14__TCH_TIM12_CH1 D(2, 12)
#define DEF_TIM_AF__PB15__TCH_TIM12_CH2 D(2, 12)
#define DEF_TIM_AF__PB0__TCH_TIM8_CH2N D(3, 8)
#define DEF_TIM_AF__PB1__TCH_TIM8_CH3N D(3, 8)
#define DEF_TIM_AF__PB14__TCH_TIM8_CH2N D(3, 8)
#define DEF_TIM_AF__PB15__TCH_TIM8_CH3N D(3, 8)
//PORTC
#define DEF_TIM_AF__PC6__TCH_TIM3_CH1 D(2, 3)
#define DEF_TIM_AF__PC7__TCH_TIM3_CH2 D(2, 3)
@ -1142,7 +1147,7 @@
#elif defined(STM32H7)
#define FULL_TIMER_CHANNEL_COUNT 87
#define FULL_TIMER_CHANNEL_COUNT 91
#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(6) | TIM_N(7) | TIM_N(8) | TIM_N(12) | TIM_N(13) | TIM_N(14) | TIM_N(15) | TIM_N(16) | TIM_N(17) )
#define HARDWARE_TIMER_DEFINITION_COUNT 17
#define TIMUP_TIMERS ( BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8) | BIT(15) | BIT(16) | BIT(17) )

35
src/platform/STM32/timer_stm32h7xx.c
View file

@ -71,10 +71,8 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM5, CH4, PA3, 0, 0, 0),
DEF_TIM(TIM3, CH1, PA6, 0, 0, 0),
DEF_TIM(TIM3, CH2, PA7, 0, 0, 0),
DEF_TIM(TIM8, CH1N, PA5, 0, 0, 0),
DEF_TIM(TIM8, CH1N, PA7, 0, 0, 0),
DEF_TIM(TIM13, CH1, PA6, 0, 0, 0),
DEF_TIM(TIM14, CH1, PA7, 0, 0, 0),
@ -104,16 +102,19 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM4, CH2, PB7, 0, 0, 0),
DEF_TIM(TIM4, CH3, PB8, 0, 0, 0),
DEF_TIM(TIM4, CH4, PB9, 0, 0, 0),
DEF_TIM(TIM12, CH1, PB14, 0, 0, 0),
DEF_TIM(TIM12, CH2, PB15, 0, 0, 0),
DEF_TIM(TIM8, CH2N, PB0, 0, 0, 0),
DEF_TIM(TIM8, CH3N, PB1, 0, 0, 0),
DEF_TIM(TIM8, CH2N, PB14, 0, 0, 0),
DEF_TIM(TIM8, CH3N, PB15, 0, 0, 0),
// Port C
DEF_TIM(TIM3, CH1, PC6, 0, 0, 0),
DEF_TIM(TIM3, CH2, PC7, 0, 0, 0),
DEF_TIM(TIM3, CH3, PC8, 0, 0, 0),
DEF_TIM(TIM3, CH4, PC9, 0, 0, 0),
DEF_TIM(TIM8, CH1, PC6, 0, 0, 0),
DEF_TIM(TIM8, CH2, PC7, 0, 0, 0),
DEF_TIM(TIM8, CH3, PC8, 0, 0, 0),
@ -133,7 +134,6 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM1, CH3N, PE12, 0, 0, 0),
DEF_TIM(TIM1, CH3, PE13, 0, 0, 0),
DEF_TIM(TIM1, CH4, PE14, 0, 0, 0),
DEF_TIM(TIM15, CH1N, PE4, 0, 0, 0),
DEF_TIM(TIM15, CH1, PE5, 0, 0, 0),
DEF_TIM(TIM15, CH2, PE6, 0, 0, 0),
@ -143,20 +143,25 @@ const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM17, CH1, PF7, 0, 0, 0),
DEF_TIM(TIM16, CH1N, PF8, 0, 0, 0),
DEF_TIM(TIM17, CH1N, PF9, 0, 0, 0),
DEF_TIM(TIM13, CH1N, PF8, 0, 0, 0),
DEF_TIM(TIM14, CH1N, PF9, 0, 0, 0),
// Port H
// Port H is not available for LPQFP-100 or 144 and TFBGA-100 package
// DEF_TIM(TIM12, CH1, PH6, 0, 0, 0),
// DEF_TIM(TIM12, CH2, PH9, 0, 0, 0),
// DEF_TIM(TIM5, CH1, PH10, 0, 0, 0),
// DEF_TIM(TIM5, CH2, PH11, 0, 0, 0),
// DEF_TIM(TIM5, CH3, PH12, 0, 0, 0),
// DEF_TIM(TIM8, CH1N, PH13, 0, 0, 0),
// DEF_TIM(TIM8, CH2N, PH14, 0, 0, 0),
// DEF_TIM(TIM8, CH3N, PH15, 0, 0, 0),
DEF_TIM(TIM5, CH1, PH10, 0, 0, 0),
DEF_TIM(TIM5, CH2, PH11, 0, 0, 0),
DEF_TIM(TIM5, CH3, PH12, 0, 0, 0),
DEF_TIM(TIM8, CH1N, PH13, 0, 0, 0),
DEF_TIM(TIM8, CH2N, PH14, 0, 0, 0),
DEF_TIM(TIM8, CH3N, PH15, 0, 0, 0),
DEF_TIM(TIM12, CH1, PH6, 0, 0, 0),
DEF_TIM(TIM12, CH2, PH9, 0, 0, 0),
// Port I
DEF_TIM(TIM5, CH4, PI0, 0, 0, 0),
DEF_TIM(TIM8, CH4, PI2, 0, 0, 0),
DEF_TIM(TIM8, CH1, PI5, 0, 0, 0),
DEF_TIM(TIM8, CH2, PI6, 0, 0, 0),
DEF_TIM(TIM8, CH3, PI7, 0, 0, 0),
};
#endif