diff --git a/src/main/drivers/accgyro_mpu.c b/src/main/drivers/accgyro_mpu.c
index 92139974a0..266014bbe0 100644
--- a/src/main/drivers/accgyro_mpu.c
+++ b/src/main/drivers/accgyro_mpu.c
@@ -61,14 +61,6 @@ static const extiConfig_t *mpuIntExtiConfig = NULL;
#define MPU_ADDRESS 0x68
-// MPU6050
-#define MPU_RA_WHO_AM_I 0x75
-#define MPU_RA_WHO_AM_I_LEGACY 0x00
-#define MPU_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS
-#define MPU_RA_PRODUCT_ID 0x0C // Product ID Register
-#define MPU_RA_ACCEL_XOUT_H 0x3B
-#define MPU_RA_GYRO_XOUT_H 0x43
-
// WHO_AM_I register contents for MPU3050, 6050 and 6500
#define MPU6500_WHO_AM_I_CONST (0x70)
#define MPUx0x0_WHO_AM_I_CONST (0x68)
@@ -133,7 +125,7 @@ static bool detectSPISensorsAndUpdateDetectionResult(void)
#ifdef USE_GYRO_SPI_MPU6500
if (mpu6500SpiDetect()) {
mpuDetectionResult.sensor = MPU_65xx_SPI;
- mpuConfiguration.gyroReadXRegister = MPU6500_RA_GYRO_XOUT_H;
+ mpuConfiguration.gyroReadXRegister = MPU_RA_GYRO_XOUT_H;
mpuConfiguration.read = mpu6500ReadRegister;
mpuConfiguration.write = mpu6500WriteRegister;
return true;
@@ -143,7 +135,7 @@ static bool detectSPISensorsAndUpdateDetectionResult(void)
#ifdef USE_GYRO_SPI_MPU6000
if (mpu6000SpiDetect()) {
mpuDetectionResult.sensor = MPU_60x0_SPI;
- mpuConfiguration.gyroReadXRegister = MPU6000_GYRO_XOUT_H;
+ mpuConfiguration.gyroReadXRegister = MPU_RA_GYRO_XOUT_H;
mpuConfiguration.read = mpu6000ReadRegister;
mpuConfiguration.write = mpu6000WriteRegister;
return true;
@@ -243,7 +235,7 @@ void configureMPUDataReadyInterruptHandling(void)
}
#endif
- registerExti15_10_CallbackHandler(MPU_DATA_READY_EXTI_Handler);
+ registerExtiCallbackHandler(mpuIntExtiConfig->exti_irqn, MPU_DATA_READY_EXTI_Handler);
EXTI_ClearITPendingBit(mpuIntExtiConfig->exti_line);
diff --git a/src/main/drivers/accgyro_mpu.h b/src/main/drivers/accgyro_mpu.h
index c7af60b3ef..500d683542 100644
--- a/src/main/drivers/accgyro_mpu.h
+++ b/src/main/drivers/accgyro_mpu.h
@@ -17,6 +17,104 @@
#pragma once
+// MPU6050
+#define MPU_RA_WHO_AM_I 0x75
+#define MPU_RA_WHO_AM_I_LEGACY 0x00
+
+// RA = Register Address
+
+#define MPU_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD
+#define MPU_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD
+#define MPU_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD
+#define MPU_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN
+#define MPU_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN
+#define MPU_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN
+#define MPU_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS
+#define MPU_RA_XA_OFFS_L_TC 0x07
+#define MPU_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS
+#define MPU_RA_YA_OFFS_L_TC 0x09
+#define MPU_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS
+#define MPU_RA_ZA_OFFS_L_TC 0x0B
+#define MPU_RA_PRODUCT_ID 0x0C // Product ID Register
+#define MPU_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR
+#define MPU_RA_XG_OFFS_USRL 0x14
+#define MPU_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR
+#define MPU_RA_YG_OFFS_USRL 0x16
+#define MPU_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR
+#define MPU_RA_ZG_OFFS_USRL 0x18
+#define MPU_RA_SMPLRT_DIV 0x19
+#define MPU_RA_CONFIG 0x1A
+#define MPU_RA_GYRO_CONFIG 0x1B
+#define MPU_RA_ACCEL_CONFIG 0x1C
+#define MPU_RA_FF_THR 0x1D
+#define MPU_RA_FF_DUR 0x1E
+#define MPU_RA_MOT_THR 0x1F
+#define MPU_RA_MOT_DUR 0x20
+#define MPU_RA_ZRMOT_THR 0x21
+#define MPU_RA_ZRMOT_DUR 0x22
+#define MPU_RA_FIFO_EN 0x23
+#define MPU_RA_I2C_MST_CTRL 0x24
+#define MPU_RA_I2C_SLV0_ADDR 0x25
+#define MPU_RA_I2C_SLV0_REG 0x26
+#define MPU_RA_I2C_SLV0_CTRL 0x27
+#define MPU_RA_I2C_SLV1_ADDR 0x28
+#define MPU_RA_I2C_SLV1_REG 0x29
+#define MPU_RA_I2C_SLV1_CTRL 0x2A
+#define MPU_RA_I2C_SLV2_ADDR 0x2B
+#define MPU_RA_I2C_SLV2_REG 0x2C
+#define MPU_RA_I2C_SLV2_CTRL 0x2D
+#define MPU_RA_I2C_SLV3_ADDR 0x2E
+#define MPU_RA_I2C_SLV3_REG 0x2F
+#define MPU_RA_I2C_SLV3_CTRL 0x30
+#define MPU_RA_I2C_SLV4_ADDR 0x31
+#define MPU_RA_I2C_SLV4_REG 0x32
+#define MPU_RA_I2C_SLV4_DO 0x33
+#define MPU_RA_I2C_SLV4_CTRL 0x34
+#define MPU_RA_I2C_SLV4_DI 0x35
+#define MPU_RA_I2C_MST_STATUS 0x36
+#define MPU_RA_INT_PIN_CFG 0x37
+#define MPU_RA_INT_ENABLE 0x38
+#define MPU_RA_DMP_INT_STATUS 0x39
+#define MPU_RA_INT_STATUS 0x3A
+#define MPU_RA_ACCEL_XOUT_H 0x3B
+#define MPU_RA_ACCEL_XOUT_L 0x3C
+#define MPU_RA_ACCEL_YOUT_H 0x3D
+#define MPU_RA_ACCEL_YOUT_L 0x3E
+#define MPU_RA_ACCEL_ZOUT_H 0x3F
+#define MPU_RA_ACCEL_ZOUT_L 0x40
+#define MPU_RA_TEMP_OUT_H 0x41
+#define MPU_RA_TEMP_OUT_L 0x42
+#define MPU_RA_GYRO_XOUT_H 0x43
+#define MPU_RA_GYRO_XOUT_L 0x44
+#define MPU_RA_GYRO_YOUT_H 0x45
+#define MPU_RA_GYRO_YOUT_L 0x46
+#define MPU_RA_GYRO_ZOUT_H 0x47
+#define MPU_RA_GYRO_ZOUT_L 0x48
+#define MPU_RA_EXT_SENS_DATA_00 0x49
+#define MPU_RA_MOT_DETECT_STATUS 0x61
+#define MPU_RA_I2C_SLV0_DO 0x63
+#define MPU_RA_I2C_SLV1_DO 0x64
+#define MPU_RA_I2C_SLV2_DO 0x65
+#define MPU_RA_I2C_SLV3_DO 0x66
+#define MPU_RA_I2C_MST_DELAY_CTRL 0x67
+#define MPU_RA_SIGNAL_PATH_RESET 0x68
+#define MPU_RA_MOT_DETECT_CTRL 0x69
+#define MPU_RA_USER_CTRL 0x6A
+#define MPU_RA_PWR_MGMT_1 0x6B
+#define MPU_RA_PWR_MGMT_2 0x6C
+#define MPU_RA_BANK_SEL 0x6D
+#define MPU_RA_MEM_START_ADDR 0x6E
+#define MPU_RA_MEM_R_W 0x6F
+#define MPU_RA_DMP_CFG_1 0x70
+#define MPU_RA_DMP_CFG_2 0x71
+#define MPU_RA_FIFO_COUNTH 0x72
+#define MPU_RA_FIFO_COUNTL 0x73
+#define MPU_RA_FIFO_R_W 0x74
+#define MPU_RA_WHO_AM_I 0x75
+
+// RF = Register Flag
+#define MPU_RF_DATA_RDY_EN (1 << 0)
+
typedef bool (*mpuReadRegisterFunc)(uint8_t reg, uint8_t length, uint8_t* data);
typedef bool (*mpuWriteRegisterFunc)(uint8_t reg, uint8_t data);
diff --git a/src/main/drivers/accgyro_mpu6050.c b/src/main/drivers/accgyro_mpu6050.c
index c235fe5fb8..4c0bfce96f 100644
--- a/src/main/drivers/accgyro_mpu6050.c
+++ b/src/main/drivers/accgyro_mpu6050.c
@@ -48,100 +48,6 @@ extern uint8_t mpuLowPassFilter;
#define DMP_MEM_START_ADDR 0x6E
#define DMP_MEM_R_W 0x6F
-// RA = Register Address
-
-#define MPU_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD
-#define MPU_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD
-#define MPU_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD
-#define MPU_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN
-#define MPU_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN
-#define MPU_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN
-#define MPU_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS
-#define MPU_RA_XA_OFFS_L_TC 0x07
-#define MPU_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS
-#define MPU_RA_YA_OFFS_L_TC 0x09
-#define MPU_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS
-#define MPU_RA_ZA_OFFS_L_TC 0x0B
-#define MPU_RA_PRODUCT_ID 0x0C // Product ID Register
-#define MPU_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR
-#define MPU_RA_XG_OFFS_USRL 0x14
-#define MPU_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR
-#define MPU_RA_YG_OFFS_USRL 0x16
-#define MPU_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR
-#define MPU_RA_ZG_OFFS_USRL 0x18
-#define MPU_RA_SMPLRT_DIV 0x19
-#define MPU_RA_CONFIG 0x1A
-#define MPU_RA_GYRO_CONFIG 0x1B
-#define MPU_RA_ACCEL_CONFIG 0x1C
-#define MPU_RA_FF_THR 0x1D
-#define MPU_RA_FF_DUR 0x1E
-#define MPU_RA_MOT_THR 0x1F
-#define MPU_RA_MOT_DUR 0x20
-#define MPU_RA_ZRMOT_THR 0x21
-#define MPU_RA_ZRMOT_DUR 0x22
-#define MPU_RA_FIFO_EN 0x23
-#define MPU_RA_I2C_MST_CTRL 0x24
-#define MPU_RA_I2C_SLV0_ADDR 0x25
-#define MPU_RA_I2C_SLV0_REG 0x26
-#define MPU_RA_I2C_SLV0_CTRL 0x27
-#define MPU_RA_I2C_SLV1_ADDR 0x28
-#define MPU_RA_I2C_SLV1_REG 0x29
-#define MPU_RA_I2C_SLV1_CTRL 0x2A
-#define MPU_RA_I2C_SLV2_ADDR 0x2B
-#define MPU_RA_I2C_SLV2_REG 0x2C
-#define MPU_RA_I2C_SLV2_CTRL 0x2D
-#define MPU_RA_I2C_SLV3_ADDR 0x2E
-#define MPU_RA_I2C_SLV3_REG 0x2F
-#define MPU_RA_I2C_SLV3_CTRL 0x30
-#define MPU_RA_I2C_SLV4_ADDR 0x31
-#define MPU_RA_I2C_SLV4_REG 0x32
-#define MPU_RA_I2C_SLV4_DO 0x33
-#define MPU_RA_I2C_SLV4_CTRL 0x34
-#define MPU_RA_I2C_SLV4_DI 0x35
-#define MPU_RA_I2C_MST_STATUS 0x36
-#define MPU_RA_INT_PIN_CFG 0x37
-#define MPU_RA_INT_ENABLE 0x38
-#define MPU_RA_DMP_INT_STATUS 0x39
-#define MPU_RA_INT_STATUS 0x3A
-#define MPU_RA_ACCEL_XOUT_H 0x3B
-#define MPU_RA_ACCEL_XOUT_L 0x3C
-#define MPU_RA_ACCEL_YOUT_H 0x3D
-#define MPU_RA_ACCEL_YOUT_L 0x3E
-#define MPU_RA_ACCEL_ZOUT_H 0x3F
-#define MPU_RA_ACCEL_ZOUT_L 0x40
-#define MPU_RA_TEMP_OUT_H 0x41
-#define MPU_RA_TEMP_OUT_L 0x42
-#define MPU_RA_GYRO_XOUT_H 0x43
-#define MPU_RA_GYRO_XOUT_L 0x44
-#define MPU_RA_GYRO_YOUT_H 0x45
-#define MPU_RA_GYRO_YOUT_L 0x46
-#define MPU_RA_GYRO_ZOUT_H 0x47
-#define MPU_RA_GYRO_ZOUT_L 0x48
-#define MPU_RA_EXT_SENS_DATA_00 0x49
-#define MPU_RA_MOT_DETECT_STATUS 0x61
-#define MPU_RA_I2C_SLV0_DO 0x63
-#define MPU_RA_I2C_SLV1_DO 0x64
-#define MPU_RA_I2C_SLV2_DO 0x65
-#define MPU_RA_I2C_SLV3_DO 0x66
-#define MPU_RA_I2C_MST_DELAY_CTRL 0x67
-#define MPU_RA_SIGNAL_PATH_RESET 0x68
-#define MPU_RA_MOT_DETECT_CTRL 0x69
-#define MPU_RA_USER_CTRL 0x6A
-#define MPU_RA_PWR_MGMT_1 0x6B
-#define MPU_RA_PWR_MGMT_2 0x6C
-#define MPU_RA_BANK_SEL 0x6D
-#define MPU_RA_MEM_START_ADDR 0x6E
-#define MPU_RA_MEM_R_W 0x6F
-#define MPU_RA_DMP_CFG_1 0x70
-#define MPU_RA_DMP_CFG_2 0x71
-#define MPU_RA_FIFO_COUNTH 0x72
-#define MPU_RA_FIFO_COUNTL 0x73
-#define MPU_RA_FIFO_R_W 0x74
-#define MPU_RA_WHO_AM_I 0x75
-
-// RF = Register Flag
-#define MPU_RF_DATA_RDY_EN (1 << 0)
-
#define MPU6050_SMPLRT_DIV 0 // 8000Hz
static void mpu6050AccInit(void);
diff --git a/src/main/drivers/accgyro_mpu6500.c b/src/main/drivers/accgyro_mpu6500.c
index 5d15a4503c..8a2ccc6ad7 100644
--- a/src/main/drivers/accgyro_mpu6500.c
+++ b/src/main/drivers/accgyro_mpu6500.c
@@ -88,22 +88,22 @@ void mpu6500GyroInit(uint16_t lpf)
uint8_t mpuLowPassFilter = determineMPULPF(lpf);
- mpuConfiguration.write(MPU6500_RA_PWR_MGMT_1, MPU6500_BIT_RESET);
+ mpuConfiguration.write(MPU_RA_PWR_MGMT_1, MPU6500_BIT_RESET);
delay(100);
- mpuConfiguration.write(MPU6500_RA_SIGNAL_PATH_RST, 0x07);
+ mpuConfiguration.write(MPU_RA_SIGNAL_PATH_RESET, 0x07);
delay(100);
- mpuConfiguration.write(MPU6500_RA_PWR_MGMT_1, 0);
+ mpuConfiguration.write(MPU_RA_PWR_MGMT_1, 0);
delay(100);
- mpuConfiguration.write(MPU6500_RA_PWR_MGMT_1, INV_CLK_PLL);
- mpuConfiguration.write(MPU6500_RA_GYRO_CFG, INV_FSR_2000DPS << 3);
- mpuConfiguration.write(MPU6500_RA_ACCEL_CFG, INV_FSR_8G << 3);
- mpuConfiguration.write(MPU6500_RA_LPF, mpuLowPassFilter);
- mpuConfiguration.write(MPU6500_RA_RATE_DIV, 0); // 1kHz S/R
+ mpuConfiguration.write(MPU_RA_PWR_MGMT_1, INV_CLK_PLL);
+ mpuConfiguration.write(MPU_RA_GYRO_CONFIG, INV_FSR_2000DPS << 3);
+ mpuConfiguration.write(MPU_RA_ACCEL_CONFIG, INV_FSR_8G << 3);
+ mpuConfiguration.write(MPU_RA_CONFIG, mpuLowPassFilter);
+ mpuConfiguration.write(MPU_RA_SMPLRT_DIV, 0); // 1kHz S/R
// Data ready interrupt configuration
- mpuConfiguration.write(MPU6500_RA_INT_PIN_CFG, 0 << 7 | 0 << 6 | 0 << 5 | 1 << 4 | 0 << 3 | 0 << 2 | 1 << 1 | 0 << 0); // INT_ANYRD_2CLEAR, BYPASS_EN
+ mpuConfiguration.write(MPU_RA_INT_PIN_CFG, 0 << 7 | 0 << 6 | 0 << 5 | 1 << 4 | 0 << 3 | 0 << 2 | 1 << 1 | 0 << 0); // INT_ANYRD_2CLEAR, BYPASS_EN
#ifdef USE_MPU_DATA_READY_SIGNAL
- mpuConfiguration.write(MPU6500_RA_INT_ENABLE, 0x01); // RAW_RDY_EN interrupt enable
+ mpuConfiguration.write(MPU_RA_INT_ENABLE, 0x01); // RAW_RDY_EN interrupt enable
#endif
}
diff --git a/src/main/drivers/accgyro_mpu6500.h b/src/main/drivers/accgyro_mpu6500.h
index fbd3245e2e..0c64cfa160 100644
--- a/src/main/drivers/accgyro_mpu6500.h
+++ b/src/main/drivers/accgyro_mpu6500.h
@@ -15,22 +15,6 @@
* along with Cleanflight. If not, see .
*/
-#define MPU6500_RA_RATE_DIV (0x19)
-#define MPU6500_RA_LPF (0x1A)
-#define MPU6500_RA_GYRO_CFG (0x1B)
-#define MPU6500_RA_ACCEL_CFG (0x1C)
-#define MPU6500_RA_ACCEL_XOUT_H (0x3B)
-#define MPU6500_RA_INT_PIN_CFG (0x37)
-#define MPU6500_RA_INT_ENABLE (0x38)
-#define MPU6500_RA_GYRO_XOUT_H (0x43)
-#define MPU6500_RA_SIGNAL_PATH_RST (0x68)
-#define MPU6500_RA_USER_CTRL (0x6A)
-#define MPU6500_RA_PWR_MGMT_1 (0x6B)
-#define MPU6500_RA_BANK_SEL (0x6D)
-#define MPU6500_RA_MEM_RW (0x6F)
-#define MPU6500_RA_WHOAMI (0x75)
-#define MPU6500_RA_XA_OFFS_H (0x77)
-
#define MPU6500_WHO_AM_I_CONST (0x70)
#define MPU6500_BIT_RESET (0x80)
diff --git a/src/main/drivers/accgyro_spi_mpu6000.c b/src/main/drivers/accgyro_spi_mpu6000.c
index 177b646e7b..b216975aae 100644
--- a/src/main/drivers/accgyro_spi_mpu6000.c
+++ b/src/main/drivers/accgyro_spi_mpu6000.c
@@ -122,6 +122,8 @@ bool mpu6000ReadRegister(uint8_t reg, uint8_t length, uint8_t *data)
void mpu6000SpiGyroInit(uint16_t lpf)
{
+ mpuIntExtiInit();
+
uint8_t mpuLowPassFilter = determineMPULPF(lpf);
mpu6000AccAndGyroInit();
@@ -145,6 +147,8 @@ void mpu6000SpiGyroInit(uint16_t lpf)
void mpu6000SpiAccInit(void)
{
+ mpuIntExtiInit();
+
acc_1G = 512 * 8;
}
@@ -155,12 +159,12 @@ bool mpu6000SpiDetect(void)
spiSetDivisor(MPU6000_SPI_INSTANCE, SPI_0_5625MHZ_CLOCK_DIVIDER);
- mpu6000WriteRegister(MPU6000_PWR_MGMT_1, BIT_H_RESET);
+ mpu6000WriteRegister(MPU_RA_PWR_MGMT_1, BIT_H_RESET);
do {
delay(150);
- mpu6000ReadRegister(MPU6000_WHOAMI, 1, &in);
+ mpu6000ReadRegister(MPU_RA_WHO_AM_I, 1, &in);
if (in == MPU6000_WHO_AM_I_CONST) {
break;
}
@@ -170,7 +174,7 @@ bool mpu6000SpiDetect(void)
} while (attemptsRemaining--);
- mpu6000ReadRegister(MPU6000_PRODUCT_ID, 1, &in);
+ mpu6000ReadRegister(MPU_RA_PRODUCT_ID, 1, &in);
/* look for a product ID we recognise */
@@ -203,36 +207,45 @@ static void mpu6000AccAndGyroInit(void) {
spiSetDivisor(MPU6000_SPI_INSTANCE, SPI_0_5625MHZ_CLOCK_DIVIDER);
// Device Reset
- mpu6000WriteRegister(MPU6000_PWR_MGMT_1, BIT_H_RESET);
+ mpu6000WriteRegister(MPU_RA_PWR_MGMT_1, BIT_H_RESET);
delay(150);
- mpu6000WriteRegister(MPU6000_SIGNAL_PATH_RESET, BIT_GYRO | BIT_ACC | BIT_TEMP);
+ mpu6000WriteRegister(MPU_RA_SIGNAL_PATH_RESET, BIT_GYRO | BIT_ACC | BIT_TEMP);
delay(150);
// Clock Source PPL with Z axis gyro reference
- mpu6000WriteRegister(MPU6000_PWR_MGMT_1, MPU_CLK_SEL_PLLGYROZ);
+ mpu6000WriteRegister(MPU_RA_PWR_MGMT_1, MPU_CLK_SEL_PLLGYROZ);
delayMicroseconds(1);
// Disable Primary I2C Interface
- mpu6000WriteRegister(MPU6000_USER_CTRL, BIT_I2C_IF_DIS);
+ mpu6000WriteRegister(MPU_RA_USER_CTRL, BIT_I2C_IF_DIS);
delayMicroseconds(1);
- mpu6000WriteRegister(MPU6000_PWR_MGMT_2, 0x00);
+ mpu6000WriteRegister(MPU_RA_PWR_MGMT_2, 0x00);
delayMicroseconds(1);
// Accel Sample Rate 1kHz
// Gyroscope Output Rate = 1kHz when the DLPF is enabled
- mpu6000WriteRegister(MPU6000_SMPLRT_DIV, 0x00);
- delayMicroseconds(1);
-
- // Accel +/- 8 G Full Scale
- mpu6000WriteRegister(MPU6000_ACCEL_CONFIG, BITS_FS_8G);
+ mpu6000WriteRegister(MPU_RA_SMPLRT_DIV, 0x00);
delayMicroseconds(1);
// Gyro +/- 1000 DPS Full Scale
- mpu6000WriteRegister(MPU6000_GYRO_CONFIG, BITS_FS_2000DPS);
+ mpu6000WriteRegister(MPU_RA_GYRO_CONFIG, INV_FSR_2000DPS << 3);
delayMicroseconds(1);
+ // Accel +/- 8 G Full Scale
+ mpu6000WriteRegister(MPU_RA_ACCEL_CONFIG, INV_FSR_8G << 3);
+ delayMicroseconds(1);
+
+
+ mpu6000WriteRegister(MPU_RA_INT_PIN_CFG, 0 << 7 | 0 << 6 | 0 << 5 | 1 << 4 | 0 << 3 | 0 << 2 | 0 << 1 | 0 << 0); // INT_ANYRD_2CLEAR
+ delayMicroseconds(1);
+
+#ifdef USE_MPU_DATA_READY_SIGNAL
+ mpu6000WriteRegister(MPU_RA_INT_ENABLE, MPU_RF_DATA_RDY_EN);
+ delayMicroseconds(1);
+#endif
+
spiSetDivisor(MPU6000_SPI_INSTANCE, SPI_18MHZ_CLOCK_DIVIDER); // 18 MHz SPI clock
mpuSpi6000InitDone = true;
diff --git a/src/main/drivers/accgyro_spi_mpu6000.h b/src/main/drivers/accgyro_spi_mpu6000.h
index ecadc23c7f..01f6870d53 100644
--- a/src/main/drivers/accgyro_spi_mpu6000.h
+++ b/src/main/drivers/accgyro_spi_mpu6000.h
@@ -3,38 +3,6 @@
#define MPU6000_CONFIG 0x1A
-// Registers
-#define MPU6000_PRODUCT_ID 0x0C
-#define MPU6000_SMPLRT_DIV 0x19
-#define MPU6000_GYRO_CONFIG 0x1B
-#define MPU6000_ACCEL_CONFIG 0x1C
-#define MPU6000_FIFO_EN 0x23
-#define MPU6000_INT_PIN_CFG 0x37
-#define MPU6000_INT_ENABLE 0x38
-#define MPU6000_INT_STATUS 0x3A
-#define MPU6000_ACCEL_XOUT_H 0x3B
-#define MPU6000_ACCEL_XOUT_L 0x3C
-#define MPU6000_ACCEL_YOUT_H 0x3D
-#define MPU6000_ACCEL_YOUT_L 0x3E
-#define MPU6000_ACCEL_ZOUT_H 0x3F
-#define MPU6000_ACCEL_ZOUT_L 0x40
-#define MPU6000_TEMP_OUT_H 0x41
-#define MPU6000_TEMP_OUT_L 0x42
-#define MPU6000_GYRO_XOUT_H 0x43
-#define MPU6000_GYRO_XOUT_L 0x44
-#define MPU6000_GYRO_YOUT_H 0x45
-#define MPU6000_GYRO_YOUT_L 0x46
-#define MPU6000_GYRO_ZOUT_H 0x47
-#define MPU6000_GYRO_ZOUT_L 0x48
-#define MPU6000_USER_CTRL 0x6A
-#define MPU6000_SIGNAL_PATH_RESET 0x68
-#define MPU6000_PWR_MGMT_1 0x6B
-#define MPU6000_PWR_MGMT_2 0x6C
-#define MPU6000_FIFO_COUNTH 0x72
-#define MPU6000_FIFO_COUNTL 0x73
-#define MPU6000_FIFO_R_W 0x74
-#define MPU6000_WHOAMI 0x75
-
#define BITS_DLPF_CFG_256HZ 0x00
#define BITS_DLPF_CFG_188HZ 0x01
#define BITS_DLPF_CFG_98HZ 0x02
diff --git a/src/main/drivers/accgyro_spi_mpu6500.c b/src/main/drivers/accgyro_spi_mpu6500.c
index faafd69a5d..b464e5dc4d 100755
--- a/src/main/drivers/accgyro_spi_mpu6500.c
+++ b/src/main/drivers/accgyro_spi_mpu6500.c
@@ -105,7 +105,7 @@ bool mpu6500SpiDetect(void)
mpu6500SpiInit();
- mpu6500ReadRegister(MPU6500_RA_WHOAMI, 1, &tmp);
+ mpu6500ReadRegister(MPU_RA_WHO_AM_I, 1, &tmp);
if (tmp != MPU6500_WHO_AM_I_CONST)
return false;
diff --git a/src/main/drivers/barometer_bmp085.c b/src/main/drivers/barometer_bmp085.c
index a46b8f20c4..ee6f4da62f 100644
--- a/src/main/drivers/barometer_bmp085.c
+++ b/src/main/drivers/barometer_bmp085.c
@@ -169,7 +169,7 @@ bool bmp085Detect(const bmp085Config_t *config, baro_t *baro)
gpioInit(config->eocGpioPort, &gpio);
BMP085_ON;
- registerExti15_10_CallbackHandler(BMP085_EOC_EXTI_Handler);
+ registerExtiCallbackHandler(EXTI15_10_IRQn, BMP085_EOC_EXTI_Handler);
// EXTI interrupt for barometer EOC
gpioExtiLineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource14);
@@ -224,7 +224,7 @@ bool bmp085Detect(const bmp085Config_t *config, baro_t *baro)
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
EXTI_Init(&EXTI_InitStructure);
- unregisterExti15_10_CallbackHandler(BMP085_EOC_EXTI_Handler);
+ unregisterExtiCallbackHandler(EXTI15_10_IRQn, BMP085_EOC_EXTI_Handler);
#endif
BMP085_OFF;
diff --git a/src/main/drivers/compass_hmc5883l.c b/src/main/drivers/compass_hmc5883l.c
index 6911034a7d..0f34be0a75 100644
--- a/src/main/drivers/compass_hmc5883l.c
+++ b/src/main/drivers/compass_hmc5883l.c
@@ -176,7 +176,7 @@ static void hmc5883lConfigureDataReadyInterruptHandling(void)
}
#endif
- registerExti15_10_CallbackHandler(MAG_DATA_READY_EXTI_Handler);
+ registerExtiCallbackHandler(hmc5883Config->exti_irqn, MAG_DATA_READY_EXTI_Handler);
EXTI_ClearITPendingBit(hmc5883Config->exti_line);
diff --git a/src/main/drivers/system.c b/src/main/drivers/system.c
index 0f99b1bec8..2377d69d55 100644
--- a/src/main/drivers/system.c
+++ b/src/main/drivers/system.c
@@ -31,45 +31,61 @@
#include "system.h"
-
-#ifndef EXTI15_10_CALLBACK_HANDLER_COUNT
-#define EXTI15_10_CALLBACK_HANDLER_COUNT 1
+#ifndef EXTI_CALLBACK_HANDLER_COUNT
+#define EXTI_CALLBACK_HANDLER_COUNT 1
#endif
-static extiCallbackHandler* exti15_10_handlers[EXTI15_10_CALLBACK_HANDLER_COUNT];
+typedef struct extiCallbackHandlerConfig_s {
+ IRQn_Type irqn;
+ extiCallbackHandlerFunc* fn;
+} extiCallbackHandlerConfig_t;
-void registerExti15_10_CallbackHandler(extiCallbackHandler *fn)
+static extiCallbackHandlerConfig_t extiHandlerConfigs[EXTI_CALLBACK_HANDLER_COUNT];
+
+void registerExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn)
{
- for (int index = 0; index < EXTI15_10_CALLBACK_HANDLER_COUNT; index++) {
- extiCallbackHandler *candidate = exti15_10_handlers[index];
- if (!candidate) {
- exti15_10_handlers[index] = fn;
+ for (int index = 0; index < EXTI_CALLBACK_HANDLER_COUNT; index++) {
+ extiCallbackHandlerConfig_t *candidate = &extiHandlerConfigs[index];
+ if (!candidate->fn) {
+ candidate->fn = fn;
+ candidate->irqn = irqn;
return;
}
}
- failureMode(FAILURE_DEVELOPER); // EXTI15_10_CALLBACK_HANDLER_COUNT is too low for the amount of handlers required.
+ failureMode(FAILURE_DEVELOPER); // EXTI_CALLBACK_HANDLER_COUNT is too low for the amount of handlers required.
}
-void unregisterExti15_10_CallbackHandler(extiCallbackHandler *fn)
+void unregisterExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn)
{
- for (int index = 0; index < EXTI15_10_CALLBACK_HANDLER_COUNT; index++) {
- extiCallbackHandler *candidate = exti15_10_handlers[index];
- if (candidate == fn) {
- exti15_10_handlers[index] = 0;
+ for (int index = 0; index < EXTI_CALLBACK_HANDLER_COUNT; index++) {
+ extiCallbackHandlerConfig_t *candidate = &extiHandlerConfigs[index];
+ if (candidate->fn == fn && candidate->irqn == irqn) {
+ candidate->fn = NULL;
+ candidate->irqn = 0;
return;
}
}
}
+static void extiHandler(IRQn_Type irqn)
+{
+ for (int index = 0; index < EXTI_CALLBACK_HANDLER_COUNT; index++) {
+ extiCallbackHandlerConfig_t *candidate = &extiHandlerConfigs[index];
+ if (candidate->fn && candidate->irqn == irqn) {
+ candidate->fn();
+ }
+ }
+
+}
+
void EXTI15_10_IRQHandler(void)
{
- for (int index = 0; index < EXTI15_10_CALLBACK_HANDLER_COUNT; index++) {
- extiCallbackHandler *fn = exti15_10_handlers[index];
- if (!fn) {
- continue;
- }
- fn();
- }
+ extiHandler(EXTI15_10_IRQn);
+}
+
+void EXTI3_IRQHandler(void)
+{
+ extiHandler(EXTI3_IRQn);
}
// cycles per microsecond
@@ -149,7 +165,7 @@ void systemInit(void)
cycleCounterInit();
- memset(&exti15_10_handlers, 0x00, sizeof(exti15_10_handlers));
+ memset(extiHandlerConfigs, 0x00, sizeof(extiHandlerConfigs));
// SysTick
SysTick_Config(SystemCoreClock / 1000);
}
diff --git a/src/main/drivers/system.h b/src/main/drivers/system.h
index 65d0f18a70..b92e6ffce9 100644
--- a/src/main/drivers/system.h
+++ b/src/main/drivers/system.h
@@ -36,10 +36,10 @@ void enableGPIOPowerUsageAndNoiseReductions(void);
// current crystal frequency - 8 or 12MHz
extern uint32_t hse_value;
-typedef void extiCallbackHandler(void);
+typedef void extiCallbackHandlerFunc(void);
-void registerExti15_10_CallbackHandler(extiCallbackHandler *fn);
-void unregisterExti15_10_CallbackHandler(extiCallbackHandler *fn);
+void registerExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn);
+void unregisterExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn);
extern uint32_t cachedRccCsrValue;
diff --git a/src/main/flight/failsafe.c b/src/main/flight/failsafe.c
index 037c424140..c6659ca386 100644
--- a/src/main/flight/failsafe.c
+++ b/src/main/flight/failsafe.c
@@ -18,6 +18,8 @@
#include
#include
+#include "platform.h"
+
#include "debug.h"
#include "common/axis.h"
diff --git a/src/main/sensors/battery.c b/src/main/sensors/battery.c
index 58c4a77748..7419eded90 100644
--- a/src/main/sensors/battery.c
+++ b/src/main/sensors/battery.c
@@ -18,6 +18,8 @@
#include "stdbool.h"
#include "stdint.h"
+#include "platform.h"
+
#include "common/maths.h"
#include "drivers/adc.h"
diff --git a/src/main/sensors/initialisation.c b/src/main/sensors/initialisation.c
index f1dc527917..1b7d691035 100755
--- a/src/main/sensors/initialisation.c
+++ b/src/main/sensors/initialisation.c
@@ -124,6 +124,19 @@ const extiConfig_t *selectMPUIntExtiConfig(void)
return &spRacingF3MPUIntExtiConfig;
#endif
+#if defined(CC3D)
+ static const extiConfig_t cc3dMPUIntExtiConfig = {
+ .gpioAPB2Peripherals = RCC_APB2Periph_GPIOA,
+ .gpioPort = GPIOA,
+ .gpioPin = Pin_3,
+ .exti_port_source = GPIO_PortSourceGPIOA,
+ .exti_pin_source = GPIO_PinSource3,
+ .exti_line = EXTI_Line3,
+ .exti_irqn = EXTI3_IRQn
+ };
+ return &cc3dMPUIntExtiConfig;
+#endif
+
return NULL;
}
diff --git a/src/main/target/CC3D/target.h b/src/main/target/CC3D/target.h
index 16f7080a1f..ddc67a5dad 100644
--- a/src/main/target/CC3D/target.h
+++ b/src/main/target/CC3D/target.h
@@ -44,6 +44,9 @@
#define USABLE_TIMER_CHANNEL_COUNT 12
+#define DEBUG_MPU_DATA_READY_INTERRUPT
+#define USE_MPU_DATA_READY_SIGNAL
+
#define GYRO
#define USE_GYRO_SPI_MPU6000
diff --git a/src/main/target/NAZE/hardware_revision.c b/src/main/target/NAZE/hardware_revision.c
index 26ade1a333..4f268289a8 100755
--- a/src/main/target/NAZE/hardware_revision.c
+++ b/src/main/target/NAZE/hardware_revision.c
@@ -26,7 +26,9 @@
#include "drivers/system.h"
#include "drivers/bus_spi.h"
#include "drivers/sensor.h"
+#include "drivers/exti.h"
#include "drivers/accgyro.h"
+#include "drivers/accgyro_mpu.h"
#include "drivers/accgyro_mpu6500.h"
#include "hardware_revision.h"
@@ -80,7 +82,7 @@ uint8_t detectSpiDevice(void)
// try autodetect MPU
delay(50);
ENABLE_SPI_CS;
- spiTransferByte(NAZE_SPI_INSTANCE, MPU6500_RA_WHOAMI | MPU6500_BIT_RESET);
+ spiTransferByte(NAZE_SPI_INSTANCE, MPU_RA_WHO_AM_I | MPU6500_BIT_RESET);
in[0] = spiTransferByte(NAZE_SPI_INSTANCE, 0xff);
DISABLE_SPI_CS;
diff --git a/src/main/target/NAZE/target.h b/src/main/target/NAZE/target.h
index 836ce7aab3..10423c5a01 100644
--- a/src/main/target/NAZE/target.h
+++ b/src/main/target/NAZE/target.h
@@ -73,7 +73,7 @@
#define USE_FLASH_M25P16
-#define EXTI15_10_CALLBACK_HANDLER_COUNT 3 // MPU data ready, MAG data ready, BMP085 EOC
+#define EXTI_CALLBACK_HANDLER_COUNT 3 // MPU data ready, MAG data ready, BMP085 EOC
//#define DEBUG_MPU_DATA_READY_INTERRUPT
#define USE_MPU_DATA_READY_SIGNAL
diff --git a/src/main/target/RMDO/target.h b/src/main/target/RMDO/target.h
index 652a46e10b..faccf9b806 100644
--- a/src/main/target/RMDO/target.h
+++ b/src/main/target/RMDO/target.h
@@ -30,7 +30,7 @@
#define USABLE_TIMER_CHANNEL_COUNT 17
-#define EXTI15_10_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
+#define EXTI_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
#define USE_MPU_DATA_READY_SIGNAL
#define ENSURE_MPU_DATA_READY_IS_LOW
diff --git a/src/main/target/SPRACINGF3/target.h b/src/main/target/SPRACINGF3/target.h
index 9ed3d3ccac..fdb0a082ab 100644
--- a/src/main/target/SPRACINGF3/target.h
+++ b/src/main/target/SPRACINGF3/target.h
@@ -30,7 +30,7 @@
#define USABLE_TIMER_CHANNEL_COUNT 17
-#define EXTI15_10_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
+#define EXTI_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
#define USE_MPU_DATA_READY_SIGNAL
#define ENSURE_MPU_DATA_READY_IS_LOW