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Bringing F4 targets into line with F1 and F3 for linker and startup files.

This commit is contained in:
blckmn 2016-08-27 09:27:29 +10:00
parent dec269ea19
commit a01c22d7cb
7 changed files with 27 additions and 653 deletions

View file

@ -65,7 +65,6 @@ const char * const resourceNames[RESOURCE_TOTAL_COUNT] = {
"SDA", "SCK","MOSI","MISO","CS","BATTERY","RSSI","EXT","CURRENT" "SDA", "SCK","MOSI","MISO","CS","BATTERY","RSSI","EXT","CURRENT"
}; };
ioRec_t* IO_Rec(IO_t io) ioRec_t* IO_Rec(IO_t io)
{ {
return io; return io;

View file

@ -44,7 +44,6 @@
.global g_pfnVectors .global g_pfnVectors
.global Default_Handler .global Default_Handler
.global irq_stack
/* start address for the initialization values of the .data section. /* start address for the initialization values of the .data section.
defined in linker script */ defined in linker script */
@ -68,7 +67,7 @@ defined in linker script */
* @retval : None * @retval : None
*/ */
.section .text.Reset_Handler .section .text.Reset_Handler
.weak Reset_Handler .weak Reset_Handler
.type Reset_Handler, %function .type Reset_Handler, %function
Reset_Handler: Reset_Handler:
@ -147,22 +146,18 @@ Infinite_Loop:
.size Default_Handler, .-Default_Handler .size Default_Handler, .-Default_Handler
/****************************************************************************** /******************************************************************************
* *
* The minimal vector table for a Cortex M3. Note that the proper constructs * The minimal vector table for a Cortex M4. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address * must be placed on this to ensure that it ends up at physical address
* 0x0000.0000. * 0x0000.0000.
* *
*******************************************************************************/ *******************************************************************************/
.section .irqstack,"aw",%progbits
irq_stack:
.space 1024
.section .isr_vector,"a",%progbits .section .isr_vector,"a",%progbits
.type g_pfnVectors, %object .type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors .size g_pfnVectors, .-g_pfnVectors
g_pfnVectors: g_pfnVectors:
.word irq_stack+1024 .word _estack
.word Reset_Handler .word Reset_Handler
.word NMI_Handler .word NMI_Handler
.word HardFault_Handler .word HardFault_Handler

View file

@ -44,7 +44,6 @@
.global g_pfnVectors .global g_pfnVectors
.global Default_Handler .global Default_Handler
.global irq_stack
/* start address for the initialization values of the .data section. /* start address for the initialization values of the .data section.
defined in linker script */ defined in linker script */
@ -68,7 +67,7 @@ defined in linker script */
* @retval : None * @retval : None
*/ */
.section .text.Reset_Handler .section .text.Reset_Handler
.weak Reset_Handler .weak Reset_Handler
.type Reset_Handler, %function .type Reset_Handler, %function
Reset_Handler: Reset_Handler:
@ -146,22 +145,18 @@ Infinite_Loop:
.size Default_Handler, .-Default_Handler .size Default_Handler, .-Default_Handler
/****************************************************************************** /******************************************************************************
* *
* The minimal vector table for a Cortex M3. Note that the proper constructs * The minimal vector table for a Cortex M4. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address * must be placed on this to ensure that it ends up at physical address
* 0x0000.0000. * 0x0000.0000.
* *
*******************************************************************************/ *******************************************************************************/
.section .irqstack,"aw",%progbits
irq_stack:
.space 1024
.section .isr_vector,"a",%progbits .section .isr_vector,"a",%progbits
.type g_pfnVectors, %object .type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors .size g_pfnVectors, .-g_pfnVectors
g_pfnVectors: g_pfnVectors:
.word irq_stack+1024 .word _estack
.word Reset_Handler .word Reset_Handler
.word NMI_Handler .word NMI_Handler
.word HardFault_Handler .word HardFault_Handler

View file

@ -1,30 +1,10 @@
/* /*
***************************************************************************** *****************************************************************************
** **
** File : stm32_flash.ld ** File : stm32_flash_f405.ld
** **
** Abstract : Linker script for STM32F407VG Device with ** Abstract : Linker script for STM32F405RG Device with
** 1024KByte FLASH, 128KByte RAM ** 1024KByte FLASH, 128KByte RAM 64KByte CCM (RAM)
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Environment : Atollic TrueSTUDIO(R)
**
** Distribution: The file is distributed “as is,” without any warranty
** of any kind.
**
** (c)Copyright Atollic AB.
** You may use this file as-is or modify it according to the needs of your
** project. Distribution of this file (unmodified or modified) is not
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
** rights to distribute the assembled, compiled & linked contents of this
** file as part of an application binary file, provided that it is built
** using the Atollic TrueSTUDIO(R) toolchain.
** **
***************************************************************************** *****************************************************************************
*/ */
@ -32,144 +12,15 @@
/* Entry Point */ /* Entry Point */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Specify the memory areas */ /* Specify the memory areas */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x0e0000 - 0x64 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1M
INFOX (rx) : ORIGIN = 0x08000000 + 0x0e0000 - 0x64, LENGTH = 0x64 RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K BACKUP_SRAM (rwx) : ORIGIN = 0x40024000, LENGTH = 4K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
} }
/* note CCM could be used for stack */
/* Section Definitions */ INCLUDE "stm32_flash.ld"
SECTIONS
{
/* The program code and other data goes into FLASH */
.text :
{
PROVIDE (isr_vector_table_base = .);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = .;
/*
* Place the IRQ/bootstrap stack at the bottom of SRAM so that an overflow
* results in a hard fault.
*/
.istack (NOLOAD) :
{
. = ALIGN(4);
_irq_stack_end = . ;
*(.irqstack)
_irq_stack_top = . ;
} > RAM
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(4);
} >RAM
/* MEMORY_bank1 section, code must be located here explicitly */
/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
.memory_b1_text :
{
*(.mb1text) /* .mb1text sections (code) */
*(.mb1text*) /* .mb1text* sections (code) */
*(.mb1rodata) /* read-only data (constants) */
*(.mb1rodata*)
} >MEMORY_B1
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

View file

@ -1,30 +1,10 @@
/* /*
***************************************************************************** *****************************************************************************
** **
** File : stm32_flash.ld ** File : stm32_flash_f405.ld
** **
** Abstract : Linker script for STM32F407VG Device with ** Abstract : Linker script for STM32F405RG Device with
** 1024KByte FLASH, 128KByte RAM ** 1024KByte FLASH, 128KByte RAM 64KByte CCM (RAM)
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Environment : Atollic TrueSTUDIO(R)
**
** Distribution: The file is distributed “as is,” without any warranty
** of any kind.
**
** (c)Copyright Atollic AB.
** You may use this file as-is or modify it according to the needs of your
** project. Distribution of this file (unmodified or modified) is not
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
** rights to distribute the assembled, compiled & linked contents of this
** file as part of an application binary file, provided that it is built
** using the Atollic TrueSTUDIO(R) toolchain.
** **
***************************************************************************** *****************************************************************************
*/ */
@ -32,10 +12,6 @@
/* Entry Point */ /* Entry Point */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x2000; /* required amount of heap */
_Min_Stack_Size = 0x4000; /* required amount of stack */
/* Specify the memory areas */ /* Specify the memory areas */
/* /*
@ -48,139 +24,9 @@ _Min_Stack_Size = 0x4000; /* required amount of stack */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 0x000A0000 FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 0x000A0000
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x00020000 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x00020000
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
} }
REGION_ALIAS("CCSRAM", CCM); INCLUDE "stm32_flash.ld"
REGION_ALIAS("SRAM", RAM);
/* Section Definitions */
SECTIONS
{
/* The program code and other data goes into FLASH */
.text :
{
PROVIDE (isr_vector_table_base = .);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = .;
/*
* Place the IRQ/bootstrap stack at the bottom of SRAM so that an overflow
* results in a hard fault.
*/
.istack (NOLOAD) :
{
. = ALIGN(4);
_irq_stack_end = . ;
*(.irqstack)
_irq_stack_top = . ;
} > RAM
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(4);
} >RAM
/* MEMORY_bank1 section, code must be located here explicitly */
/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
.memory_b1_text :
{
*(.mb1text) /* .mb1text sections (code) */
*(.mb1text*) /* .mb1text* sections (code) */
*(.mb1rodata) /* read-only data (constants) */
*(.mb1rodata*)
} >MEMORY_B1
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

View file

@ -1,49 +1,24 @@
/* /*
***************************************************************************** *****************************************************************************
** **
** File : stm32_flash.ld ** File : stm32_flash_f411.ld
** **
** Abstract : Linker script for STM32F11 Device with ** Abstract : Linker script for STM32F11 Device with
** 512KByte FLASH, 128KByte RAM ** 512KByte FLASH, 128KByte RAM
** **
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Environment : Atollic TrueSTUDIO(R)
**
** Distribution: The file is distributed “as is,” without any warranty
** of any kind.
**
** (c)Copyright Atollic AB.
** You may use this file as-is or modify it according to the needs of your
** project. Distribution of this file (unmodified or modified) is not
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
** rights to distribute the assembled, compiled & linked contents of this
** file as part of an application binary file, provided that it is built
** using the Atollic TrueSTUDIO(R) toolchain.
**
***************************************************************************** *****************************************************************************
*/ */
/* Entry Point */ /* Entry Point */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x2000; /* required amount of heap */
_Min_Stack_Size = 0x4000; /* required amount of stack */
/* Specify the memory areas */
/* /*
0x08000000 to 0x08080000 512kb full flash, 0x08000000 to 0x08080000 512kb full flash,
0x08000000 to 0x08060000 384kb firmware, 0x08000000 to 0x08060000 384kb firmware,
0x08060000 to 0x08080000 128kb config, 0x08060000 to 0x08080000 128kb config,
*/ */
/* Specify the memory areas */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00080000 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00080000
@ -51,135 +26,4 @@ MEMORY
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
} }
REGION_ALIAS("CCSRAM", RAM); INCLUDE "stm32_flash.ld"
REGION_ALIAS("SRAM", RAM);
/* Section Definitions */
SECTIONS
{
/* The program code and other data goes into FLASH */
.text :
{
PROVIDE (isr_vector_table_base = .);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = .;
/*
* Place the IRQ/bootstrap stack at the bottom of SRAM so that an overflow
* results in a hard fault.
*/
.istack (NOLOAD) :
{
. = ALIGN(4);
_irq_stack_end = . ;
*(.irqstack)
_irq_stack_top = . ;
} > RAM
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(4);
} >RAM
/* MEMORY_bank1 section, code must be located here explicitly */
/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
.memory_b1_text :
{
*(.mb1text) /* .mb1text sections (code) */
*(.mb1text*) /* .mb1text* sections (code) */
*(.mb1rodata) /* read-only data (constants) */
*(.mb1rodata*)
} >MEMORY_B1
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

View file

@ -1,43 +1,17 @@
/* /*
***************************************************************************** *****************************************************************************
** **
** File : stm32_flash.ld ** File : stm32_flash_f411.ld
** **
** Abstract : Linker script for STM32F11 Device with ** Abstract : Linker script for STM32F11 Device with
** 512KByte FLASH, 128KByte RAM ** 512KByte FLASH, 128KByte RAM
** **
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Environment : Atollic TrueSTUDIO(R)
**
** Distribution: The file is distributed “as is,” without any warranty
** of any kind.
**
** (c)Copyright Atollic AB.
** You may use this file as-is or modify it according to the needs of your
** project. Distribution of this file (unmodified or modified) is not
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
** rights to distribute the assembled, compiled & linked contents of this
** file as part of an application binary file, provided that it is built
** using the Atollic TrueSTUDIO(R) toolchain.
**
***************************************************************************** *****************************************************************************
*/ */
/* Entry Point */ /* Entry Point */
ENTRY(Reset_Handler) ENTRY(Reset_Handler)
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x2000; /* required amount of heap */
_Min_Stack_Size = 0x4000; /* required amount of stack */
/* Specify the memory areas */
/* /*
0x08000000 to 0x08080000 512kb full flash, 0x08000000 to 0x08080000 512kb full flash,
0x08000000 to 0x08010000 64kb OPBL, 0x08000000 to 0x08010000 64kb OPBL,
@ -45,6 +19,7 @@ _Min_Stack_Size = 0x4000; /* required amount of stack */
0x08060000 to 0x08080000 128kb config, 0x08060000 to 0x08080000 128kb config,
*/ */
/* Specify the memory areas */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 0x00070000 FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 0x00070000
@ -52,135 +27,4 @@ MEMORY
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
} }
REGION_ALIAS("CCSRAM", RAM); INCLUDE "stm32_flash.ld"
REGION_ALIAS("SRAM", RAM);
/* Section Definitions */
SECTIONS
{
/* The program code and other data goes into FLASH */
.text :
{
PROVIDE (isr_vector_table_base = .);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = .;
/*
* Place the IRQ/bootstrap stack at the bottom of SRAM so that an overflow
* results in a hard fault.
*/
.istack (NOLOAD) :
{
. = ALIGN(4);
_irq_stack_end = . ;
*(.irqstack)
_irq_stack_top = . ;
} > RAM
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(4);
} >RAM
/* MEMORY_bank1 section, code must be located here explicitly */
/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
.memory_b1_text :
{
*(.mb1text) /* .mb1text sections (code) */
*(.mb1text*) /* .mb1text* sections (code) */
*(.mb1rodata) /* read-only data (constants) */
*(.mb1rodata*)
} >MEMORY_B1
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}