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add gd32f4 src, platform support
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84 changed files with 16082 additions and 19 deletions
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@ -35,7 +35,7 @@
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#include "drivers/system.h"
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(AT32F4) || defined(APM32F4)
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(AT32F4) || defined(APM32F4) || defined(GD32F4)
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// See "RM CoreSight Architecture Specification"
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// B2.3.10 "LSR and LAR, Software Lock Status Register and Software Lock Access Register"
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// "E1.2.11 LAR, Lock Access Register"
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@ -62,6 +62,8 @@ void cycleCounterInit(void)
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crm_clocks_freq_type clocks;
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crm_clocks_freq_get(&clocks);
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cpuClockFrequency = clocks.sclk_freq;
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#elif defined(USE_GDBSP_DRIVER)
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cpuClockFrequency = rcu_clock_freq_get(CK_SYS);
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#else
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RCC_ClocksTypeDef clocks;
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RCC_GetClocksFreq(&clocks);
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@ -73,7 +75,7 @@ void cycleCounterInit(void)
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CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
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#if defined(DWT_LAR_UNLOCK_VALUE)
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#if defined(STM32H7) || defined(AT32F4)
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#if defined(STM32H7) || defined(AT32F4) || defined(GD32F4)
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ITM->LAR = DWT_LAR_UNLOCK_VALUE;
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#elif defined(STM32F7)
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DWT->LAR = DWT_LAR_UNLOCK_VALUE;
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@ -366,6 +368,10 @@ const mcuTypeInfo_t *getMcuTypeInfo(void)
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{ .id = MCU_TYPE_APM32F405, .name = "APM32F405" },
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#elif defined(APM32F407)
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{ .id = MCU_TYPE_APM32F407, .name = "APM32F407" },
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#elif defined(GD32F425)
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{ .id = MCU_TYPE_GD32F425, .name = "GD32F425" },
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#elif defined(GD32F460)
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{ .id = MCU_TYPE_GD32F460, .name = "GD32F460" },
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#else
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#error MCU Type info not defined for STM (or clone)
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#endif
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