diff --git a/src/main/drivers/pwm_output.h b/src/main/drivers/pwm_output.h
index dff5a5d499..4452746188 100644
--- a/src/main/drivers/pwm_output.h
+++ b/src/main/drivers/pwm_output.h
@@ -111,7 +111,11 @@ typedef struct {
     TIM_TypeDef *timer;
 #if defined(USE_DSHOT_DMAR)
 #if !defined(USE_HAL_DRIVER)
+#ifdef STM32F3
+    DMA_Channel_TypeDef *dmaBurstRef;
+#else
     DMA_Stream_TypeDef *dmaBurstRef;
+#endif
     uint16_t dmaBurstLength;
 #endif
     uint32_t dmaBurstBuffer[DSHOT_DMA_BUFFER_SIZE * 4];
diff --git a/src/main/drivers/pwm_output_dshot.c b/src/main/drivers/pwm_output_dshot.c
index b9b0d57252..50b1e05e9a 100644
--- a/src/main/drivers/pwm_output_dshot.c
+++ b/src/main/drivers/pwm_output_dshot.c
@@ -119,16 +119,16 @@ static void motor_DMA_IRQHandler(dmaChannelDescriptor_t *descriptor)
 
 void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t motorIndex, motorPwmProtocolTypes_e pwmProtocolType, uint8_t output)
 {
-#if defined(STM32F3)
-    DMA_Channel_TypeDef *dmaRef = timerHardware->dmaRef;
-#elif defined(STM32F4)
-#ifdef USE_DSHOT_DMAR
-    DMA_Stream_TypeDef *dmaRef = timerHardware->dmaTimUPRef;
+#if defined(STM32F4) || defined(STM32F7)
+    typedef DMA_Stream_TypeDef dmaStream_t;
 #else
-    DMA_Stream_TypeDef *dmaRef = timerHardware->dmaRef;
+    typedef DMA_Channel_TypeDef dmaStream_t;
 #endif
+
+#ifdef USE_DSHOT_DMAR
+    dmaStream_t *dmaRef = timerHardware->dmaTimUPRef;
 #else
-#error "No MCU specified in DSHOT"
+    dmaStream_t *dmaRef = timerHardware->dmaRef;
 #endif
 
     if (dmaRef == NULL) {
@@ -213,6 +213,10 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
     dmaInit(timerHardware->dmaTimUPIrqHandler, OWNER_TIMUP, timerGetTIMNumber(timerHardware->tim));
     dmaSetHandler(timerHardware->dmaTimUPIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
 
+#if defined(STM32F3)
+    DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)motor->timer->dmaBurstBuffer;
+    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
+#else
     DMA_InitStructure.DMA_Channel = timerHardware->dmaTimUPChannel;
     DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)motor->timer->dmaBurstBuffer;
     DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
@@ -220,6 +224,7 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m
     DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
     DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
     DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
+#endif
     DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&timerHardware->tim->DMAR;
     DMA_InitStructure.DMA_BufferSize = (pwmProtocolType == PWM_TYPE_PROSHOT1000) ? PROSHOT_DMA_BUFFER_SIZE : DSHOT_DMA_BUFFER_SIZE; // XXX
     DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
diff --git a/src/main/drivers/timer.h b/src/main/drivers/timer.h
index 1b838c1333..887f5561f5 100644
--- a/src/main/drivers/timer.h
+++ b/src/main/drivers/timer.h
@@ -100,14 +100,18 @@ typedef struct timerHardware_s {
 #if defined(STM32F4) || defined(STM32F7)
     DMA_Stream_TypeDef *dmaRef;
     uint32_t dmaChannel;
-#elif defined(STM32F3) || defined(STM32F1)
+#else
     DMA_Channel_TypeDef *dmaRef;
 #endif
     uint8_t dmaIrqHandler;
-#if defined(STM32F4) || defined(STM32F7)
+#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
     // TIMUP
+#ifdef STM32F3
+    DMA_Channel_TypeDef *dmaTimUPRef;
+#else
     DMA_Stream_TypeDef *dmaTimUPRef;
     uint32_t dmaTimUPChannel;
+#endif
     uint8_t dmaTimUPIrqHandler;
 #endif
 #endif
diff --git a/src/main/drivers/timer_def.h b/src/main/drivers/timer_def.h
index b0a4dc0bb9..4bf769ac03 100644
--- a/src/main/drivers/timer_def.h
+++ b/src/main/drivers/timer_def.h
@@ -171,6 +171,10 @@
     DEF_TIM_DMA_COND(                                                   \
         DEF_TIM_DMA_CHANNEL(TCH_## tim ## _ ## chan),                   \
         DEF_TIM_DMA_HANDLER(TCH_## tim ## _ ## chan)                    \
+    ),                                                                  \
+    DEF_TIM_DMA_COND(                                                   \
+        DEF_TIM_DMA_CHANNEL(TCH_## tim ## _UP),                         \
+        DEF_TIM_DMA_HANDLER(TCH_## tim ## _UP)                          \
     )                                                                   \
     }                                                                   \
 /**/
@@ -198,11 +202,9 @@
 #define DEF_TIM_DMA__BTCH_TIM1_CH4    D(1, 4)
 #define DEF_TIM_DMA__BTCH_TIM1_TRIG   D(1, 4)
 #define DEF_TIM_DMA__BTCH_TIM1_COM    D(1, 4)
-#define DEF_TIM_DMA__BTCH_TIM1_UP     D(1, 5)
 #define DEF_TIM_DMA__BTCH_TIM1_CH3    D(1, 6)
 
 #define DEF_TIM_DMA__BTCH_TIM2_CH3    D(1, 1)
-#define DEF_TIM_DMA__BTCH_TIM2_UP     D(1, 2)
 #define DEF_TIM_DMA__BTCH_TIM2_CH1    D(1, 5)
 #define DEF_TIM_DMA__BTCH_TIM2_CH2    D(1, 7)
 #define DEF_TIM_DMA__BTCH_TIM2_CH4    D(1, 7)
@@ -210,14 +212,12 @@
 #define DEF_TIM_DMA__BTCH_TIM3_CH2    NONE
 #define DEF_TIM_DMA__BTCH_TIM3_CH3    D(1, 2)
 #define DEF_TIM_DMA__BTCH_TIM3_CH4    D(1, 3)
-#define DEF_TIM_DMA__BTCH_TIM3_UP     D(1, 3)
 #define DEF_TIM_DMA__BTCH_TIM3_CH1    D(1, 6)
 #define DEF_TIM_DMA__BTCH_TIM3_TRIG   D(1, 6)
 
 #define DEF_TIM_DMA__BTCH_TIM4_CH1    D(1, 1)
 #define DEF_TIM_DMA__BTCH_TIM4_CH2    D(1, 4)
 #define DEF_TIM_DMA__BTCH_TIM4_CH3    D(1, 5)
-#define DEF_TIM_DMA__BTCH_TIM4_UP     D(1, 7)
 #define DEF_TIM_DMA__BTCH_TIM4_CH4    NONE
 
 #define DEF_TIM_DMA__BTCH_TIM15_CH1   D(1, 5)
@@ -228,28 +228,43 @@
 
 #ifdef REMAP_TIM16_DMA
 #define DEF_TIM_DMA__BTCH_TIM16_CH1   D(1, 6)
-#define DEF_TIM_DMA__BTCH_TIM16_UP    D(1, 6)
 #else
 #define DEF_TIM_DMA__BTCH_TIM16_CH1   D(1, 3)
-#define DEF_TIM_DMA__BTCH_TIM16_UP    D(1, 3)
 #endif
 
 #ifdef REMAP_TIM17_DMA
 #define DEF_TIM_DMA__BTCH_TIM17_CH1   D(1, 7)
-#define DEF_TIM_DMA__BTCH_TIM17_UP    D(1, 7)
 #else
 #define DEF_TIM_DMA__BTCH_TIM17_CH1   D(1, 1)
-#define DEF_TIM_DMA__BTCH_TIM17_UP    D(1, 1)
 #endif
 
 #define DEF_TIM_DMA__BTCH_TIM8_CH3    D(2, 1)
-#define DEF_TIM_DMA__BTCH_TIM8_UP     D(2, 1)
 #define DEF_TIM_DMA__BTCH_TIM8_CH4    D(2, 2)
 #define DEF_TIM_DMA__BTCH_TIM8_TRIG   D(2, 2)
 #define DEF_TIM_DMA__BTCH_TIM8_COM    D(2, 2)
 #define DEF_TIM_DMA__BTCH_TIM8_CH1    D(2, 3)
 #define DEF_TIM_DMA__BTCH_TIM8_CH2    D(2, 5)
 
+// TIM_UP table
+#define DEF_TIM_DMA__BTCH_TIM1_UP     D(1, 5)
+#define DEF_TIM_DMA__BTCH_TIM2_UP     D(1, 2)
+#define DEF_TIM_DMA__BTCH_TIM3_UP     D(1, 3)
+#define DEF_TIM_DMA__BTCH_TIM4_UP     D(1, 7)
+#define DEF_TIM_DMA__BTCH_TIM6_UP     D(2, 3)
+#define DEF_TIM_DMA__BTCH_TIM7_UP     D(2, 4)
+#define DEF_TIM_DMA__BTCH_TIM8_UP     D(2, 1)
+#define DEF_TIM_DMA__BTCH_TIM15_UP    D(1, 5)
+#ifdef REMAP_TIM16_DMA
+#define DEF_TIM_DMA__BTCH_TIM16_UP    D(1, 6)
+#else
+#define DEF_TIM_DMA__BTCH_TIM16_UP    D(1, 3)
+#endif
+#ifdef REMAP_TIM17_DMA
+#define DEF_TIM_DMA__BTCH_TIM17_UP    D(1, 7)
+#else
+#define DEF_TIM_DMA__BTCH_TIM17_UP    D(1, 1)
+#endif
+
 // AF table
 
 #define DEF_TIM_AF__PA0__TCH_TIM2_CH1     D(1)
diff --git a/src/main/target/common_fc_pre.h b/src/main/target/common_fc_pre.h
index 15e42e28f8..2a2f5241d3 100644
--- a/src/main/target/common_fc_pre.h
+++ b/src/main/target/common_fc_pre.h
@@ -41,6 +41,7 @@
 #ifdef STM32F3
 #define MINIMAL_CLI
 #define USE_DSHOT
+#define USE_DSHOT_DMAR
 #define USE_GYRO_DATA_ANALYSE
 #endif