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https://github.com/betaflight/betaflight.git
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F7 spi rework
This commit is contained in:
Sami Korhonen
parent
ac45a4687a
commit
b3a48c1a01
3 changed files with 63 additions and 96 deletions
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@ -79,6 +79,11 @@ typedef struct SPIDevice_s {
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uint8_t af;
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volatile uint16_t errorCount;
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bool leadingEdge;
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#if defined(STM32F7)
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SPI_HandleTypeDef hspi;
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DMA_HandleTypeDef hdma;
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uint8_t dmaIrqHandler;
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#endif
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} spiDevice_t;
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bool spiInit(SPIDevice device);
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@ -70,22 +70,12 @@
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static spiDevice_t spiHardwareMap[] = {
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{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF5_SPI1, false },
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{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF5_SPI2, false },
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{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF5_SPI3, false },
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{ .dev = SPI4, .nss = IO_TAG(SPI4_NSS_PIN), .sck = IO_TAG(SPI4_SCK_PIN), .miso = IO_TAG(SPI4_MISO_PIN), .mosi = IO_TAG(SPI4_MOSI_PIN), .rcc = RCC_APB2(SPI4), .af = GPIO_AF5_SPI4, false }
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{ .dev = SPI1, .nss = IO_TAG(SPI1_NSS_PIN), .sck = IO_TAG(SPI1_SCK_PIN), .miso = IO_TAG(SPI1_MISO_PIN), .mosi = IO_TAG(SPI1_MOSI_PIN), .rcc = RCC_APB2(SPI1), .af = GPIO_AF5_SPI1, .leadingEdge = false, .dmaIrqHandler = DMA2_ST3_HANDLER },
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{ .dev = SPI2, .nss = IO_TAG(SPI2_NSS_PIN), .sck = IO_TAG(SPI2_SCK_PIN), .miso = IO_TAG(SPI2_MISO_PIN), .mosi = IO_TAG(SPI2_MOSI_PIN), .rcc = RCC_APB1(SPI2), .af = GPIO_AF5_SPI2, .leadingEdge = false, .dmaIrqHandler = DMA1_ST4_HANDLER },
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{ .dev = SPI3, .nss = IO_TAG(SPI3_NSS_PIN), .sck = IO_TAG(SPI3_SCK_PIN), .miso = IO_TAG(SPI3_MISO_PIN), .mosi = IO_TAG(SPI3_MOSI_PIN), .rcc = RCC_APB1(SPI3), .af = GPIO_AF5_SPI3, .leadingEdge = false, .dmaIrqHandler = DMA1_ST7_HANDLER },
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{ .dev = SPI4, .nss = IO_TAG(SPI4_NSS_PIN), .sck = IO_TAG(SPI4_SCK_PIN), .miso = IO_TAG(SPI4_MISO_PIN), .mosi = IO_TAG(SPI4_MOSI_PIN), .rcc = RCC_APB2(SPI4), .af = GPIO_AF5_SPI4, .leadingEdge = false, .dmaIrqHandler = DMA2_ST1_HANDLER }
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};
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typedef struct{
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SPI_HandleTypeDef Handle;
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}spiHandle_t;
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static spiHandle_t spiHandle[SPIDEV_MAX+1];
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typedef struct{
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DMA_HandleTypeDef Handle;
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}dmaHandle_t;
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static dmaHandle_t dmaHandle[SPIDEV_MAX+1];
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SPIDevice spiDeviceByInstance(SPI_TypeDef *instance)
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{
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if (instance == SPI1)
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@ -105,32 +95,32 @@ SPIDevice spiDeviceByInstance(SPI_TypeDef *instance)
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SPI_HandleTypeDef* spiHandleByInstance(SPI_TypeDef *instance)
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{
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return &spiHandle[spiDeviceByInstance(instance)].Handle;
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return &spiHardwareMap[spiDeviceByInstance(instance)].hspi;
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}
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DMA_HandleTypeDef* dmaHandleByInstance(SPI_TypeDef *instance)
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{
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return &dmaHandle[spiDeviceByInstance(instance)].Handle;
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return &spiHardwareMap[spiDeviceByInstance(instance)].hdma;
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}
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void SPI1_IRQHandler(void)
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{
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HAL_SPI_IRQHandler(&spiHandle[SPIDEV_1].Handle);
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HAL_SPI_IRQHandler(&spiHardwareMap[SPIDEV_1].hspi);
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}
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void SPI2_IRQHandler(void)
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{
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HAL_SPI_IRQHandler(&spiHandle[SPIDEV_2].Handle);
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HAL_SPI_IRQHandler(&spiHardwareMap[SPIDEV_2].hspi);
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}
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void SPI3_IRQHandler(void)
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{
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HAL_SPI_IRQHandler(&spiHandle[SPIDEV_3].Handle);
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HAL_SPI_IRQHandler(&spiHardwareMap[SPIDEV_3].hspi);
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}
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void SPI4_IRQHandler(void)
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{
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HAL_SPI_IRQHandler(&spiHandle[SPIDEV_4].Handle);
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HAL_SPI_IRQHandler(&spiHardwareMap[SPIDEV_4].hspi);
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}
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@ -177,10 +167,9 @@ void spiInitDevice(SPIDevice device)
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IOConfigGPIO(IOGetByTag(spi->nss), SPI_IO_CS_CFG);
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}
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#endif
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SPI_HandleTypeDef Handle;
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Handle.Instance = spi->dev;
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spiHardwareMap[device].hspi.Instance = spi->dev;
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// Init SPI hardware
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HAL_SPI_DeInit(&Handle);
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HAL_SPI_DeInit(&spiHardwareMap[device].hspi);
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spiInit.Mode = SPI_MODE_MASTER;
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spiInit.Direction = SPI_DIRECTION_2LINES;
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@ -201,15 +190,10 @@ void spiInitDevice(SPIDevice device)
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spiInit.CLKPhase = SPI_PHASE_2EDGE;
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}
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Handle.Init = spiInit;
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#ifdef STM32F303xC
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// Configure for 8-bit reads.
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SPI_RxFIFOThresholdConfig(spi->dev, SPI_RxFIFOThreshold_QF);
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#endif
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spiHardwareMap[device].hspi.Init = spiInit;
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if (HAL_SPI_Init(&Handle) == HAL_OK)
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if (HAL_SPI_Init(&spiHardwareMap[device].hspi) == HAL_OK)
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{
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spiHandle[device].Handle = Handle;
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if (spi->nss) {
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IOHi(IOGetByTag(spi->nss));
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}
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@ -275,7 +259,8 @@ uint8_t spiTransferByte(SPI_TypeDef *instance, uint8_t in)
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*/
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bool spiIsBusBusy(SPI_TypeDef *instance)
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{
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if(spiHandle[spiDeviceByInstance(instance)].Handle.State == HAL_SPI_STATE_BUSY)
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SPIDevice device = spiDeviceByInstance(instance);
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if(spiHardwareMap[device].hspi.State == HAL_SPI_STATE_BUSY)
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return true;
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else
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return false;
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@ -283,21 +268,22 @@ bool spiIsBusBusy(SPI_TypeDef *instance)
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bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, const uint8_t *in, int len)
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{
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SPIDevice device = spiDeviceByInstance(instance);
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HAL_StatusTypeDef status;
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#define SPI_DEFAULT_TIMEOUT 10
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if(!out) // Tx only
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{
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status = HAL_SPI_Transmit(&spiHandle[spiDeviceByInstance(instance)].Handle, (uint8_t *)in, len, SPI_DEFAULT_TIMEOUT);
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status = HAL_SPI_Transmit(&spiHardwareMap[device].hspi, (uint8_t *)in, len, SPI_DEFAULT_TIMEOUT);
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}
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else if(!in) // Rx only
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{
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status = HAL_SPI_Receive(&spiHandle[spiDeviceByInstance(instance)].Handle, out, len, SPI_DEFAULT_TIMEOUT);
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status = HAL_SPI_Receive(&spiHardwareMap[device].hspi, out, len, SPI_DEFAULT_TIMEOUT);
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}
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else // Tx and Rx
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{
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status = HAL_SPI_TransmitReceive(&spiHandle[spiDeviceByInstance(instance)].Handle, (uint8_t *)in, out, len, SPI_DEFAULT_TIMEOUT);
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status = HAL_SPI_TransmitReceive(&spiHardwareMap[device].hspi, (uint8_t *)in, out, len, SPI_DEFAULT_TIMEOUT);
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}
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if( status != HAL_OK)
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@ -309,46 +295,46 @@ bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, const uint8_t *in, int len
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void spiSetDivisor(SPI_TypeDef *instance, uint16_t divisor)
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{
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SPI_HandleTypeDef *Handle = &spiHandle[spiDeviceByInstance(instance)].Handle;
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if (HAL_SPI_DeInit(Handle) == HAL_OK)
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SPIDevice device = spiDeviceByInstance(instance);
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if (HAL_SPI_DeInit(&spiHardwareMap[device].hspi) == HAL_OK)
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{
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}
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switch (divisor) {
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case 2:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
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break;
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case 4:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
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break;
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case 8:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
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break;
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case 16:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
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break;
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case 32:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
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break;
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case 64:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
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break;
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case 128:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
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break;
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case 256:
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Handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
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spiHardwareMap[device].hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
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break;
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}
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if (HAL_SPI_Init(Handle) == HAL_OK)
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if (HAL_SPI_Init(&spiHardwareMap[device].hspi) == HAL_OK)
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{
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}
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}
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@ -370,68 +356,44 @@ void spiResetErrorCounter(SPI_TypeDef *instance)
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void dmaSPIIRQHandler(dmaChannelDescriptor_t* descriptor)
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{
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DMA_HandleTypeDef * hdma = &dmaHandle[(descriptor->userParam)].Handle;
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HAL_DMA_IRQHandler(hdma);
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//SCB_InvalidateDCache_by_Addr();
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/*if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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DMA_CLEAR_FLAG(descriptor, DMA_IT_HTIF);
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_FEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_FEIF);
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}
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}
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TEIF);
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}
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_DMEIF))
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{
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DMA_CLEAR_FLAG(descriptor, DMA_IT_DMEIF);
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}*/
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SPIDevice device = descriptor->userParam;
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if (device != SPIINVALID)
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HAL_DMA_IRQHandler(&spiHardwareMap[device].hdma);
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}
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DMA_HandleTypeDef* spiSetDMATransmit(DMA_Stream_TypeDef *Stream, uint32_t Channel, SPI_TypeDef *Instance, uint8_t *pData, uint16_t Size)
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{
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SPI_HandleTypeDef* hspi = &spiHandle[spiDeviceByInstance(Instance)].Handle;
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DMA_HandleTypeDef* hdma = &dmaHandle[spiDeviceByInstance(Instance)].Handle;
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SPIDevice device = spiDeviceByInstance(Instance);
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hdma->Instance = Stream;
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hdma->Init.Channel = Channel;
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hdma->Init.Direction = DMA_MEMORY_TO_PERIPH;
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hdma->Init.PeriphInc = DMA_PINC_DISABLE;
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hdma->Init.MemInc = DMA_MINC_ENABLE;
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hdma->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma->Init.Mode = DMA_NORMAL;
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hdma->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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hdma->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL;
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hdma->Init.PeriphBurst = DMA_PBURST_SINGLE;
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hdma->Init.MemBurst = DMA_MBURST_SINGLE;
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hdma->Init.Priority = DMA_PRIORITY_LOW;
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spiHardwareMap[device].hdma.Instance = Stream;
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spiHardwareMap[device].hdma.Init.Channel = Channel;
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spiHardwareMap[device].hdma.Init.Direction = DMA_MEMORY_TO_PERIPH;
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spiHardwareMap[device].hdma.Init.PeriphInc = DMA_PINC_DISABLE;
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spiHardwareMap[device].hdma.Init.MemInc = DMA_MINC_ENABLE;
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spiHardwareMap[device].hdma.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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spiHardwareMap[device].hdma.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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spiHardwareMap[device].hdma.Init.Mode = DMA_NORMAL;
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spiHardwareMap[device].hdma.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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spiHardwareMap[device].hdma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_1QUARTERFULL;
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spiHardwareMap[device].hdma.Init.PeriphBurst = DMA_PBURST_SINGLE;
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spiHardwareMap[device].hdma.Init.MemBurst = DMA_MBURST_SINGLE;
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spiHardwareMap[device].hdma.Init.Priority = DMA_PRIORITY_LOW;
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HAL_DMA_DeInit(&spiHardwareMap[device].hdma);
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HAL_DMA_Init(&spiHardwareMap[device].hdma);
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HAL_DMA_DeInit(hdma);
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HAL_DMA_Init(hdma);
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__HAL_DMA_ENABLE(&spiHardwareMap[device].hdma);
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__HAL_SPI_ENABLE(&spiHardwareMap[device].hspi);
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__HAL_DMA_ENABLE(hdma);
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__HAL_SPI_ENABLE(hspi);
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/* Associate the initialized DMA handle to the spi handle */
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__HAL_LINKDMA(hspi, hdmatx, (*hdma));
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__HAL_LINKDMA(&spiHardwareMap[device].hspi, hdmatx, spiHardwareMap[device].hdma);
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// DMA TX Interrupt
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dmaSetHandler(DMA2_ST1_HANDLER, dmaSPIIRQHandler, NVIC_BUILD_PRIORITY(3, 0), (uint32_t)spiDeviceByInstance(Instance));
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dmaSetHandler(spiHardwareMap[device].dmaIrqHandler, dmaSPIIRQHandler, NVIC_BUILD_PRIORITY(3, 0), (uint32_t)device);
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// SCB_CleanDCache_by_Addr((uint32_t) pData, Size);
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// And Transmit
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HAL_SPI_Transmit_DMA(&spiHardwareMap[device].hspi, pData, Size);
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HAL_SPI_Transmit_DMA(hspi, pData, Size);
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//HAL_DMA_Start(&hdma, (uint32_t) pData, (uint32_t) &(Instance->DR), Size);
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return hdma;
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return &spiHardwareMap[device].hdma;
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}
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@ -235,7 +235,7 @@
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* Deactivated: CRC code cleaned from driver
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*/
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#define USE_SPI_CRC 1U
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#define USE_SPI_CRC 0U
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/* Includes ------------------------------------------------------------------*/
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/**
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