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SERIAL_BIDIR_PP option

Required for SmartAudio Support with single wire connection and without
external pull-up.

Tested with F3 only. F1 and F4 has untested mods, and Softserial
haven’t been touched.
This commit is contained in:
jflyper 2016-10-05 01:11:10 +09:00
parent f5dd171c8c
commit c724b7c4ee
3 changed files with 20 additions and 6 deletions

View file

@ -124,7 +124,10 @@ uartPort_t *serialUART1(uint32_t baudRate, portMode_t mode, portOptions_t option
// UART1_RX PA10 // UART1_RX PA10
if (options & SERIAL_BIDIR) { if (options & SERIAL_BIDIR) {
IOInit(IOGetByTag(IO_TAG(PA9)), OWNER_SERIAL, RESOURCE_UART_TXRX, 1); IOInit(IOGetByTag(IO_TAG(PA9)), OWNER_SERIAL, RESOURCE_UART_TXRX, 1);
IOConfigGPIO(IOGetByTag(IO_TAG(PA9)), IOCFG_AF_OD); if (options & SERIAL_BIDIR_PP)
IOConfigGPIO(IOGetByTag(IO_TAG(PA9)), IOCFG_AF_PP);
else
IOConfigGPIO(IOGetByTag(IO_TAG(PA9)), IOCFG_AF_OD);
} else { } else {
if (mode & MODE_TX) { if (mode & MODE_TX) {
IOInit(IOGetByTag(IO_TAG(PA9)), OWNER_SERIAL, RESOURCE_UART_TX, 1); IOInit(IOGetByTag(IO_TAG(PA9)), OWNER_SERIAL, RESOURCE_UART_TX, 1);
@ -195,7 +198,10 @@ uartPort_t *serialUART2(uint32_t baudRate, portMode_t mode, portOptions_t option
// UART2_RX PA3 // UART2_RX PA3
if (options & SERIAL_BIDIR) { if (options & SERIAL_BIDIR) {
IOInit(IOGetByTag(IO_TAG(PA2)), OWNER_SERIAL, RESOURCE_UART_TXRX, 2); IOInit(IOGetByTag(IO_TAG(PA2)), OWNER_SERIAL, RESOURCE_UART_TXRX, 2);
IOConfigGPIO(IOGetByTag(IO_TAG(PA2)), IOCFG_AF_OD); if (options & SERIAL_BIDIR_PP)
IOConfigGPIO(IOGetByTag(IO_TAG(PA2)), IOCFG_AF_PP);
else
IOConfigGPIO(IOGetByTag(IO_TAG(PA2)), IOCFG_AF_OD);
} else { } else {
if (mode & MODE_TX) { if (mode & MODE_TX) {
IOInit(IOGetByTag(IO_TAG(PA2)), OWNER_SERIAL, RESOURCE_UART_TX, 2); IOInit(IOGetByTag(IO_TAG(PA2)), OWNER_SERIAL, RESOURCE_UART_TX, 2);
@ -257,7 +263,10 @@ uartPort_t *serialUART3(uint32_t baudRate, portMode_t mode, portOptions_t option
if (options & SERIAL_BIDIR) { if (options & SERIAL_BIDIR) {
IOInit(IOGetByTag(IO_TAG(UART3_TX_PIN)), OWNER_SERIAL, RESOURCE_UART_TXRX, 3); IOInit(IOGetByTag(IO_TAG(UART3_TX_PIN)), OWNER_SERIAL, RESOURCE_UART_TXRX, 3);
IOConfigGPIO(IOGetByTag(IO_TAG(UART3_TX_PIN)), IOCFG_AF_OD); if (options & SERIAL_BIDIR_PP)
IOConfigGPIO(IOGetByTag(IO_TAG(UART3_TX_PIN)), IOCFG_AF_PP);
else
IOConfigGPIO(IOGetByTag(IO_TAG(UART3_TX_PIN)), IOCFG_AF_OD);
} else { } else {
if (mode & MODE_TX) { if (mode & MODE_TX) {
IOInit(IOGetByTag(IO_TAG(UART3_TX_PIN)), OWNER_SERIAL, RESOURCE_UART_TX, 3); IOInit(IOGetByTag(IO_TAG(UART3_TX_PIN)), OWNER_SERIAL, RESOURCE_UART_TX, 3);

View file

@ -115,8 +115,10 @@ void serialUARTInit(IO_t tx, IO_t rx, portMode_t mode, portOptions_t options, ui
{ {
if (options & SERIAL_BIDIR) { if (options & SERIAL_BIDIR) {
ioConfig_t ioCfg = IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, ioConfig_t ioCfg = IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz,
(options & SERIAL_INVERTED) ? GPIO_OType_PP : GPIO_OType_OD, ((options & SERIAL_INVERTED) || (options & SERIAL_BIDIR_PP))
(options & SERIAL_INVERTED) ? GPIO_PuPd_DOWN : GPIO_PuPd_UP ? GPIO_OType_PP : GPIO_OType_OD,
((options & SERIAL_INVERTED) || (options & SERIAL_BIDIR_PP))
? GPIO_PuPd_DOWN : GPIO_PuPd_UP
); );
IOInit(tx, OWNER_SERIAL, RESOURCE_UART_TXRX, index); IOInit(tx, OWNER_SERIAL, RESOURCE_UART_TXRX, index);

View file

@ -336,7 +336,10 @@ uartPort_t *serialUART(UARTDevice device, uint32_t baudRate, portMode_t mode, po
if (options & SERIAL_BIDIR) { if (options & SERIAL_BIDIR) {
IOInit(tx, OWNER_SERIAL, RESOURCE_UART_TXRX, RESOURCE_INDEX(device)); IOInit(tx, OWNER_SERIAL, RESOURCE_UART_TXRX, RESOURCE_INDEX(device));
IOConfigGPIOAF(tx, IOCFG_AF_OD, uart->af); if (options & SERIAL_BIDIR_PP)
IOConfigGPIOAF(tx, IOCFG_AF_PP, uart->af);
else
IOConfigGPIOAF(tx, IOCFG_AF_OD, uart->af);
} }
else { else {
if (mode & MODE_TX) { if (mode & MODE_TX) {