From c816f64b9e66405aca0b66024d44e1f1fba5c7e2 Mon Sep 17 00:00:00 2001 From: blckmn Date: Sun, 6 May 2018 12:34:28 +1000 Subject: [PATCH] Additional timer mapping for 7X2 target. --- src/main/target/STM32F7X2/target.c | 18 ++++++++++++++---- src/main/target/STM32F7X2/target.h | 2 +- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/src/main/target/STM32F7X2/target.c b/src/main/target/STM32F7X2/target.c index 0eee192e97..79b7e22270 100644 --- a/src/main/target/STM32F7X2/target.c +++ b/src/main/target/STM32F7X2/target.c @@ -42,8 +42,18 @@ const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = { DEF_TIM(TIM9, CH2, PE6, TIM_USE_MOTOR, 0, 0), DEF_TIM(TIM3, CH1, PB4, TIM_USE_MOTOR, 0, 0), //11 - DEF_TIM(TIM10, CH1, PB8, TIM_USE_MOTOR, 0, 0), - DEF_TIM(TIM5, CH4, PA3, TIM_USE_MOTOR, 0, 0), - DEF_TIM(TIM9, CH2, PA3, TIM_USE_MOTOR, 0, 0), - DEF_TIM(TIM11, CH1, PB9, TIM_USE_MOTOR, 0, 0), + DEF_TIM(TIM10, CH1, PB8, 0, 0, 0), + DEF_TIM(TIM5, CH4, PA3, 0, 0, 0), + DEF_TIM(TIM9, CH2, PA3, 0, 0, 0), + DEF_TIM(TIM11, CH1, PB9, 0, 0, 0), + DEF_TIM(TIM1, CH1N, PB13, 0, 0, 0), + DEF_TIM(TIM1, CH2N, PB14, 0, 0, 0), + DEF_TIM(TIM8, CH2N, PB14, 0, 0, 0), + DEF_TIM(TIM12, CH1, PB14, 0, 0, 0), + DEF_TIM(TIM1, CH3N, PB15, 0, 0, 0), + DEF_TIM(TIM8, CH3N, PB15, 0, 0, 0), + DEF_TIM(TIM3, CH1, PC6, 0, 0, 0), + DEF_TIM(TIM3, CH2, PC7, 0, 0, 0), + DEF_TIM(TIM3, CH4, PC9, 0, 0, 0), + DEF_TIM(TIM3, CH3, PC8, 0, 0, 0), }; diff --git a/src/main/target/STM32F7X2/target.h b/src/main/target/STM32F7X2/target.h index b46f52898c..e5a6df5e52 100644 --- a/src/main/target/STM32F7X2/target.h +++ b/src/main/target/STM32F7X2/target.h @@ -92,6 +92,6 @@ #define TARGET_IO_PORTE 0xffff #define TARGET_IO_PORTF 0xffff -#define USABLE_TIMER_CHANNEL_COUNT 15 +#define USABLE_TIMER_CHANNEL_COUNT 25 #define USE_TIMER_MGMT