diff --git a/src/main/cli/cli.c b/src/main/cli/cli.c
index d88dff1647..0f300ad024 100644
--- a/src/main/cli/cli.c
+++ b/src/main/cli/cli.c
@@ -5425,10 +5425,9 @@ static void printPeripheralDmaoptDetails(dmaoptEntry_t *entry, int index, const
     int uiIndex;
 
     if (entry->presenceMask) {
-        if (!(BIT(index + 1) & entry->presenceMask)) {
+        uiIndex = timerGetNumberByIndex(index);
+        if (!(BIT(uiIndex) & entry->presenceMask))
             return;
-        }
-        uiIndex = index + 1;
     } else {
         uiIndex = DMA_OPT_UI_INDEX(index);
     }
diff --git a/src/main/pg/timerup.c b/src/main/pg/timerup.c
index c3e5b2b09f..7fe422d498 100644
--- a/src/main/pg/timerup.c
+++ b/src/main/pg/timerup.c
@@ -29,49 +29,56 @@
 
 #include "timerup.h"
 
+#define TIM_N(n) (1 << (n))
+#define TIMER_INDEX(i) BITCOUNT((TIM_N(i) - 1) & USED_TIMERS)
+
 PG_REGISTER_ARRAY_WITH_RESET_FN(timerUpConfig_t, HARDWARE_TIMER_DEFINITION_COUNT, timerUpConfig, PG_TIMER_UP_CONFIG, 0);
 
 void pgResetFn_timerUpConfig(timerUpConfig_t *config)
 {
-    for (unsigned timno = 0; timno < HARDWARE_TIMER_DEFINITION_COUNT; timno++) {
-        config[timno].dmaopt = DMA_OPT_UNUSED;
+    timerUpConfig_t cfg[HARDWARE_TIMER_DEFINITION_COUNT];
+    
+    for (int i = 0; i < HARDWARE_TIMER_DEFINITION_COUNT; i++) {
+        cfg[i].dmaopt = DMA_OPT_UNUSED;
     }
 
-#if defined(TIMUP1_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 0) && (TIMUP_TIMERS & BIT(1))
-    config[0].dmaopt = TIMUP1_DMA_OPT;
+#if defined(TIMUP1_DMA_OPT) && (TIMUP_TIMERS & BIT(1))
+    cfg[TIMER_INDEX(1)].dmaopt = TIMUP1_DMA_OPT;
 #endif
-#if defined(TIMUP2_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 1) && (TIMUP_TIMERS & BIT(2))
-    config[1].dmaopt = TIMUP2_DMA_OPT;
+#if defined(TIMUP2_DMA_OPT) && (TIMUP_TIMERS & BIT(2))
+    cfg[TIMER_INDEX(2)].dmaopt = TIMUP2_DMA_OPT;
 #endif
-#if defined(TIMUP3_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 2) && (TIMUP_TIMERS & BIT(3))
-    config[2].dmaopt = TIMUP3_DMA_OPT;
+#if defined(TIMUP3_DMA_OPT) && (TIMUP_TIMERS & BIT(3))
+    cfg[TIMER_INDEX(3)].dmaopt = TIMUP3_DMA_OPT;
 #endif
-#if defined(TIMUP4_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 3) && (TIMUP_TIMERS & BIT(4))
-    config[3].dmaopt = TIMUP4_DMA_OPT;
+#if defined(TIMUP4_DMA_OPT) && (TIMUP_TIMERS & BIT(4))
+    cfg[TIMER_INDEX(4)].dmaopt = TIMUP4_DMA_OPT;
 #endif
-#if defined(TIMUP5_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 4) && (TIMUP_TIMERS & BIT(5))
-    config[4].dmaopt = TIMUP5_DMA_OPT;
+#if defined(TIMUP5_DMA_OPT) && (TIMUP_TIMERS & BIT(5))
+    cfg[TIMER_INDEX(5)].dmaopt = TIMUP5_DMA_OPT;
 #endif
-#if defined(TIMUP6_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 5) && (TIMUP_TIMERS & BIT(6))
-    config[5].dmaopt = TIMUP6_DMA_OPT;
+#if defined(TIMUP6_DMA_OPT) && (TIMUP_TIMERS & BIT(6))
+    cfg[TIMER_INDEX(6)].dmaopt = TIMUP6_DMA_OPT;
 #endif
-#if defined(TIMUP7_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 6) && (TIMUP_TIMERS & BIT(7))
-    config[6].dmaopt = TIMUP7_DMA_OPT;
+#if defined(TIMUP7_DMA_OPT) && (TIMUP_TIMERS & BIT(7))
+    cfg[TIMER_INDEX(7)].dmaopt = TIMUP7_DMA_OPT;
 #endif
-#if defined(TIMUP8_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 7) && (TIMUP_TIMERS & BIT(8))
-    config[7].dmaopt = TIMUP8_DMA_OPT;
+#if defined(TIMUP8_DMA_OPT) && (TIMUP_TIMERS & BIT(8))
+    cfg[TIMER_INDEX(8)].dmaopt = TIMUP8_DMA_OPT;
 #endif
-#if defined(TIMUP15_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 14) && (TIMUP_TIMERS & BIT(15))
-    config[14].dmaopt = TIMUP15_DMA_OPT;
+#if defined(TIMUP15_DMA_OPT) && (TIMUP_TIMERS & BIT(15))
+    cfg[TIMER_INDEX(15)].dmaopt = TIMUP15_DMA_OPT;
 #endif
-#if defined(TIMUP16_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 15) && (TIMUP_TIMERS & BIT(16))
-    config[15].dmaopt = TIMUP16_DMA_OPT;
+#if defined(TIMUP16_DMA_OPT) && (TIMUP_TIMERS & BIT(16))
+    cfg[TIMER_INDEX(16)].dmaopt = TIMUP16_DMA_OPT;
 #endif
-#if defined(TIMUP17_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 16) && (TIMUP_TIMERS & BIT(17))
-    config[16].dmaopt = TIMUP17_DMA_OPT;
+#if defined(TIMUP17_DMA_OPT) && (TIMUP_TIMERS & BIT(17))
+    cfg[TIMER_INDEX(17)].dmaopt = TIMUP17_DMA_OPT;
 #endif
-#if defined(TIMUP20_DMA_OPT) && (HARDWARE_TIMER_DEFINITION_COUNT > 19) && (TIMUP_TIMERS & BIT(20))
-    config[19].dmaopt = TIMUP20_DMA_OPT;
+#if defined(TIMUP20_DMA_OPT) && (TIMUP_TIMERS & BIT(20))
+    cfg[TIMER_INDEX(20)].dmaopt = TIMUP20_DMA_OPT;
 #endif
+
+   memcpy(config, cfg, HARDWARE_TIMER_DEFINITION_COUNT);
 }
 #endif
diff --git a/src/platform/AT32/timer_def.h b/src/platform/AT32/timer_def.h
index cc60f84718..c9641fb188 100644
--- a/src/platform/AT32/timer_def.h
+++ b/src/platform/AT32/timer_def.h
@@ -27,7 +27,7 @@
 #define USED_TIMERS  ( BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(12) | BIT(13) | BIT(14) | BIT(20) )
 #define TIMUP_TIMERS ( BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(8) | BIT(20) )
 #define FULL_TIMER_CHANNEL_COUNT        109
-#define HARDWARE_TIMER_DEFINITION_COUNT 15
+#define HARDWARE_TIMER_DEFINITION_COUNT 13
 
 // allow conditional definition of DMA related members
 #if defined(USE_TIMER_DMA)
diff --git a/src/platform/STM32/timer_def.h b/src/platform/STM32/timer_def.h
index a27da524c6..a795c277f3 100644
--- a/src/platform/STM32/timer_def.h
+++ b/src/platform/STM32/timer_def.h
@@ -1149,14 +1149,14 @@
 
 #define FULL_TIMER_CHANNEL_COUNT 91
 #define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(6) | TIM_N(7) | TIM_N(8) | TIM_N(12) | TIM_N(13) | TIM_N(14) | TIM_N(15) | TIM_N(16) | TIM_N(17) )
-#define HARDWARE_TIMER_DEFINITION_COUNT 17
+#define HARDWARE_TIMER_DEFINITION_COUNT 14
 #define TIMUP_TIMERS ( BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8) | BIT(15) | BIT(16) | BIT(17) )
 
 #elif defined(STM32G4)
 
 #define FULL_TIMER_CHANNEL_COUNT 93 // XXX Need review
 #define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(6) | TIM_N(7) | TIM_N(8) | TIM_N(15) | TIM_N(16) | TIM_N(17) | TIM_N(20) )
-#define HARDWARE_TIMER_DEFINITION_COUNT 20
+#define HARDWARE_TIMER_DEFINITION_COUNT 12
 #define TIMUP_TIMERS ( BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8) | BIT(15) | BIT(16) | BIT(17) | BIT(20))
 
 #endif